In archive src/libcompiler_builtins-26b11cd3df3b5c44.rlib:

compiler_builtins-26b11cd3df3b5c44.compiler_builtins.f34lpfze-cgu.0.rcgu.o:     file format elf32-littlearm

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00000000 g     F .text.memmove	000000d0 .hidden memmove
00000000 g     F .text.memset	00000050 .hidden memset



Disassembly of section .text.memcpy:

00000000 <memcpy>:
memcpy():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:9
   0:	b5b0      	push	{r4, r5, r7, lr}
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:14
   2:	b33a      	cbz	r2, 54 <memcpy+0x54>
offset<u8>():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ptr.rs:1077
   4:	1e53      	subs	r3, r2, #1
   6:	f002 0c03 	and.w	ip, r2, #3
   a:	2b03      	cmp	r3, #3
   c:	d204      	bcs.n	18 <memcpy+0x18>
memcpy():
   e:	2200      	movs	r2, #0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:14
  10:	f1bc 0f00 	cmp.w	ip, #0
  14:	d113      	bne.n	3e <memcpy+0x3e>
  16:	e01d      	b.n	54 <memcpy+0x54>
offset<u8>():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ptr.rs:1077
  18:	eba2 0e0c 	sub.w	lr, r2, ip
  1c:	2200      	movs	r2, #0
memcpy():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:15
  1e:	5c8b      	ldrb	r3, [r1, r2]
  20:	188c      	adds	r4, r1, r2
  22:	5483      	strb	r3, [r0, r2]
  24:	1883      	adds	r3, r0, r2
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:16
  26:	3204      	adds	r2, #4
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:15
  28:	7865      	ldrb	r5, [r4, #1]
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:14
  2a:	4596      	cmp	lr, r2
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:15
  2c:	705d      	strb	r5, [r3, #1]
  2e:	78a5      	ldrb	r5, [r4, #2]
  30:	709d      	strb	r5, [r3, #2]
  32:	78e4      	ldrb	r4, [r4, #3]
  34:	70dc      	strb	r4, [r3, #3]
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:14
  36:	d1f2      	bne.n	1e <memcpy+0x1e>
  38:	f1bc 0f00 	cmp.w	ip, #0
  3c:	d00a      	beq.n	54 <memcpy+0x54>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:15
  3e:	5c8b      	ldrb	r3, [r1, r2]
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:14
  40:	f1bc 0f01 	cmp.w	ip, #1
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:15
  44:	5483      	strb	r3, [r0, r2]
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:14
  46:	d005      	beq.n	54 <memcpy+0x54>
  48:	1c53      	adds	r3, r2, #1
  4a:	f1bc 0f02 	cmp.w	ip, #2
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:15
  4e:	5ccd      	ldrb	r5, [r1, r3]
  50:	54c5      	strb	r5, [r0, r3]
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:14
  52:	d100      	bne.n	56 <memcpy+0x56>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:19
  54:	bdb0      	pop	{r4, r5, r7, pc}
  56:	3202      	adds	r2, #2
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:15
  58:	5c89      	ldrb	r1, [r1, r2]
  5a:	5481      	strb	r1, [r0, r2]
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:19
  5c:	bdb0      	pop	{r4, r5, r7, pc}

Disassembly of section .text.memmove:

00000000 <memmove>:
memmove():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:22
   0:	b5b0      	push	{r4, r5, r7, lr}
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:26
   2:	4281      	cmp	r1, r0
   4:	d21b      	bcs.n	3e <memmove+0x3e>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:29
   6:	2a00      	cmp	r2, #0
   8:	d061      	beq.n	ce <memmove+0xce>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:30
   a:	f012 0e03 	ands.w	lr, r2, #3
   e:	f1a2 0c01 	sub.w	ip, r2, #1
  12:	d042      	beq.n	9a <memmove+0x9a>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:31
  14:	f811 300c 	ldrb.w	r3, [r1, ip]
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:29
  18:	f1be 0f01 	cmp.w	lr, #1
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:31
  1c:	f800 300c 	strb.w	r3, [r0, ip]
  20:	4663      	mov	r3, ip
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:29
  22:	d03b      	beq.n	9c <memmove+0x9c>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:30
  24:	1e93      	subs	r3, r2, #2
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:29
  26:	f1be 0f02 	cmp.w	lr, #2
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:31
  2a:	5ccc      	ldrb	r4, [r1, r3]
  2c:	54c4      	strb	r4, [r0, r3]
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:29
  2e:	d035      	beq.n	9c <memmove+0x9c>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:30
  30:	1ed3      	subs	r3, r2, #3
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:31
  32:	5cca      	ldrb	r2, [r1, r3]
  34:	54c2      	strb	r2, [r0, r3]
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:30
  36:	f1bc 0f03 	cmp.w	ip, #3
  3a:	d232      	bcs.n	a2 <memmove+0xa2>
  3c:	e047      	b.n	ce <memmove+0xce>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:36
  3e:	2a00      	cmp	r2, #0
  40:	d045      	beq.n	ce <memmove+0xce>
offset<u8>():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ptr.rs:1077
  42:	1e53      	subs	r3, r2, #1
  44:	f002 0c03 	and.w	ip, r2, #3
  48:	2b03      	cmp	r3, #3
  4a:	d204      	bcs.n	56 <memmove+0x56>
memmove():
  4c:	2200      	movs	r2, #0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:36
  4e:	f1bc 0f00 	cmp.w	ip, #0
  52:	d113      	bne.n	7c <memmove+0x7c>
  54:	e03b      	b.n	ce <memmove+0xce>
offset<u8>():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ptr.rs:1077
  56:	eba2 0e0c 	sub.w	lr, r2, ip
  5a:	2200      	movs	r2, #0
memmove():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:37
  5c:	5c8c      	ldrb	r4, [r1, r2]
  5e:	188b      	adds	r3, r1, r2
  60:	5484      	strb	r4, [r0, r2]
  62:	1884      	adds	r4, r0, r2
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:38
  64:	3204      	adds	r2, #4
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:37
  66:	785d      	ldrb	r5, [r3, #1]
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:36
  68:	4596      	cmp	lr, r2
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:37
  6a:	7065      	strb	r5, [r4, #1]
  6c:	789d      	ldrb	r5, [r3, #2]
  6e:	70a5      	strb	r5, [r4, #2]
  70:	78db      	ldrb	r3, [r3, #3]
  72:	70e3      	strb	r3, [r4, #3]
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:36
  74:	d1f2      	bne.n	5c <memmove+0x5c>
  76:	f1bc 0f00 	cmp.w	ip, #0
  7a:	d028      	beq.n	ce <memmove+0xce>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:37
  7c:	5c8b      	ldrb	r3, [r1, r2]
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:36
  7e:	f1bc 0f01 	cmp.w	ip, #1
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:37
  82:	5483      	strb	r3, [r0, r2]
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:36
  84:	d023      	beq.n	ce <memmove+0xce>
  86:	1c53      	adds	r3, r2, #1
  88:	f1bc 0f02 	cmp.w	ip, #2
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:37
  8c:	5ccd      	ldrb	r5, [r1, r3]
  8e:	54c5      	strb	r5, [r0, r3]
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:36
  90:	d01d      	beq.n	ce <memmove+0xce>
  92:	3202      	adds	r2, #2
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:37
  94:	5c89      	ldrb	r1, [r1, r2]
  96:	5481      	strb	r1, [r0, r2]
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:42
  98:	bdb0      	pop	{r4, r5, r7, pc}
  9a:	4613      	mov	r3, r2
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:30
  9c:	f1bc 0f03 	cmp.w	ip, #3
  a0:	d315      	bcc.n	ce <memmove+0xce>
  a2:	f1a1 0c04 	sub.w	ip, r1, #4
  a6:	f1a0 0e02 	sub.w	lr, r0, #2
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:31
  aa:	eb0c 0203 	add.w	r2, ip, r3
  ae:	eb0e 0103 	add.w	r1, lr, r3
  b2:	78d4      	ldrb	r4, [r2, #3]
  b4:	704c      	strb	r4, [r1, #1]
  b6:	7894      	ldrb	r4, [r2, #2]
  b8:	f80e 4003 	strb.w	r4, [lr, r3]
  bc:	7852      	ldrb	r2, [r2, #1]
  be:	f801 2c01 	strb.w	r2, [r1, #-1]
  c2:	f81c 2003 	ldrb.w	r2, [ip, r3]
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:30
  c6:	3b04      	subs	r3, #4
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:31
  c8:	f801 2c02 	strb.w	r2, [r1, #-2]
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:29
  cc:	d1ed      	bne.n	aa <memmove+0xaa>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:42
  ce:	bdb0      	pop	{r4, r5, r7, pc}

Disassembly of section .text.memset:

00000000 <memset>:
memset():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:47
   0:	2a00      	cmp	r2, #0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:52
   2:	bf08      	it	eq
   4:	4770      	bxeq	lr
   6:	b580      	push	{r7, lr}
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:47
   8:	1e53      	subs	r3, r2, #1
   a:	f002 0c03 	and.w	ip, r2, #3
   e:	2b03      	cmp	r3, #3
  10:	d201      	bcs.n	16 <memset+0x16>
  12:	2200      	movs	r2, #0
  14:	e00a      	b.n	2c <memset+0x2c>
  16:	eba2 0e0c 	sub.w	lr, r2, ip
  1a:	2200      	movs	r2, #0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:48
  1c:	5481      	strb	r1, [r0, r2]
  1e:	1883      	adds	r3, r0, r2
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:49
  20:	3204      	adds	r2, #4
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:47
  22:	4596      	cmp	lr, r2
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:48
  24:	70d9      	strb	r1, [r3, #3]
  26:	7099      	strb	r1, [r3, #2]
  28:	7059      	strb	r1, [r3, #1]
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:47
  2a:	d1f7      	bne.n	1c <memset+0x1c>
  2c:	f1bc 0f00 	cmp.w	ip, #0
  30:	e8bd 4080 	ldmia.w	sp!, {r7, lr}
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:48
  34:	bf1c      	itt	ne
  36:	5481      	strbne	r1, [r0, r2]
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:47
  38:	f1bc 0f01 	cmpne.w	ip, #1
  3c:	d100      	bne.n	40 <memset+0x40>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:52
  3e:	4770      	bx	lr
offset<u8>():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ptr.rs:1697
  40:	4402      	add	r2, r0
memset():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:47
  42:	f1bc 0f02 	cmp.w	ip, #2
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:48
  46:	7051      	strb	r1, [r2, #1]
  48:	bf1c      	itt	ne
  4a:	7091      	strbne	r1, [r2, #2]
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:52
  4c:	4770      	bxne	lr
  4e:	4770      	bx	lr

Disassembly of section .text.memcmp:

00000000 <memcmp>:
memcmp():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:55
   0:	b5b0      	push	{r4, r5, r7, lr}
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:57
   2:	b382      	cbz	r2, 66 <memcmp+0x66>
   4:	f04f 0c03 	mov.w	ip, #3
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:59
   8:	eb01 040c 	add.w	r4, r1, ip
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:58
   c:	eb00 050c 	add.w	r5, r0, ip
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:59
  10:	f814 ec03 	ldrb.w	lr, [r4, #-3]
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:58
  14:	f815 3c03 	ldrb.w	r3, [r5, #-3]
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:60
  18:	4573      	cmp	r3, lr
  1a:	d126      	bne.n	6a <memcmp+0x6a>
  1c:	f1ac 0302 	sub.w	r3, ip, #2
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:57
  20:	4293      	cmp	r3, r2
  22:	d225      	bcs.n	70 <memcmp+0x70>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:59
  24:	f814 ec02 	ldrb.w	lr, [r4, #-2]
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:58
  28:	f815 3c02 	ldrb.w	r3, [r5, #-2]
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:60
  2c:	4573      	cmp	r3, lr
  2e:	d11c      	bne.n	6a <memcmp+0x6a>
  30:	f1ac 0301 	sub.w	r3, ip, #1
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:57
  34:	4293      	cmp	r3, r2
  36:	d214      	bcs.n	62 <memcmp+0x62>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:59
  38:	f814 ec01 	ldrb.w	lr, [r4, #-1]
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:58
  3c:	f815 3c01 	ldrb.w	r3, [r5, #-1]
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:60
  40:	4573      	cmp	r3, lr
  42:	d112      	bne.n	6a <memcmp+0x6a>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:57
  44:	4594      	cmp	ip, r2
  46:	d20c      	bcs.n	62 <memcmp+0x62>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:59
  48:	f811 e00c 	ldrb.w	lr, [r1, ip]
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:58
  4c:	f810 300c 	ldrb.w	r3, [r0, ip]
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:60
  50:	4573      	cmp	r3, lr
  52:	d10a      	bne.n	6a <memcmp+0x6a>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:57
  54:	f10c 0304 	add.w	r3, ip, #4
  58:	f10c 0501 	add.w	r5, ip, #1
  5c:	4295      	cmp	r5, r2
  5e:	469c      	mov	ip, r3
  60:	d3d2      	bcc.n	8 <memcmp+0x8>
  62:	2000      	movs	r0, #0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:66
  64:	bdb0      	pop	{r4, r5, r7, pc}
  66:	2000      	movs	r0, #0
  68:	bdb0      	pop	{r4, r5, r7, pc}
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:61
  6a:	eba3 000e 	sub.w	r0, r3, lr
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:66
  6e:	bdb0      	pop	{r4, r5, r7, pc}
  70:	2000      	movs	r0, #0
  72:	bdb0      	pop	{r4, r5, r7, pc}

Disassembly of section .text.__aeabi_uidivmod:

00000000 <__aeabi_uidivmod>:
__aeabi_uidivmod():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/arm.rs:11
   0:	b500      	push	{lr}
   2:	b081      	sub	sp, #4
   4:	466a      	mov	r2, sp
   6:	f7ff fffe 	bl	0 <__udivmodsi4>
   a:	9900      	ldr	r1, [sp, #0]
   c:	b001      	add	sp, #4
   e:	bd00      	pop	{pc}
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/arm.rs:18
  10:	defe      	udf	#254	; 0xfe

Disassembly of section .text.__aeabi_uldivmod:

00000000 <__aeabi_uldivmod>:
__aeabi_uldivmod():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/arm.rs:39
   0:	b510      	push	{r4, lr}
   2:	b084      	sub	sp, #16
   4:	ac02      	add	r4, sp, #8
   6:	9400      	str	r4, [sp, #0]
   8:	f7ff fffe 	bl	0 <__aeabi_uldivmod>
   c:	9a02      	ldr	r2, [sp, #8]
   e:	9b03      	ldr	r3, [sp, #12]
  10:	b004      	add	sp, #16
  12:	bd10      	pop	{r4, pc}
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/arm.rs:48
  14:	defe      	udf	#254	; 0xfe

Disassembly of section .text.__aeabi_idivmod:

00000000 <__aeabi_idivmod>:
__aeabi_idivmod():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/arm.rs:71
   0:	b513      	push	{r0, r1, r4, lr}
   2:	f7ff fffe 	bl	0 <__aeabi_idivmod>
   6:	bc06      	pop	{r1, r2}
   8:	4342      	muls	r2, r0
   a:	1a89      	subs	r1, r1, r2
   c:	bd10      	pop	{r4, pc}
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/arm.rs:77
   e:	defe      	udf	#254	; 0xfe

Disassembly of section .text.__aeabi_ldivmod:

00000000 <__aeabi_ldivmod>:
__aeabi_ldivmod():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/arm.rs:97
   0:	b510      	push	{r4, lr}
   2:	b084      	sub	sp, #16
   4:	ac02      	add	r4, sp, #8
   6:	9400      	str	r4, [sp, #0]
   8:	f7ff fffe 	bl	0 <__aeabi_ldivmod>
   c:	9a02      	ldr	r2, [sp, #8]
   e:	9b03      	ldr	r3, [sp, #12]
  10:	b004      	add	sp, #16
  12:	bd10      	pop	{r4, pc}
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/arm.rs:106
  14:	defe      	udf	#254	; 0xfe

Disassembly of section .text.__aeabi_memcpy:

00000000 <__aeabi_memcpy>:
__aeabi_memcpy():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/arm.rs:130
   0:	b5b0      	push	{r4, r5, r7, lr}
memcpy():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:14
   2:	b35a      	cbz	r2, 5c <__aeabi_memcpy+0x5c>
offset<u8>():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ptr.rs:1077
   4:	1e53      	subs	r3, r2, #1
   6:	f002 0c03 	and.w	ip, r2, #3
   a:	2b03      	cmp	r3, #3
   c:	d204      	bcs.n	18 <__aeabi_memcpy+0x18>
memcpy():
   e:	2200      	movs	r2, #0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:14
  10:	f1bc 0f00 	cmp.w	ip, #0
  14:	d113      	bne.n	3e <__aeabi_memcpy+0x3e>
  16:	e021      	b.n	5c <__aeabi_memcpy+0x5c>
offset<u8>():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ptr.rs:1077
  18:	eba2 0e0c 	sub.w	lr, r2, ip
  1c:	2200      	movs	r2, #0
memcpy():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:15
  1e:	5c8b      	ldrb	r3, [r1, r2]
  20:	188c      	adds	r4, r1, r2
  22:	5483      	strb	r3, [r0, r2]
  24:	1883      	adds	r3, r0, r2
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:16
  26:	3204      	adds	r2, #4
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:15
  28:	7865      	ldrb	r5, [r4, #1]
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:14
  2a:	4596      	cmp	lr, r2
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:15
  2c:	705d      	strb	r5, [r3, #1]
  2e:	78a5      	ldrb	r5, [r4, #2]
  30:	709d      	strb	r5, [r3, #2]
  32:	78e4      	ldrb	r4, [r4, #3]
  34:	70dc      	strb	r4, [r3, #3]
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:14
  36:	d1f2      	bne.n	1e <__aeabi_memcpy+0x1e>
  38:	f1bc 0f00 	cmp.w	ip, #0
  3c:	d00e      	beq.n	5c <__aeabi_memcpy+0x5c>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:15
  3e:	5c8b      	ldrb	r3, [r1, r2]
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:14
  40:	f1bc 0f01 	cmp.w	ip, #1
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:15
  44:	5483      	strb	r3, [r0, r2]
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:14
  46:	d009      	beq.n	5c <__aeabi_memcpy+0x5c>
  48:	1c53      	adds	r3, r2, #1
  4a:	f1bc 0f02 	cmp.w	ip, #2
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:15
  4e:	5ccd      	ldrb	r5, [r1, r3]
  50:	54c5      	strb	r5, [r0, r3]
__aeabi_memcpy():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/arm.rs:132
  52:	bf08      	it	eq
  54:	bdb0      	popeq	{r4, r5, r7, pc}
memcpy():
  56:	3202      	adds	r2, #2
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:15
  58:	5c89      	ldrb	r1, [r1, r2]
  5a:	5481      	strb	r1, [r0, r2]
__aeabi_memcpy():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/arm.rs:132
  5c:	bdb0      	pop	{r4, r5, r7, pc}

Disassembly of section .text.__aeabi_memcpy4:

00000000 <__aeabi_memcpy4>:
__aeabi_memcpy4():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/arm.rs:143
   0:	2a04      	cmp	r2, #4
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/arm.rs:150
   2:	bf38      	it	cc
   4:	f7ff bffe 	bcc.w	0 <__aeabi_memcpy4>
   8:	b5b0      	push	{r4, r5, r7, lr}
copy_nonoverlapping<u32>():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/intrinsics.rs:1422
   a:	f1a2 0c04 	sub.w	ip, r2, #4
   e:	2301      	movs	r3, #1
  10:	eb03 039c 	add.w	r3, r3, ip, lsr #2
  14:	f013 0303 	ands.w	r3, r3, #3
  18:	d00e      	beq.n	38 <__aeabi_memcpy4+0x38>
  1a:	468e      	mov	lr, r1
write<u32>():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ptr.rs:735
  1c:	4604      	mov	r4, r0
copy_nonoverlapping<u32>():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/intrinsics.rs:1422
  1e:	f85e 5b04 	ldr.w	r5, [lr], #4
__aeabi_memcpy4():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/arm.rs:143
  22:	2b01      	cmp	r3, #1
write<u32>():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ptr.rs:735
  24:	f844 5b04 	str.w	r5, [r4], #4
__aeabi_memcpy4():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/arm.rs:143
  28:	d11f      	bne.n	6a <__aeabi_memcpy4+0x6a>
  2a:	4663      	mov	r3, ip
  2c:	4620      	mov	r0, r4
  2e:	4671      	mov	r1, lr
copy_nonoverlapping<u32>():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/intrinsics.rs:1422
  30:	f1bc 0f0c 	cmp.w	ip, #12
  34:	d204      	bcs.n	40 <__aeabi_memcpy4+0x40>
  36:	e012      	b.n	5e <__aeabi_memcpy4+0x5e>
  38:	4613      	mov	r3, r2
  3a:	f1bc 0f0c 	cmp.w	ip, #12
  3e:	d30e      	bcc.n	5e <__aeabi_memcpy4+0x5e>
  40:	680d      	ldr	r5, [r1, #0]
__aeabi_memcpy4():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/arm.rs:147
  42:	3b10      	subs	r3, #16
write<u32>():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ptr.rs:735
  44:	6005      	str	r5, [r0, #0]
__aeabi_memcpy4():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/arm.rs:143
  46:	2b03      	cmp	r3, #3
copy_nonoverlapping<u32>():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/intrinsics.rs:1422
  48:	684d      	ldr	r5, [r1, #4]
write<u32>():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ptr.rs:735
  4a:	6045      	str	r5, [r0, #4]
copy_nonoverlapping<u32>():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/intrinsics.rs:1422
  4c:	688d      	ldr	r5, [r1, #8]
write<u32>():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ptr.rs:735
  4e:	6085      	str	r5, [r0, #8]
copy_nonoverlapping<u32>():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/intrinsics.rs:1422
  50:	68cd      	ldr	r5, [r1, #12]
offset<u32>():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ptr.rs:1697
  52:	f101 0110 	add.w	r1, r1, #16
write<u32>():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ptr.rs:735
  56:	60c5      	str	r5, [r0, #12]
offset<u32>():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ptr.rs:1697
  58:	f100 0010 	add.w	r0, r0, #16
__aeabi_memcpy4():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/arm.rs:143
  5c:	d8f0      	bhi.n	40 <__aeabi_memcpy4+0x40>
copy_nonoverlapping<u32>():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/intrinsics.rs:1422
  5e:	f002 0203 	and.w	r2, r2, #3
  62:	e8bd 40b0 	ldmia.w	sp!, {r4, r5, r7, lr}
__aeabi_memcpy4():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/arm.rs:150
  66:	f7ff bffe 	b.w	0 <__aeabi_memcpy4>
copy_nonoverlapping<u32>():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/intrinsics.rs:1422
  6a:	684d      	ldr	r5, [r1, #4]
__aeabi_memcpy4():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/arm.rs:143
  6c:	2b02      	cmp	r3, #2
write<u32>():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ptr.rs:735
  6e:	6045      	str	r5, [r0, #4]
__aeabi_memcpy4():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/arm.rs:143
  70:	d107      	bne.n	82 <__aeabi_memcpy4+0x82>
  72:	f1a2 0308 	sub.w	r3, r2, #8
  76:	3108      	adds	r1, #8
  78:	3008      	adds	r0, #8
copy_nonoverlapping<u32>():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/intrinsics.rs:1422
  7a:	f1bc 0f0c 	cmp.w	ip, #12
  7e:	d2df      	bcs.n	40 <__aeabi_memcpy4+0x40>
  80:	e7ed      	b.n	5e <__aeabi_memcpy4+0x5e>
  82:	688b      	ldr	r3, [r1, #8]
offset<u32>():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ptr.rs:1697
  84:	310c      	adds	r1, #12
write<u32>():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ptr.rs:735
  86:	6083      	str	r3, [r0, #8]
__aeabi_memcpy4():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/arm.rs:147
  88:	f1a2 030c 	sub.w	r3, r2, #12
offset<u32>():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ptr.rs:1697
  8c:	300c      	adds	r0, #12
copy_nonoverlapping<u32>():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/intrinsics.rs:1422
  8e:	f1bc 0f0c 	cmp.w	ip, #12
  92:	d2d5      	bcs.n	40 <__aeabi_memcpy4+0x40>
  94:	e7e3      	b.n	5e <__aeabi_memcpy4+0x5e>

Disassembly of section .text.__aeabi_memcpy8:

00000000 <__aeabi_memcpy8>:
__aeabi_memcpy8():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/arm.rs:157
   0:	f7ff bffe 	b.w	0 <__aeabi_memcpy8>

Disassembly of section .text.__aeabi_memmove:

00000000 <__aeabi_memmove>:
__aeabi_memmove():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/arm.rs:163
   0:	b5b0      	push	{r4, r5, r7, lr}
memmove():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:26
   2:	4281      	cmp	r1, r0
   4:	d21b      	bcs.n	3e <__aeabi_memmove+0x3e>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:29
   6:	2a00      	cmp	r2, #0
   8:	d062      	beq.n	d0 <__aeabi_memmove+0xd0>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:30
   a:	f012 0e03 	ands.w	lr, r2, #3
   e:	f1a2 0c01 	sub.w	ip, r2, #1
  12:	d043      	beq.n	9c <__aeabi_memmove+0x9c>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:31
  14:	f811 300c 	ldrb.w	r3, [r1, ip]
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:29
  18:	f1be 0f01 	cmp.w	lr, #1
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:31
  1c:	f800 300c 	strb.w	r3, [r0, ip]
  20:	4663      	mov	r3, ip
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:29
  22:	d03c      	beq.n	9e <__aeabi_memmove+0x9e>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:30
  24:	1e93      	subs	r3, r2, #2
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:29
  26:	f1be 0f02 	cmp.w	lr, #2
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:31
  2a:	5ccc      	ldrb	r4, [r1, r3]
  2c:	54c4      	strb	r4, [r0, r3]
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:29
  2e:	d036      	beq.n	9e <__aeabi_memmove+0x9e>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:30
  30:	1ed3      	subs	r3, r2, #3
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:31
  32:	5cca      	ldrb	r2, [r1, r3]
  34:	54c2      	strb	r2, [r0, r3]
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:30
  36:	f1bc 0f03 	cmp.w	ip, #3
  3a:	d233      	bcs.n	a4 <__aeabi_memmove+0xa4>
  3c:	e048      	b.n	d0 <__aeabi_memmove+0xd0>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:36
  3e:	2a00      	cmp	r2, #0
  40:	d046      	beq.n	d0 <__aeabi_memmove+0xd0>
offset<u8>():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ptr.rs:1077
  42:	1e53      	subs	r3, r2, #1
  44:	f002 0c03 	and.w	ip, r2, #3
  48:	2b03      	cmp	r3, #3
  4a:	d204      	bcs.n	56 <__aeabi_memmove+0x56>
memmove():
  4c:	2200      	movs	r2, #0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:36
  4e:	f1bc 0f00 	cmp.w	ip, #0
  52:	d113      	bne.n	7c <__aeabi_memmove+0x7c>
  54:	e03c      	b.n	d0 <__aeabi_memmove+0xd0>
offset<u8>():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ptr.rs:1077
  56:	eba2 0e0c 	sub.w	lr, r2, ip
  5a:	2200      	movs	r2, #0
memmove():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:37
  5c:	5c8b      	ldrb	r3, [r1, r2]
  5e:	188c      	adds	r4, r1, r2
  60:	5483      	strb	r3, [r0, r2]
  62:	1883      	adds	r3, r0, r2
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:38
  64:	3204      	adds	r2, #4
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:37
  66:	7865      	ldrb	r5, [r4, #1]
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:36
  68:	4596      	cmp	lr, r2
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:37
  6a:	705d      	strb	r5, [r3, #1]
  6c:	78a5      	ldrb	r5, [r4, #2]
  6e:	709d      	strb	r5, [r3, #2]
  70:	78e4      	ldrb	r4, [r4, #3]
  72:	70dc      	strb	r4, [r3, #3]
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:36
  74:	d1f2      	bne.n	5c <__aeabi_memmove+0x5c>
  76:	f1bc 0f00 	cmp.w	ip, #0
  7a:	d029      	beq.n	d0 <__aeabi_memmove+0xd0>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:37
  7c:	5c8b      	ldrb	r3, [r1, r2]
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:36
  7e:	f1bc 0f01 	cmp.w	ip, #1
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:37
  82:	5483      	strb	r3, [r0, r2]
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:36
  84:	d024      	beq.n	d0 <__aeabi_memmove+0xd0>
  86:	1c53      	adds	r3, r2, #1
  88:	f1bc 0f02 	cmp.w	ip, #2
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:37
  8c:	5ccd      	ldrb	r5, [r1, r3]
  8e:	54c5      	strb	r5, [r0, r3]
__aeabi_memmove():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/arm.rs:165
  90:	bf08      	it	eq
  92:	bdb0      	popeq	{r4, r5, r7, pc}
memmove():
  94:	3202      	adds	r2, #2
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:37
  96:	5c89      	ldrb	r1, [r1, r2]
  98:	5481      	strb	r1, [r0, r2]
__aeabi_memmove():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/arm.rs:165
  9a:	bdb0      	pop	{r4, r5, r7, pc}
  9c:	4613      	mov	r3, r2
memmove():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:30
  9e:	f1bc 0f03 	cmp.w	ip, #3
  a2:	d315      	bcc.n	d0 <__aeabi_memmove+0xd0>
  a4:	f1a1 0c04 	sub.w	ip, r1, #4
  a8:	f1a0 0e02 	sub.w	lr, r0, #2
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:31
  ac:	eb0c 0103 	add.w	r1, ip, r3
  b0:	eb0e 0203 	add.w	r2, lr, r3
  b4:	78c8      	ldrb	r0, [r1, #3]
  b6:	7050      	strb	r0, [r2, #1]
  b8:	7888      	ldrb	r0, [r1, #2]
  ba:	f80e 0003 	strb.w	r0, [lr, r3]
  be:	7848      	ldrb	r0, [r1, #1]
  c0:	f802 0c01 	strb.w	r0, [r2, #-1]
  c4:	f81c 0003 	ldrb.w	r0, [ip, r3]
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:30
  c8:	3b04      	subs	r3, #4
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:31
  ca:	f802 0c02 	strb.w	r0, [r2, #-2]
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:29
  ce:	d1ed      	bne.n	ac <__aeabi_memmove+0xac>
__aeabi_memmove():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/arm.rs:165
  d0:	bdb0      	pop	{r4, r5, r7, pc}

Disassembly of section .text..Lanon.109065a98eeed0521bf961624aa4abd9.0:

00000000 <__aeabi_memmove4>:
__aeabi_memmove8():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/arm.rs:171
   0:	f7ff bffe 	b.w	0 <__aeabi_memmove4>

Disassembly of section .text.__aeabi_memset:

00000000 <__aeabi_memset>:
__aeabi_memset():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:47
   0:	2900      	cmp	r1, #0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/arm.rs:187
   2:	bf08      	it	eq
   4:	4770      	bxeq	lr
   6:	b580      	push	{r7, lr}
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:47
   8:	1e4b      	subs	r3, r1, #1
   a:	f001 0c03 	and.w	ip, r1, #3
   e:	2b03      	cmp	r3, #3
  10:	d201      	bcs.n	16 <__aeabi_memset+0x16>
  12:	2100      	movs	r1, #0
  14:	e00a      	b.n	2c <__aeabi_memset+0x2c>
  16:	eba1 0e0c 	sub.w	lr, r1, ip
  1a:	2100      	movs	r1, #0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:48
  1c:	5442      	strb	r2, [r0, r1]
  1e:	1843      	adds	r3, r0, r1
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:49
  20:	3104      	adds	r1, #4
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:47
  22:	458e      	cmp	lr, r1
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:48
  24:	70da      	strb	r2, [r3, #3]
  26:	709a      	strb	r2, [r3, #2]
  28:	705a      	strb	r2, [r3, #1]
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:47
  2a:	d1f7      	bne.n	1c <__aeabi_memset+0x1c>
  2c:	f1bc 0f00 	cmp.w	ip, #0
  30:	e8bd 4080 	ldmia.w	sp!, {r7, lr}
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:48
  34:	bf1c      	itt	ne
  36:	5442      	strbne	r2, [r0, r1]
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:47
  38:	f1bc 0f01 	cmpne.w	ip, #1
  3c:	d100      	bne.n	40 <__aeabi_memset+0x40>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/arm.rs:187
  3e:	4770      	bx	lr
offset<u8>():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ptr.rs:1697
  40:	4408      	add	r0, r1
__aeabi_memset():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:47
  42:	f1bc 0f02 	cmp.w	ip, #2
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/mem.rs:48
  46:	7042      	strb	r2, [r0, #1]
  48:	bf18      	it	ne
  4a:	7082      	strbne	r2, [r0, #2]
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/arm.rs:187
  4c:	4770      	bx	lr

Disassembly of section .text.__aeabi_memset4:

00000000 <__aeabi_memset4>:
__aeabi_memset4():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/arm.rs:192
   0:	4613      	mov	r3, r2
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/arm.rs:197
   2:	b2d2      	uxtb	r2, r2
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/arm.rs:200
   4:	2904      	cmp	r1, #4
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/arm.rs:206
   6:	bf38      	it	cc
   8:	f7ff bffe 	bcc.w	0 <__aeabi_memset4>
   c:	b510      	push	{r4, lr}
write<u32>():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ptr.rs:735
   e:	f1a1 0e04 	sub.w	lr, r1, #4
__aeabi_memset4():
  12:	ea42 6303 	orr.w	r3, r2, r3, lsl #24
  16:	2401      	movs	r4, #1
  18:	ea43 4302 	orr.w	r3, r3, r2, lsl #16
write<u32>():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ptr.rs:735
  1c:	eb04 049e 	add.w	r4, r4, lr, lsr #2
__aeabi_memset4():
  20:	ea43 2302 	orr.w	r3, r3, r2, lsl #8
write<u32>():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ptr.rs:735
  24:	f014 0403 	ands.w	r4, r4, #3
  28:	d00a      	beq.n	40 <__aeabi_memset4+0x40>
  2a:	4684      	mov	ip, r0
__aeabi_memset4():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/arm.rs:200
  2c:	2c01      	cmp	r4, #1
write<u32>():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ptr.rs:735
  2e:	f84c 3b04 	str.w	r3, [ip], #4
__aeabi_memset4():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/arm.rs:200
  32:	d10a      	bne.n	4a <__aeabi_memset4+0x4a>
  34:	4674      	mov	r4, lr
  36:	4660      	mov	r0, ip
write<u32>():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ptr.rs:735
  38:	f1be 0f0c 	cmp.w	lr, #12
  3c:	d214      	bcs.n	68 <__aeabi_memset4+0x68>
  3e:	e01c      	b.n	7a <__aeabi_memset4+0x7a>
  40:	460c      	mov	r4, r1
  42:	f1be 0f0c 	cmp.w	lr, #12
  46:	d318      	bcc.n	7a <__aeabi_memset4+0x7a>
  48:	e00e      	b.n	68 <__aeabi_memset4+0x68>
__aeabi_memset4():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/arm.rs:200
  4a:	2c02      	cmp	r4, #2
write<u32>():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ptr.rs:735
  4c:	6043      	str	r3, [r0, #4]
__aeabi_memset4():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/arm.rs:200
  4e:	d103      	bne.n	58 <__aeabi_memset4+0x58>
  50:	3008      	adds	r0, #8
  52:	f1a1 0408 	sub.w	r4, r1, #8
  56:	e003      	b.n	60 <__aeabi_memset4+0x60>
write<u32>():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ptr.rs:735
  58:	6083      	str	r3, [r0, #8]
offset<u32>():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ptr.rs:1697
  5a:	300c      	adds	r0, #12
__aeabi_memset4():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/arm.rs:203
  5c:	f1a1 040c 	sub.w	r4, r1, #12
  60:	4684      	mov	ip, r0
write<u32>():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ptr.rs:735
  62:	f1be 0f0c 	cmp.w	lr, #12
  66:	d308      	bcc.n	7a <__aeabi_memset4+0x7a>
  68:	e9c0 3300 	strd	r3, r3, [r0]
__aeabi_memset4():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/arm.rs:203
  6c:	3c10      	subs	r4, #16
write<u32>():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ptr.rs:735
  6e:	e9c0 3302 	strd	r3, r3, [r0, #8]
offset<u32>():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ptr.rs:1697
  72:	3010      	adds	r0, #16
__aeabi_memset4():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/arm.rs:200
  74:	2c03      	cmp	r4, #3
  76:	d8f7      	bhi.n	68 <__aeabi_memset4+0x68>
offset<u32>():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ptr.rs:1697
  78:	4684      	mov	ip, r0
write<u32>():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ptr.rs:735
  7a:	f001 0103 	and.w	r1, r1, #3
  7e:	e8bd 4010 	ldmia.w	sp!, {r4, lr}
__aeabi_memset4():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/arm.rs:206
  82:	4660      	mov	r0, ip
  84:	f7ff bffe 	b.w	0 <__aeabi_memset4>

Disassembly of section .text.__aeabi_memset8:

00000000 <__aeabi_memset8>:
__aeabi_memset8():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/arm.rs:213
   0:	f7ff bffe 	b.w	0 <__aeabi_memset8>

Disassembly of section .text.__aeabi_memclr:

00000000 <__aeabi_memclr>:
__aeabi_memclr():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/arm.rs:220
   0:	2200      	movs	r2, #0
   2:	f7ff bffe 	b.w	0 <__aeabi_memclr>

Disassembly of section .text..Lanon.109065a98eeed0521bf961624aa4abd9.1:

00000000 <__aeabi_memclr4>:
__aeabi_memclr8():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/arm.rs:227
   0:	2200      	movs	r2, #0
   2:	f7ff bffe 	b.w	0 <__aeabi_memclr4>

Disassembly of section .text._ZN17compiler_builtins3int6addsub13rust_i128_add17hc1690810c99a2fbaE:

00000000 <compiler_builtins::int::addsub::rust_i128_add>:
_ZN17compiler_builtins3int6addsub13rust_i128_add17hc1690810c99a2fbaE():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:293
   0:	b580      	push	{r7, lr}
   2:	e9dd ec04 	ldrd	lr, ip, [sp, #16]
wrapping_add():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2843
   6:	eb1e 0e02 	adds.w	lr, lr, r2
   a:	eb43 030c 	adc.w	r3, r3, ip
   e:	e9dd 2c02 	ldrd	r2, ip, [sp, #8]
overflowing_add():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:3123
  12:	1880      	adds	r0, r0, r2
  14:	eb51 010c 	adcs.w	r1, r1, ip
wrapping_add():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2843
  18:	f15e 0200 	adcs.w	r2, lr, #0
  1c:	f143 0300 	adc.w	r3, r3, #0
_ZN17compiler_builtins3int6addsub13rust_i128_add17hc1690810c99a2fbaE():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:295
  20:	bd80      	pop	{r7, pc}

Disassembly of section .text._ZN17compiler_builtins3int6addsub14rust_i128_addo17h7b6ea810664b46deE:

00000000 <compiler_builtins::int::addsub::rust_i128_addo>:
_ZN17compiler_builtins3int6addsub14rust_i128_addo17h7b6ea810664b46deE():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:293
   0:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
   4:	e9dd 8e06 	ldrd	r8, lr, [sp, #24]
   8:	2100      	movs	r1, #0
   a:	e9dd 4c0a 	ldrd	r4, ip, [sp, #40]	; 0x28
   e:	9e08      	ldr	r6, [sp, #32]
wrapping_add():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2843
  10:	eb14 0408 	adds.w	r4, r4, r8
  14:	9f09      	ldr	r7, [sp, #36]	; 0x24
  16:	eb4c 050e 	adc.w	r5, ip, lr
overflowing_add():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:3123
  1a:	18b6      	adds	r6, r6, r2
  1c:	415f      	adcs	r7, r3
_ZN17compiler_builtins3int6addsub14rust_i128_addo17h7b6ea810664b46deE():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:295
  1e:	6006      	str	r6, [r0, #0]
wrapping_add():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2843
  20:	f154 0400 	adcs.w	r4, r4, #0
_ZN17compiler_builtins3int6addsub14rust_i128_addo17h7b6ea810664b46deE():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:295
  24:	6047      	str	r7, [r0, #4]
wrapping_add():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2843
  26:	f145 0500 	adc.w	r5, r5, #0
addo<i128>():
  2a:	1ab2      	subs	r2, r6, r2
  2c:	eb77 0203 	sbcs.w	r2, r7, r3
_ZN17compiler_builtins3int6addsub14rust_i128_addo17h7b6ea810664b46deE():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:295
  30:	6084      	str	r4, [r0, #8]
addo<i128>():
  32:	eb74 0208 	sbcs.w	r2, r4, r8
_ZN17compiler_builtins3int6addsub14rust_i128_addo17h7b6ea810664b46deE():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:295
  36:	60c5      	str	r5, [r0, #12]
addo<i128>():
  38:	eb75 020e 	sbcs.w	r2, r5, lr
  3c:	f04f 0200 	mov.w	r2, #0
  40:	bfb8      	it	lt
  42:	2201      	movlt	r2, #1
ge():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/cmp.rs:978
  44:	f1bc 0f00 	cmp.w	ip, #0
  48:	bfb8      	it	lt
  4a:	2101      	movlt	r1, #1
addo<i128>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/addsub.rs:44
  4c:	4051      	eors	r1, r2
_ZN17compiler_builtins3int6addsub14rust_i128_addo17h7b6ea810664b46deE():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:295
  4e:	7401      	strb	r1, [r0, #16]
  50:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}

Disassembly of section .text._ZN17compiler_builtins3int6addsub14rust_u128_addo17h63ee12c6b1f04fdfE:

00000000 <compiler_builtins::int::addsub::rust_u128_addo>:
_ZN17compiler_builtins3int6addsub14rust_u128_addo17h63ee12c6b1f04fdfE():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:293
   0:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
   4:	e9dd 8c06 	ldrd	r8, ip, [sp, #24]
   8:	2700      	movs	r7, #0
   a:	e9dd 4e0a 	ldrd	r4, lr, [sp, #40]	; 0x28
   e:	9d08      	ldr	r5, [sp, #32]
wrapping_add():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2843
  10:	eb14 0408 	adds.w	r4, r4, r8
  14:	9e09      	ldr	r6, [sp, #36]	; 0x24
  16:	eb4e 010c 	adc.w	r1, lr, ip
overflowing_add():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:3123
  1a:	18ad      	adds	r5, r5, r2
  1c:	415e      	adcs	r6, r3
_ZN17compiler_builtins3int6addsub14rust_u128_addo17h63ee12c6b1f04fdfE():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:295
  1e:	6005      	str	r5, [r0, #0]
wrapping_add():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2843
  20:	f154 0400 	adcs.w	r4, r4, #0
_ZN17compiler_builtins3int6addsub14rust_u128_addo17h63ee12c6b1f04fdfE():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:295
  24:	6046      	str	r6, [r0, #4]
wrapping_add():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2843
  26:	f141 0100 	adc.w	r1, r1, #0
lt():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/cmp.rs:974
  2a:	1aaa      	subs	r2, r5, r2
  2c:	eb76 0203 	sbcs.w	r2, r6, r3
_ZN17compiler_builtins3int6addsub14rust_u128_addo17h63ee12c6b1f04fdfE():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:295
  30:	6084      	str	r4, [r0, #8]
lt():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/cmp.rs:974
  32:	eb74 0208 	sbcs.w	r2, r4, r8
_ZN17compiler_builtins3int6addsub14rust_u128_addo17h63ee12c6b1f04fdfE():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:295
  36:	60c1      	str	r1, [r0, #12]
lt():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/cmp.rs:974
  38:	eb71 010c 	sbcs.w	r1, r1, ip
  3c:	bf38      	it	cc
  3e:	2701      	movcc	r7, #1
_ZN17compiler_builtins3int6addsub14rust_u128_addo17h63ee12c6b1f04fdfE():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:295
  40:	7407      	strb	r7, [r0, #16]
  42:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}

Disassembly of section .text._ZN17compiler_builtins3int6addsub13rust_i128_sub17hb52b2568dc550873E:

00000000 <compiler_builtins::int::addsub::rust_i128_sub>:
_ZN17compiler_builtins3int6addsub13rust_i128_sub17hb52b2568dc550873E():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:293
   0:	b5f0      	push	{r4, r5, r6, r7, lr}
   2:	b081      	sub	sp, #4
   4:	9c06      	ldr	r4, [sp, #24]
   6:	f04f 0e00 	mov.w	lr, #0
   a:	f8dd c01c 	ldr.w	ip, [sp, #28]
overflowing_add():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:3123
   e:	4267      	negs	r7, r4
  10:	9e08      	ldr	r6, [sp, #32]
  12:	eb7e 0c0c 	sbcs.w	ip, lr, ip
  16:	9d09      	ldr	r5, [sp, #36]	; 0x24
  18:	f14e 0400 	adc.w	r4, lr, #0
  1c:	f1c4 0401 	rsb	r4, r4, #1
not():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:51
  20:	43f6      	mvns	r6, r6
overflowing_add():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:3123
  22:	f084 0401 	eor.w	r4, r4, #1
wrapping_add():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2843
  26:	1992      	adds	r2, r2, r6
not():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:51
  28:	ea6f 0505 	mvn.w	r5, r5
wrapping_add():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2843
  2c:	416b      	adcs	r3, r5
overflowing_add():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:3123
  2e:	1e66      	subs	r6, r4, #1
wrapping_add():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2843
  30:	f152 0200 	adcs.w	r2, r2, #0
  34:	f143 0300 	adc.w	r3, r3, #0
overflowing_add():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:3123
  38:	19c0      	adds	r0, r0, r7
  3a:	eb51 010c 	adcs.w	r1, r1, ip
wrapping_add():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2843
  3e:	f152 0200 	adcs.w	r2, r2, #0
  42:	f143 0300 	adc.w	r3, r3, #0
_ZN17compiler_builtins3int6addsub13rust_i128_sub17hb52b2568dc550873E():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:295
  46:	b001      	add	sp, #4
  48:	bdf0      	pop	{r4, r5, r6, r7, pc}

Disassembly of section .text._ZN17compiler_builtins3int6addsub14rust_i128_subo17h809f0ec4bb6a5987E:

00000000 <compiler_builtins::int::addsub::rust_i128_subo>:
_ZN17compiler_builtins3int6addsub14rust_i128_subo17h809f0ec4bb6a5987E():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:293
   0:	e92d 43f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, lr}
   4:	b081      	sub	sp, #4
   6:	990a      	ldr	r1, [sp, #40]	; 0x28
   8:	f04f 0e00 	mov.w	lr, #0
   c:	f8dd c02c 	ldr.w	ip, [sp, #44]	; 0x2c
overflowing_add():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:3123
  10:	4249      	negs	r1, r1
  12:	9f0c      	ldr	r7, [sp, #48]	; 0x30
  14:	eb7e 0c0c 	sbcs.w	ip, lr, ip
  18:	f8dd 8034 	ldr.w	r8, [sp, #52]	; 0x34
  1c:	f14e 0400 	adc.w	r4, lr, #0
  20:	e9dd 5908 	ldrd	r5, r9, [sp, #32]
  24:	f1c4 0401 	rsb	r4, r4, #1
not():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:51
  28:	43ff      	mvns	r7, r7
overflowing_add():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:3123
  2a:	f084 0401 	eor.w	r4, r4, #1
not():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:51
  2e:	ea6f 0608 	mvn.w	r6, r8
wrapping_add():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2843
  32:	197f      	adds	r7, r7, r5
  34:	eb46 0609 	adc.w	r6, r6, r9
overflowing_add():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:3123
  38:	3c01      	subs	r4, #1
wrapping_add():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2843
  3a:	f157 0400 	adcs.w	r4, r7, #0
  3e:	f146 0600 	adc.w	r6, r6, #0
overflowing_add():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:3123
  42:	1889      	adds	r1, r1, r2
  44:	eb53 070c 	adcs.w	r7, r3, ip
wrapping_add():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2843
  48:	f154 0400 	adcs.w	r4, r4, #0
  4c:	f146 0600 	adc.w	r6, r6, #0
_ZN17compiler_builtins3int6addsub14rust_i128_subo17h809f0ec4bb6a5987E():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:295
  50:	e9c0 1700 	strd	r1, r7, [r0]
subo<i128>():
  54:	1a51      	subs	r1, r2, r1
  56:	eb73 0107 	sbcs.w	r1, r3, r7
_ZN17compiler_builtins3int6addsub14rust_i128_subo17h809f0ec4bb6a5987E():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:295
  5a:	e9c0 4602 	strd	r4, r6, [r0, #8]
subo<i128>():
  5e:	eb75 0104 	sbcs.w	r1, r5, r4
  62:	eb79 0106 	sbcs.w	r1, r9, r6
  66:	f04f 0100 	mov.w	r1, #0
  6a:	bfb8      	it	lt
  6c:	2101      	movlt	r1, #1
ge():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/cmp.rs:978
  6e:	f1b8 0f00 	cmp.w	r8, #0
  72:	bfb8      	it	lt
  74:	f04f 0e01 	movlt.w	lr, #1
subo<i128>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/addsub.rs:66
  78:	ea81 010e 	eor.w	r1, r1, lr
_ZN17compiler_builtins3int6addsub14rust_i128_subo17h809f0ec4bb6a5987E():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:295
  7c:	7401      	strb	r1, [r0, #16]
  7e:	b001      	add	sp, #4
  80:	e8bd 83f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, pc}

Disassembly of section .text._ZN17compiler_builtins3int6addsub14rust_u128_subo17h4cf17d0e34c7d2ffE:

00000000 <compiler_builtins::int::addsub::rust_u128_subo>:
_ZN17compiler_builtins3int6addsub14rust_u128_subo17h4cf17d0e34c7d2ffE():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:293
   0:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
   4:	9908      	ldr	r1, [sp, #32]
   6:	f04f 0e00 	mov.w	lr, #0
   a:	f8dd c024 	ldr.w	ip, [sp, #36]	; 0x24
overflowing_add():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:3123
   e:	4249      	negs	r1, r1
  10:	9e0a      	ldr	r6, [sp, #40]	; 0x28
  12:	9d0b      	ldr	r5, [sp, #44]	; 0x2c
  14:	eb7e 0c0c 	sbcs.w	ip, lr, ip
  18:	f14e 0400 	adc.w	r4, lr, #0
  1c:	e9dd 7806 	ldrd	r7, r8, [sp, #24]
  20:	f1c4 0401 	rsb	r4, r4, #1
not():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:51
  24:	43f6      	mvns	r6, r6
overflowing_add():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:3123
  26:	f084 0401 	eor.w	r4, r4, #1
not():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:51
  2a:	43ed      	mvns	r5, r5
wrapping_add():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2843
  2c:	19f6      	adds	r6, r6, r7
  2e:	eb45 0508 	adc.w	r5, r5, r8
overflowing_add():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:3123
  32:	3c01      	subs	r4, #1
wrapping_add():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2843
  34:	f156 0400 	adcs.w	r4, r6, #0
  38:	f145 0500 	adc.w	r5, r5, #0
overflowing_add():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:3123
  3c:	1889      	adds	r1, r1, r2
  3e:	eb53 060c 	adcs.w	r6, r3, ip
wrapping_add():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2843
  42:	f154 0400 	adcs.w	r4, r4, #0
  46:	f145 0500 	adc.w	r5, r5, #0
_ZN17compiler_builtins3int6addsub14rust_u128_subo17h4cf17d0e34c7d2ffE():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:295
  4a:	e9c0 1600 	strd	r1, r6, [r0]
gt():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/cmp.rs:980
  4e:	1a51      	subs	r1, r2, r1
  50:	eb73 0106 	sbcs.w	r1, r3, r6
_ZN17compiler_builtins3int6addsub14rust_u128_subo17h4cf17d0e34c7d2ffE():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:295
  54:	e9c0 4502 	strd	r4, r5, [r0, #8]
gt():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/cmp.rs:980
  58:	eb77 0104 	sbcs.w	r1, r7, r4
  5c:	eb78 0105 	sbcs.w	r1, r8, r5
  60:	bf38      	it	cc
  62:	f04f 0e01 	movcc.w	lr, #1
_ZN17compiler_builtins3int6addsub14rust_u128_subo17h4cf17d0e34c7d2ffE():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:295
  66:	f880 e010 	strb.w	lr, [r0, #16]
  6a:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}

Disassembly of section .text.__muldi3:

00000000 <__muldi3>:
__muldi3():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:214
   0:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
bitand():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:135
   4:	fa1f fc80 	uxth.w	ip, r0
   8:	fa1f fe82 	uxth.w	lr, r2
shr():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:505
   c:	0c05      	lsrs	r5, r0, #16
wrapping_mul():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2884
   e:	fb0e f80c 	mul.w	r8, lr, ip
shr():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:505
  12:	0c17      	lsrs	r7, r2, #16
wrapping_mul():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2884
  14:	fb0e f405 	mul.w	r4, lr, r5
  18:	4351      	muls	r1, r2
add_assign():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/arith.rs:698
  1a:	eb04 4418 	add.w	r4, r4, r8, lsr #16
  1e:	fb07 1105 	mla	r1, r7, r5, r1
shr():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:505
  22:	fa1f fe84 	uxth.w	lr, r4
add_assign():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/arith.rs:698
  26:	fb03 1000 	mla	r0, r3, r0, r1
  2a:	fb07 e60c 	mla	r6, r7, ip, lr
wrapping_add():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2843
  2e:	eb00 4014 	add.w	r0, r0, r4, lsr #16
  32:	eb00 4116 	add.w	r1, r0, r6, lsr #16
bitand_assign():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:612
  36:	fa1f f088 	uxth.w	r0, r8
add_assign():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/arith.rs:698
  3a:	ea40 4006 	orr.w	r0, r0, r6, lsl #16
__muldi3():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:216
  3e:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}

Disassembly of section .text.__aeabi_lmul:

00000000 <__aeabi_lmul>:
__aeabi_lmul():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:254
   0:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
bitand():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:135
   4:	fa1f fc80 	uxth.w	ip, r0
   8:	fa1f fe82 	uxth.w	lr, r2
shr():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:505
   c:	0c05      	lsrs	r5, r0, #16
wrapping_mul():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2884
   e:	fb0e f80c 	mul.w	r8, lr, ip
shr():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:505
  12:	0c17      	lsrs	r7, r2, #16
wrapping_mul():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2884
  14:	fb0e f405 	mul.w	r4, lr, r5
  18:	4351      	muls	r1, r2
add_assign():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/arith.rs:698
  1a:	eb04 4418 	add.w	r4, r4, r8, lsr #16
  1e:	fb07 1105 	mla	r1, r7, r5, r1
shr():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:505
  22:	fa1f fe84 	uxth.w	lr, r4
add_assign():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/arith.rs:698
  26:	fb03 1000 	mla	r0, r3, r0, r1
  2a:	fb07 e60c 	mla	r6, r7, ip, lr
wrapping_add():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2843
  2e:	eb00 4014 	add.w	r0, r0, r4, lsr #16
  32:	eb00 4116 	add.w	r1, r0, r6, lsr #16
bitand_assign():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:612
  36:	fa1f f088 	uxth.w	r0, r8
add_assign():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/arith.rs:698
  3a:	ea40 4006 	orr.w	r0, r0, r6, lsl #16
__aeabi_lmul():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
  3e:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}

Disassembly of section .text.__multi3:

00000000 <__multi3>:
__multi3():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:254
   0:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
   4:	9e06      	ldr	r6, [sp, #24]
   6:	f8dd 801c 	ldr.w	r8, [sp, #28]
wrapping_mul():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:1047
   a:	fba6 5402 	umull	r5, r4, r6, r2
   e:	fb06 4303 	mla	r3, r6, r3, r4
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2884
  12:	fba6 ce00 	umull	ip, lr, r6, r0
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:1047
  16:	fb08 3302 	mla	r3, r8, r2, r3
  1a:	9a08      	ldr	r2, [sp, #32]
add_assign():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/arith.rs:698
  1c:	fbe8 5301 	umlal	r5, r3, r8, r1
wrapping_mul():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:1047
  20:	fba2 4700 	umull	r4, r7, r2, r0
  24:	fb02 7201 	mla	r2, r2, r1, r7
  28:	9f09      	ldr	r7, [sp, #36]	; 0x24
  2a:	fb07 2700 	mla	r7, r7, r0, r2
add_assign():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/arith.rs:698
  2e:	192a      	adds	r2, r5, r4
wrapping_mul():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2884
  30:	fba6 4501 	umull	r4, r5, r6, r1
add_assign():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/arith.rs:698
  34:	417b      	adcs	r3, r7
  36:	eb14 040e 	adds.w	r4, r4, lr
wrapping_add():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:1006
  3a:	eb52 0405 	adcs.w	r4, r2, r5
add_assign():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/arith.rs:698
  3e:	fbe6 e201 	umlal	lr, r2, r6, r1
wrapping_add():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:1006
  42:	f143 0300 	adc.w	r3, r3, #0
wrapping_mul():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2884
  46:	fba8 1400 	umull	r1, r4, r8, r0
add_assign():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/arith.rs:698
  4a:	eb11 010e 	adds.w	r1, r1, lr
wrapping_add():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:1006
  4e:	eb52 0104 	adcs.w	r1, r2, r4
add_assign():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/arith.rs:698
  52:	fbe8 e200 	umlal	lr, r2, r8, r0
wrapping_add():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:1006
  56:	f143 0300 	adc.w	r3, r3, #0
__multi3():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
  5a:	4660      	mov	r0, ip
  5c:	4671      	mov	r1, lr
  5e:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}

Disassembly of section .text.__mulosi4:

00000000 <__mulosi4>:
__mulosi4():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:254
   0:	b510      	push	{r4, lr}
   2:	4604      	mov	r4, r0
   4:	2000      	movs	r0, #0
mulo<i32>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mul.rs:33
   6:	6010      	str	r0, [r2, #0]
wrapping_mul():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:1047
   8:	fb01 f004 	mul.w	r0, r1, r4
mulo<i32>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mul.rs:35
   c:	f1b4 4f00 	cmp.w	r4, #2147483648	; 0x80000000
  10:	d102      	bne.n	18 <__mulosi4+0x18>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mul.rs:36
  12:	2902      	cmp	r1, #2
  14:	d314      	bcc.n	40 <__mulosi4+0x40>
  16:	e026      	b.n	66 <__mulosi4+0x66>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mul.rs:41
  18:	f1b1 4f00 	cmp.w	r1, #2147483648	; 0x80000000
  1c:	d102      	bne.n	24 <__mulosi4+0x24>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mul.rs:42
  1e:	2c02      	cmp	r4, #2
  20:	d30e      	bcc.n	40 <__mulosi4+0x40>
  22:	e020      	b.n	66 <__mulosi4+0x66>
bitxor():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:306
  24:	ea84 73e4 	eor.w	r3, r4, r4, asr #31
sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/arith.rs:198
  28:	eba3 7ce4 	sub.w	ip, r3, r4, asr #31
mulo<i32>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mul.rs:53
  2c:	f1bc 0f02 	cmp.w	ip, #2
  30:	bfa2      	ittt	ge
  32:	ea81 73e1 	eorge.w	r3, r1, r1, asr #31
  36:	eba3 7ee1 	subge.w	lr, r3, r1, asr #31
  3a:	f1be 0f02 	cmpge.w	lr, #2
  3e:	da00      	bge.n	42 <__mulosi4+0x42>
__mulosi4():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
  40:	bd10      	pop	{r4, pc}
mulo<i32>():
  42:	17c9      	asrs	r1, r1, #31
  44:	17e3      	asrs	r3, r4, #31
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mul.rs:56
  46:	428b      	cmp	r3, r1
  48:	d104      	bne.n	54 <__mulosi4+0x54>
  4a:	f06f 4100 	mvn.w	r1, #2147483648	; 0x80000000
checked_div():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:673
  4e:	fbb1 f1fe 	udiv	r1, r1, lr
  52:	e005      	b.n	60 <__mulosi4+0x60>
neg():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/arith.rs:637
  54:	f1ce 0100 	rsb	r1, lr, #0
  58:	f04f 4300 	mov.w	r3, #2147483648	; 0x80000000
checked_div():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:673
  5c:	fb93 f1f1 	sdiv	r1, r3, r1
mulo<i32>():
  60:	458c      	cmp	ip, r1
__mulosi4():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
  62:	bfd8      	it	le
  64:	bd10      	pople	{r4, pc}
  66:	2101      	movs	r1, #1
mulo<i32>():
  68:	6011      	str	r1, [r2, #0]
__mulosi4():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
  6a:	bd10      	pop	{r4, pc}

Disassembly of section .text.__mulodi4:

00000000 <__mulodi4>:
__mulodi4():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:254
   0:	e92d 43f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, lr}
   4:	b081      	sub	sp, #4
   6:	9e08      	ldr	r6, [sp, #32]
   8:	2700      	movs	r7, #0
mulo<i64>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mul.rs:33
   a:	6037      	str	r7, [r6, #0]
wrapping_mul():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:1047
   c:	fba2 4700 	umull	r4, r7, r2, r0
  10:	fb02 7701 	mla	r7, r2, r1, r7
  14:	fb03 7500 	mla	r5, r3, r0, r7
eq():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/cmp.rs:894
  18:	f081 4700 	eor.w	r7, r1, #2147483648	; 0x80000000
  1c:	4307      	orrs	r7, r0
mulo<i64>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mul.rs:35
  1e:	d104      	bne.n	2a <__mulodi4+0x2a>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mul.rs:36
  20:	1e90      	subs	r0, r2, #2
  22:	f173 0000 	sbcs.w	r0, r3, #0
  26:	d23f      	bcs.n	a8 <__mulodi4+0xa8>
  28:	e040      	b.n	ac <__mulodi4+0xac>
  2a:	f04f 4700 	mov.w	r7, #2147483648	; 0x80000000
eq():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/cmp.rs:894
  2e:	405f      	eors	r7, r3
  30:	4317      	orrs	r7, r2
mulo<i64>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mul.rs:41
  32:	d104      	bne.n	3e <__mulodi4+0x3e>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mul.rs:42
  34:	3802      	subs	r0, #2
  36:	f171 0000 	sbcs.w	r0, r1, #0
  3a:	d235      	bcs.n	a8 <__mulodi4+0xa8>
  3c:	e036      	b.n	ac <__mulodi4+0xac>
bitxor():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:306
  3e:	ea82 72e3 	eor.w	r2, r2, r3, asr #31
  42:	ea83 77e3 	eor.w	r7, r3, r3, asr #31
sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/arith.rs:198
  46:	ebb2 72e3 	subs.w	r2, r2, r3, asr #31
bitxor():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:306
  4a:	ea80 70e1 	eor.w	r0, r0, r1, asr #31
sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/arith.rs:198
  4e:	eb67 7ce3 	sbc.w	ip, r7, r3, asr #31
bitxor():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:306
  52:	ea81 77e1 	eor.w	r7, r1, r1, asr #31
sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/arith.rs:198
  56:	ebb0 79e1 	subs.w	r9, r0, r1, asr #31
  5a:	eb67 78e1 	sbc.w	r8, r7, r1, asr #31
lt():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/cmp.rs:974
  5e:	f1b9 0002 	subs.w	r0, r9, #2
  62:	f178 0000 	sbcs.w	r0, r8, #0
mulo<i64>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mul.rs:53
  66:	db21      	blt.n	ac <__mulodi4+0xac>
  68:	1e90      	subs	r0, r2, #2
  6a:	f17c 0000 	sbcs.w	r0, ip, #0
  6e:	db1d      	blt.n	ac <__mulodi4+0xac>
  70:	17d8      	asrs	r0, r3, #31
  72:	17c9      	asrs	r1, r1, #31
eq():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/cmp.rs:894
  74:	4048      	eors	r0, r1
  76:	4300      	orrs	r0, r0
mulo<i64>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mul.rs:56
  78:	d107      	bne.n	8a <__mulodi4+0x8a>
checked_div():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:673
  7a:	f04f 30ff 	mov.w	r0, #4294967295	; 0xffffffff
  7e:	f06f 4100 	mvn.w	r1, #2147483648	; 0x80000000
  82:	4663      	mov	r3, ip
  84:	f7ff fffe 	bl	0 <__mulodi4>
  88:	e009      	b.n	9e <__mulodi4+0x9e>
neg():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/arith.rs:637
  8a:	4252      	negs	r2, r2
  8c:	f04f 0000 	mov.w	r0, #0
  90:	eb60 030c 	sbc.w	r3, r0, ip
checked_div():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:673
  94:	2000      	movs	r0, #0
  96:	f04f 4100 	mov.w	r1, #2147483648	; 0x80000000
  9a:	f7ff fffe 	bl	0 <__mulodi4>
mulo<i64>():
  9e:	ebb0 0009 	subs.w	r0, r0, r9
  a2:	eb71 0008 	sbcs.w	r0, r1, r8
  a6:	da01      	bge.n	ac <__mulodi4+0xac>
  a8:	2001      	movs	r0, #1
  aa:	6030      	str	r0, [r6, #0]
__mulodi4():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
  ac:	4620      	mov	r0, r4
  ae:	4629      	mov	r1, r5
  b0:	b001      	add	sp, #4
  b2:	e8bd 83f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, pc}

Disassembly of section .text.__muloti4:

00000000 <__muloti4>:
__muloti4():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:254
   0:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
   4:	b089      	sub	sp, #36	; 0x24
   6:	460f      	mov	r7, r1
wrapping_mul():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:1047
   8:	e88d 000f 	stmia.w	sp, {r0, r1, r2, r3}
   c:	4680      	mov	r8, r0
   e:	9916      	ldr	r1, [sp, #88]	; 0x58
  10:	2000      	movs	r0, #0
  12:	f10d 0b48 	add.w	fp, sp, #72	; 0x48
  16:	9d15      	ldr	r5, [sp, #84]	; 0x54
  18:	461c      	mov	r4, r3
  1a:	4616      	mov	r6, r2
mulo<i128>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mul.rs:33
  1c:	6008      	str	r0, [r1, #0]
  1e:	e89b 0e00 	ldmia.w	fp, {r9, sl, fp}
wrapping_mul():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:1047
  22:	4651      	mov	r1, sl
  24:	465a      	mov	r2, fp
  26:	462b      	mov	r3, r5
  28:	4648      	mov	r0, r9
  2a:	f7ff fffe 	bl	0 <__muloti4>
  2e:	9008      	str	r0, [sp, #32]
eq():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/cmp.rs:894
  30:	ea48 0006 	orr.w	r0, r8, r6
wrapping_mul():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:1047
  34:	e9cd 2106 	strd	r2, r1, [sp, #24]
eq():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/cmp.rs:894
  38:	f084 4100 	eor.w	r1, r4, #2147483648	; 0x80000000
  3c:	4339      	orrs	r1, r7
  3e:	4308      	orrs	r0, r1
mulo<i128>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mul.rs:35
  40:	d109      	bne.n	56 <__muloti4+0x56>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mul.rs:36
  42:	f1b9 0002 	subs.w	r0, r9, #2
  46:	f17a 0000 	sbcs.w	r0, sl, #0
  4a:	f17b 0000 	sbcs.w	r0, fp, #0
  4e:	f175 0000 	sbcs.w	r0, r5, #0
  52:	d278      	bcs.n	146 <__muloti4+0x146>
  54:	e07a      	b.n	14c <__muloti4+0x14c>
  56:	f04f 4000 	mov.w	r0, #2147483648	; 0x80000000
eq():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/cmp.rs:894
  5a:	ea49 010b 	orr.w	r1, r9, fp
  5e:	4068      	eors	r0, r5
  60:	ea40 000a 	orr.w	r0, r0, sl
  64:	4308      	orrs	r0, r1
mulo<i128>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mul.rs:41
  66:	d109      	bne.n	7c <__muloti4+0x7c>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mul.rs:42
  68:	f1b8 0002 	subs.w	r0, r8, #2
  6c:	f177 0000 	sbcs.w	r0, r7, #0
  70:	f176 0000 	sbcs.w	r0, r6, #0
  74:	f174 0000 	sbcs.w	r0, r4, #0
  78:	d265      	bcs.n	146 <__muloti4+0x146>
  7a:	e067      	b.n	14c <__muloti4+0x14c>
bitxor():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:306
  7c:	ea89 72e5 	eor.w	r2, r9, r5, asr #31
  80:	ea8a 71e5 	eor.w	r1, sl, r5, asr #31
sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/arith.rs:198
  84:	ebb2 72e5 	subs.w	r2, r2, r5, asr #31
bitxor():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:306
  88:	ea8b 70e5 	eor.w	r0, fp, r5, asr #31
sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/arith.rs:198
  8c:	eb71 71e5 	sbcs.w	r1, r1, r5, asr #31
  90:	9305      	str	r3, [sp, #20]
  92:	eb70 7ee5 	sbcs.w	lr, r0, r5, asr #31
bitxor():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:306
  96:	ea85 73e5 	eor.w	r3, r5, r5, asr #31
sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/arith.rs:198
  9a:	eb63 7ce5 	sbc.w	ip, r3, r5, asr #31
bitxor():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:306
  9e:	ea88 73e4 	eor.w	r3, r8, r4, asr #31
sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/arith.rs:198
  a2:	ebb3 7be4 	subs.w	fp, r3, r4, asr #31
bitxor():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:306
  a6:	ea87 77e4 	eor.w	r7, r7, r4, asr #31
  aa:	ea86 76e4 	eor.w	r6, r6, r4, asr #31
sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/arith.rs:198
  ae:	eb77 7ae4 	sbcs.w	sl, r7, r4, asr #31
bitxor():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:306
  b2:	ea84 70e4 	eor.w	r0, r4, r4, asr #31
sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/arith.rs:198
  b6:	eb76 79e4 	sbcs.w	r9, r6, r4, asr #31
  ba:	eb60 78e4 	sbc.w	r8, r0, r4, asr #31
lt():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/cmp.rs:974
  be:	f1bb 0002 	subs.w	r0, fp, #2
  c2:	f17a 0000 	sbcs.w	r0, sl, #0
  c6:	9b05      	ldr	r3, [sp, #20]
  c8:	f179 0000 	sbcs.w	r0, r9, #0
  cc:	f178 0000 	sbcs.w	r0, r8, #0
mulo<i128>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mul.rs:53
  d0:	db3c      	blt.n	14c <__muloti4+0x14c>
  d2:	1e90      	subs	r0, r2, #2
  d4:	f171 0000 	sbcs.w	r0, r1, #0
  d8:	f17e 0000 	sbcs.w	r0, lr, #0
  dc:	f17c 0000 	sbcs.w	r0, ip, #0
  e0:	db34      	blt.n	14c <__muloti4+0x14c>
  e2:	17e8      	asrs	r0, r5, #31
  e4:	17e3      	asrs	r3, r4, #31
eq():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/cmp.rs:894
  e6:	4058      	eors	r0, r3
  e8:	4300      	orrs	r0, r0
  ea:	4300      	orrs	r0, r0
mulo<i128>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mul.rs:56
  ec:	d10e      	bne.n	10c <__muloti4+0x10c>
checked_div():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:673
  ee:	e9cd 2100 	strd	r2, r1, [sp]
  f2:	f04f 30ff 	mov.w	r0, #4294967295	; 0xffffffff
  f6:	f04f 31ff 	mov.w	r1, #4294967295	; 0xffffffff
  fa:	f04f 32ff 	mov.w	r2, #4294967295	; 0xffffffff
  fe:	f06f 4300 	mvn.w	r3, #2147483648	; 0x80000000
 102:	e9cd ec02 	strd	lr, ip, [sp, #8]
 106:	f7ff fffe 	bl	0 <__muloti4>
 10a:	e012      	b.n	132 <__muloti4+0x132>
neg():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/arith.rs:637
 10c:	4250      	negs	r0, r2
 10e:	f04f 0200 	mov.w	r2, #0
 112:	eb72 0101 	sbcs.w	r1, r2, r1
 116:	eb72 030e 	sbcs.w	r3, r2, lr
checked_div():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:673
 11a:	e88d 000b 	stmia.w	sp, {r0, r1, r3}
neg():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/arith.rs:637
 11e:	eb62 020c 	sbc.w	r2, r2, ip
checked_div():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:673
 122:	9203      	str	r2, [sp, #12]
 124:	2000      	movs	r0, #0
 126:	2100      	movs	r1, #0
 128:	2200      	movs	r2, #0
 12a:	f04f 4300 	mov.w	r3, #2147483648	; 0x80000000
 12e:	f7ff fffe 	bl	0 <__muloti4>
mulo<i128>():
 132:	ebb0 000b 	subs.w	r0, r0, fp
 136:	eb71 000a 	sbcs.w	r0, r1, sl
 13a:	eb72 0009 	sbcs.w	r0, r2, r9
 13e:	eb73 0008 	sbcs.w	r0, r3, r8
 142:	9b05      	ldr	r3, [sp, #20]
 144:	da02      	bge.n	14c <__muloti4+0x14c>
 146:	9916      	ldr	r1, [sp, #88]	; 0x58
 148:	2001      	movs	r0, #1
 14a:	6008      	str	r0, [r1, #0]
__muloti4():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
 14c:	9808      	ldr	r0, [sp, #32]
 14e:	e9dd 2106 	ldrd	r2, r1, [sp, #24]
 152:	b009      	add	sp, #36	; 0x24
 154:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}

Disassembly of section .text._ZN17compiler_builtins3int3mul13rust_i128_mul17hee060e4cf574d250E:

00000000 <compiler_builtins::int::mul::rust_i128_mul>:
_ZN17compiler_builtins3int3mul13rust_i128_mul17hee060e4cf574d250E():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:293
   0:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
   4:	9e06      	ldr	r6, [sp, #24]
   6:	f8dd 801c 	ldr.w	r8, [sp, #28]
wrapping_mul():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:1047
   a:	fba6 5402 	umull	r5, r4, r6, r2
   e:	fb06 4303 	mla	r3, r6, r3, r4
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2884
  12:	fba6 ce00 	umull	ip, lr, r6, r0
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:1047
  16:	fb08 3302 	mla	r3, r8, r2, r3
  1a:	9a08      	ldr	r2, [sp, #32]
add_assign():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/arith.rs:698
  1c:	fbe8 5301 	umlal	r5, r3, r8, r1
wrapping_mul():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:1047
  20:	fba2 4700 	umull	r4, r7, r2, r0
  24:	fb02 7201 	mla	r2, r2, r1, r7
  28:	9f09      	ldr	r7, [sp, #36]	; 0x24
  2a:	fb07 2700 	mla	r7, r7, r0, r2
add_assign():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/arith.rs:698
  2e:	192a      	adds	r2, r5, r4
wrapping_mul():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2884
  30:	fba6 4501 	umull	r4, r5, r6, r1
add_assign():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/arith.rs:698
  34:	417b      	adcs	r3, r7
  36:	eb14 040e 	adds.w	r4, r4, lr
wrapping_add():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:1006
  3a:	eb52 0405 	adcs.w	r4, r2, r5
add_assign():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/arith.rs:698
  3e:	fbe6 e201 	umlal	lr, r2, r6, r1
wrapping_add():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:1006
  42:	f143 0300 	adc.w	r3, r3, #0
wrapping_mul():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2884
  46:	fba8 1400 	umull	r1, r4, r8, r0
add_assign():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/arith.rs:698
  4a:	eb11 010e 	adds.w	r1, r1, lr
wrapping_add():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:1006
  4e:	eb52 0104 	adcs.w	r1, r2, r4
add_assign():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/arith.rs:698
  52:	fbe8 e200 	umlal	lr, r2, r8, r0
wrapping_add():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:1006
  56:	f143 0300 	adc.w	r3, r3, #0
_ZN17compiler_builtins3int3mul13rust_i128_mul17hee060e4cf574d250E():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:295
  5a:	4660      	mov	r0, ip
  5c:	4671      	mov	r1, lr
  5e:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}

Disassembly of section .text._ZN17compiler_builtins3int3mul14rust_i128_mulo17h7dbac307fda3729eE:

00000000 <compiler_builtins::int::mul::rust_i128_mulo>:
_ZN17compiler_builtins3int3mul14rust_i128_mulo17h7dbac307fda3729eE():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:293
   0:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
   4:	b089      	sub	sp, #36	; 0x24
   6:	f8dd 805c 	ldr.w	r8, [sp, #92]	; 0x5c
   a:	f10d 0a50 	add.w	sl, sp, #80	; 0x50
   e:	9e13      	ldr	r6, [sp, #76]	; 0x4c
  10:	461f      	mov	r7, r3
wrapping_mul():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:1047
  12:	9603      	str	r6, [sp, #12]
  14:	4615      	mov	r5, r2
  16:	f8dd b048 	ldr.w	fp, [sp, #72]	; 0x48
  1a:	4604      	mov	r4, r0
  1c:	e88d 080c 	stmia.w	sp, {r2, r3, fp}
  20:	4643      	mov	r3, r8
  22:	e89a 0601 	ldmia.w	sl, {r0, r9, sl}
  26:	4649      	mov	r1, r9
  28:	4652      	mov	r2, sl
  2a:	f7ff fffe 	bl	0 <compiler_builtins::int::mul::rust_i128_mulo>
  2e:	9108      	str	r1, [sp, #32]
eq():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/cmp.rs:894
  30:	f086 4100 	eor.w	r1, r6, #2147483648	; 0x80000000
wrapping_mul():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:1047
  34:	e9cd 0206 	strd	r0, r2, [sp, #24]
eq():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/cmp.rs:894
  38:	ea45 000b 	orr.w	r0, r5, fp
  3c:	4339      	orrs	r1, r7
  3e:	4308      	orrs	r0, r1
mulo<i128>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mul.rs:35
  40:	d10e      	bne.n	60 <compiler_builtins::int::mul::rust_i128_mulo+0x60>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mul.rs:36
  42:	9814      	ldr	r0, [sp, #80]	; 0x50
  44:	f04f 0b00 	mov.w	fp, #0
  48:	f1d0 0001 	rsbs	r0, r0, #1
  4c:	eb7b 0009 	sbcs.w	r0, fp, r9
  50:	eb7b 000a 	sbcs.w	r0, fp, sl
  54:	eb7b 0008 	sbcs.w	r0, fp, r8
  58:	bf38      	it	cc
  5a:	f04f 0b01 	movcc.w	fp, #1
  5e:	e084      	b.n	16a <compiler_builtins::int::mul::rust_i128_mulo+0x16a>
  60:	f04f 4000 	mov.w	r0, #2147483648	; 0x80000000
  64:	9a14      	ldr	r2, [sp, #80]	; 0x50
eq():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/cmp.rs:894
  66:	ea80 0008 	eor.w	r0, r0, r8
  6a:	ea42 010a 	orr.w	r1, r2, sl
  6e:	ea40 0009 	orr.w	r0, r0, r9
  72:	4308      	orrs	r0, r1
mulo<i128>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mul.rs:41
  74:	d10e      	bne.n	94 <compiler_builtins::int::mul::rust_i128_mulo+0x94>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mul.rs:42
  76:	f1d5 0001 	rsbs	r0, r5, #1
  7a:	4659      	mov	r1, fp
  7c:	f04f 0b00 	mov.w	fp, #0
  80:	eb7b 0007 	sbcs.w	r0, fp, r7
  84:	eb7b 0001 	sbcs.w	r0, fp, r1
  88:	eb7b 0006 	sbcs.w	r0, fp, r6
  8c:	bf38      	it	cc
  8e:	f04f 0b01 	movcc.w	fp, #1
  92:	e06a      	b.n	16a <compiler_builtins::int::mul::rust_i128_mulo+0x16a>
bitxor():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:306
  94:	ea82 72e8 	eor.w	r2, r2, r8, asr #31
  98:	ea89 71e8 	eor.w	r1, r9, r8, asr #31
sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/arith.rs:198
  9c:	ebb2 72e8 	subs.w	r2, r2, r8, asr #31
bitxor():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:306
  a0:	ea8a 70e8 	eor.w	r0, sl, r8, asr #31
sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/arith.rs:198
  a4:	eb71 71e8 	sbcs.w	r1, r1, r8, asr #31
  a8:	9305      	str	r3, [sp, #20]
  aa:	eb70 7ee8 	sbcs.w	lr, r0, r8, asr #31
bitxor():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:306
  ae:	ea88 73e8 	eor.w	r3, r8, r8, asr #31
  b2:	ea85 75e6 	eor.w	r5, r5, r6, asr #31
sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/arith.rs:198
  b6:	eb63 7ce8 	sbc.w	ip, r3, r8, asr #31
bitxor():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:306
  ba:	ea87 77e6 	eor.w	r7, r7, r6, asr #31
sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/arith.rs:198
  be:	ebb5 75e6 	subs.w	r5, r5, r6, asr #31
bitxor():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:306
  c2:	ea8b 73e6 	eor.w	r3, fp, r6, asr #31
sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/arith.rs:198
  c6:	eb77 77e6 	sbcs.w	r7, r7, r6, asr #31
bitxor():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:306
  ca:	ea86 70e6 	eor.w	r0, r6, r6, asr #31
sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/arith.rs:198
  ce:	eb73 79e6 	sbcs.w	r9, r3, r6, asr #31
  d2:	46b2      	mov	sl, r6
  d4:	eb60 76e6 	sbc.w	r6, r0, r6, asr #31
lt():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/cmp.rs:974
  d8:	1ea8      	subs	r0, r5, #2
  da:	f04f 0b00 	mov.w	fp, #0
  de:	f177 0000 	sbcs.w	r0, r7, #0
  e2:	f179 0000 	sbcs.w	r0, r9, #0
  e6:	f176 0000 	sbcs.w	r0, r6, #0
mulo<i128>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mul.rs:53
  ea:	db3d      	blt.n	168 <compiler_builtins::int::mul::rust_i128_mulo+0x168>
  ec:	1e90      	subs	r0, r2, #2
  ee:	9b05      	ldr	r3, [sp, #20]
  f0:	f171 0000 	sbcs.w	r0, r1, #0
  f4:	f17e 0000 	sbcs.w	r0, lr, #0
  f8:	f17c 0000 	sbcs.w	r0, ip, #0
  fc:	db35      	blt.n	16a <compiler_builtins::int::mul::rust_i128_mulo+0x16a>
  fe:	ea4f 70e8 	mov.w	r0, r8, asr #31
 102:	ea4f 73ea 	mov.w	r3, sl, asr #31
eq():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/cmp.rs:894
 106:	4058      	eors	r0, r3
 108:	4300      	orrs	r0, r0
 10a:	4300      	orrs	r0, r0
mulo<i128>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mul.rs:56
 10c:	d110      	bne.n	130 <compiler_builtins::int::mul::rust_i128_mulo+0x130>
checked_div():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:673
 10e:	e9cd 2100 	strd	r2, r1, [sp]
 112:	f04f 30ff 	mov.w	r0, #4294967295	; 0xffffffff
 116:	f04f 31ff 	mov.w	r1, #4294967295	; 0xffffffff
 11a:	f04f 32ff 	mov.w	r2, #4294967295	; 0xffffffff
 11e:	f06f 4300 	mvn.w	r3, #2147483648	; 0x80000000
 122:	e9cd ec02 	strd	lr, ip, [sp, #8]
 126:	f7ff fffe 	bl	0 <compiler_builtins::int::mul::rust_i128_mulo>
 12a:	f04f 0b00 	mov.w	fp, #0
 12e:	e011      	b.n	154 <compiler_builtins::int::mul::rust_i128_mulo+0x154>
neg():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/arith.rs:637
 130:	4250      	negs	r0, r2
 132:	f04f 0b00 	mov.w	fp, #0
 136:	eb7b 0101 	sbcs.w	r1, fp, r1
 13a:	eb7b 020e 	sbcs.w	r2, fp, lr
 13e:	eb6b 030c 	sbc.w	r3, fp, ip
checked_div():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:673
 142:	e88d 000f 	stmia.w	sp, {r0, r1, r2, r3}
 146:	2000      	movs	r0, #0
 148:	2100      	movs	r1, #0
 14a:	2200      	movs	r2, #0
 14c:	f04f 4300 	mov.w	r3, #2147483648	; 0x80000000
 150:	f7ff fffe 	bl	0 <compiler_builtins::int::mul::rust_i128_mulo>
mulo<i128>():
 154:	1b40      	subs	r0, r0, r5
 156:	eb71 0007 	sbcs.w	r0, r1, r7
 15a:	eb72 0009 	sbcs.w	r0, r2, r9
 15e:	eb73 0006 	sbcs.w	r0, r3, r6
 162:	bfb8      	it	lt
 164:	f04f 0b01 	movlt.w	fp, #1
_ZN17compiler_builtins3int3mul14rust_i128_mulo17h7dbac307fda3729eE():
 168:	9b05      	ldr	r3, [sp, #20]
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:295
 16a:	9806      	ldr	r0, [sp, #24]
 16c:	6020      	str	r0, [r4, #0]
 16e:	f884 b010 	strb.w	fp, [r4, #16]
 172:	9808      	ldr	r0, [sp, #32]
 174:	6060      	str	r0, [r4, #4]
 176:	9807      	ldr	r0, [sp, #28]
 178:	e9c4 0302 	strd	r0, r3, [r4, #8]
 17c:	b009      	add	sp, #36	; 0x24
 17e:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}

Disassembly of section .text._ZN17compiler_builtins3int3mul14rust_u128_mulo17h9cdaa35554bdafd2E:

00000000 <compiler_builtins::int::mul::rust_u128_mulo>:
_ZN17compiler_builtins3int3mul14rust_u128_mulo17h9cdaa35554bdafd2E():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:293
   0:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
   4:	b085      	sub	sp, #20
   6:	f8dd 804c 	ldr.w	r8, [sp, #76]	; 0x4c
   a:	4604      	mov	r4, r0
   c:	f8dd 9044 	ldr.w	r9, [sp, #68]	; 0x44
  10:	f8dd a048 	ldr.w	sl, [sp, #72]	; 0x48
  14:	9f10      	ldr	r7, [sp, #64]	; 0x40
checked_div():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2562
  16:	ea49 0008 	orr.w	r0, r9, r8
  1a:	ea47 010a 	orr.w	r1, r7, sl
  1e:	4308      	orrs	r0, r1
  20:	d02c      	beq.n	7c <compiler_builtins::int::mul::rust_u128_mulo+0x7c>
mulo<u128>():
  22:	e9dd b00e 	ldrd	fp, r0, [sp, #56]	; 0x38
  26:	461d      	mov	r5, r3
wrapping_mul():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2884
  28:	e88d 080c 	stmia.w	sp, {r2, r3, fp}
  2c:	4616      	mov	r6, r2
  2e:	4649      	mov	r1, r9
  30:	9003      	str	r0, [sp, #12]
  32:	4638      	mov	r0, r7
  34:	4652      	mov	r2, sl
  36:	4643      	mov	r3, r8
  38:	f7ff fffe 	bl	0 <compiler_builtins::int::mul::rust_u128_mulo>
checked_div():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2563
  3c:	e88d 0680 	stmia.w	sp, {r7, r9, sl}
  40:	f8cd 800c 	str.w	r8, [sp, #12]
_ZN17compiler_builtins3int3mul14rust_u128_mulo17h9cdaa35554bdafd2E():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:295
  44:	e884 000f 	stmia.w	r4, {r0, r1, r2, r3}
checked_div():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2563
  48:	f04f 30ff 	mov.w	r0, #4294967295	; 0xffffffff
  4c:	f04f 31ff 	mov.w	r1, #4294967295	; 0xffffffff
  50:	f04f 32ff 	mov.w	r2, #4294967295	; 0xffffffff
  54:	f04f 33ff 	mov.w	r3, #4294967295	; 0xffffffff
  58:	f7ff fffe 	bl	0 <compiler_builtins::int::mul::rust_u128_mulo>
gt():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/cmp.rs:980
  5c:	1b80      	subs	r0, r0, r6
  5e:	f04f 0700 	mov.w	r7, #0
  62:	eb71 0005 	sbcs.w	r0, r1, r5
  66:	eb72 000b 	sbcs.w	r0, r2, fp
  6a:	980f      	ldr	r0, [sp, #60]	; 0x3c
  6c:	eb73 0000 	sbcs.w	r0, r3, r0
  70:	bf38      	it	cc
  72:	2701      	movcc	r7, #1
_ZN17compiler_builtins3int3mul14rust_u128_mulo17h9cdaa35554bdafd2E():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:295
  74:	7427      	strb	r7, [r4, #16]
  76:	b005      	add	sp, #20
  78:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
abort():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/lib.rs:41
  7c:	defe      	udf	#254	; 0xfe
  7e:	defe      	udf	#254	; 0xfe

Disassembly of section .text.__divsi3:

00000000 <__divsi3>:
__divsi3():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:306
   0:	ea81 72e1 	eor.w	r2, r1, r1, asr #31
wrapping_sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:1027
   4:	eba2 72e1 	sub.w	r2, r2, r1, asr #31
checked_div():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2562
   8:	2a00      	cmp	r2, #0
__divsi3():
   a:	bf1f      	itttt	ne
   c:	17c9      	asrne	r1, r1, #31
   e:	ea81 71e0 	eorne.w	r1, r1, r0, asr #31
  12:	17c3      	asrne	r3, r0, #31
bitxor():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:306
  14:	4058      	eorne	r0, r3
wrapping_sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:1027
  16:	bf1f      	itttt	ne
  18:	1ac0      	subne	r0, r0, r3
checked_div():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2563
  1a:	fbb0 f0f2 	udivne	r0, r0, r2
bitxor():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:306
  1e:	4048      	eorne	r0, r1
sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/arith.rs:198
  20:	1a40      	subne	r0, r0, r1
__divsi3():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:216
  22:	bf18      	it	ne
  24:	4770      	bxne	lr
abort():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/lib.rs:41
  26:	defe      	udf	#254	; 0xfe
  28:	defe      	udf	#254	; 0xfe

Disassembly of section .text.__aeabi_idiv:

00000000 <__aeabi_idiv>:
__aeabi_idiv():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:306
   0:	ea81 72e1 	eor.w	r2, r1, r1, asr #31
wrapping_sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:1027
   4:	eba2 72e1 	sub.w	r2, r2, r1, asr #31
checked_div():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2562
   8:	2a00      	cmp	r2, #0
__aeabi_idiv():
   a:	bf1f      	itttt	ne
   c:	17c9      	asrne	r1, r1, #31
   e:	ea81 71e0 	eorne.w	r1, r1, r0, asr #31
  12:	17c3      	asrne	r3, r0, #31
bitxor():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:306
  14:	4058      	eorne	r0, r3
wrapping_sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:1027
  16:	bf1f      	itttt	ne
  18:	1ac0      	subne	r0, r0, r3
checked_div():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2563
  1a:	fbb0 f0f2 	udivne	r0, r0, r2
bitxor():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:306
  1e:	4048      	eorne	r0, r1
sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/arith.rs:198
  20:	1a40      	subne	r0, r0, r1
__aeabi_idiv():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
  22:	bf18      	it	ne
  24:	4770      	bxne	lr
abort():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/lib.rs:41
  26:	defe      	udf	#254	; 0xfe
  28:	defe      	udf	#254	; 0xfe

Disassembly of section .text.__divdi3:

00000000 <__divdi3>:
__divdi3():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:254
   0:	b5b0      	push	{r4, r5, r7, lr}
   2:	469c      	mov	ip, r3
bitxor():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:306
   4:	ea82 72e3 	eor.w	r2, r2, r3, asr #31
   8:	ea83 73e3 	eor.w	r3, r3, r3, asr #31
wrapping_sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:1027
   c:	ebb2 72ec 	subs.w	r2, r2, ip, asr #31
  10:	eb63 73ec 	sbc.w	r3, r3, ip, asr #31
checked_div():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2562
  14:	ea52 0e03 	orrs.w	lr, r2, r3
  18:	d00f      	beq.n	3a <__divdi3+0x3a>
div<i64>():
  1a:	17cc      	asrs	r4, r1, #31
bitxor():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:306
  1c:	4060      	eors	r0, r4
div<i64>():
  1e:	ea4f 7cec 	mov.w	ip, ip, asr #31
  22:	ea8c 75e1 	eor.w	r5, ip, r1, asr #31
bitxor():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:306
  26:	4061      	eors	r1, r4
wrapping_sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:1027
  28:	1b00      	subs	r0, r0, r4
  2a:	41a1      	sbcs	r1, r4
checked_div():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2563
  2c:	f7ff fffe 	bl	0 <__divdi3>
bitxor():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:306
  30:	4068      	eors	r0, r5
  32:	4069      	eors	r1, r5
sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/arith.rs:198
  34:	1b40      	subs	r0, r0, r5
  36:	41a9      	sbcs	r1, r5
__divdi3():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
  38:	bdb0      	pop	{r4, r5, r7, pc}
abort():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/lib.rs:41
  3a:	defe      	udf	#254	; 0xfe
  3c:	defe      	udf	#254	; 0xfe

Disassembly of section .text._ZN17compiler_builtins3int4sdiv8__modsi317ha55d12a915c783ffE:

00000000 <compiler_builtins::int::sdiv::__modsi3>:
_ZN17compiler_builtins3int4sdiv8__modsi317ha55d12a915c783ffE():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:77
   0:	f7ff bffe 	b.w	0 <__modsi3>

Disassembly of section .text.__moddi3:

00000000 <__moddi3>:
__moddi3():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:254
   0:	eb12 72e3 	adds.w	r2, r2, r3, asr #31
   4:	eb43 7ce3 	adc.w	ip, r3, r3, asr #31
   8:	ea82 72e3 	eor.w	r2, r2, r3, asr #31
   c:	ea8c 73e3 	eor.w	r3, ip, r3, asr #31
checked_rem():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2608
  10:	ea52 0c03 	orrs.w	ip, r2, r3
  14:	d00e      	beq.n	34 <__moddi3+0x34>
mod_<i64>():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2608
  16:	b510      	push	{r4, lr}
  18:	17cc      	asrs	r4, r1, #31
bitxor():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:306
  1a:	4060      	eors	r0, r4
  1c:	4061      	eors	r1, r4
wrapping_sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:1027
  1e:	1b00      	subs	r0, r0, r4
  20:	41a1      	sbcs	r1, r4
checked_rem():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2611
  22:	f7ff fffe 	bl	0 <__moddi3>
bitxor():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:306
  26:	ea82 0004 	eor.w	r0, r2, r4
  2a:	ea83 0104 	eor.w	r1, r3, r4
sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/arith.rs:198
  2e:	1b00      	subs	r0, r0, r4
  30:	41a1      	sbcs	r1, r4
__moddi3():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
  32:	bd10      	pop	{r4, pc}
abort():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/lib.rs:41
  34:	defe      	udf	#254	; 0xfe
  36:	defe      	udf	#254	; 0xfe

Disassembly of section .text._ZN17compiler_builtins3int4sdiv11__divmodsi417h15a785fc4c4609ccE:

00000000 <compiler_builtins::int::sdiv::__divmodsi4>:
_ZN17compiler_builtins3int4sdiv11__divmodsi417h15a785fc4c4609ccE():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:77
   0:	f7ff bffe 	b.w	0 <__divmodsi4>

Disassembly of section .text.__divmoddi4:

00000000 <__divmoddi4>:
__divmoddi4():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:254
   0:	e92d 47f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
   4:	4680      	mov	r8, r0
bitxor():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:306
   6:	ea82 70e3 	eor.w	r0, r2, r3, asr #31
   a:	4692      	mov	sl, r2
   c:	460c      	mov	r4, r1
   e:	ea83 71e3 	eor.w	r1, r3, r3, asr #31
wrapping_sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:1027
  12:	ebb0 72e3 	subs.w	r2, r0, r3, asr #31
  16:	461e      	mov	r6, r3
  18:	eb61 73e3 	sbc.w	r3, r1, r3, asr #31
checked_div():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2562
  1c:	ea52 0003 	orrs.w	r0, r2, r3
  20:	d020      	beq.n	64 <__divmoddi4+0x64>
div<i64>():
  22:	17f0      	asrs	r0, r6, #31
  24:	17e1      	asrs	r1, r4, #31
  26:	ea80 77e4 	eor.w	r7, r0, r4, asr #31
bitxor():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:306
  2a:	ea81 0008 	eor.w	r0, r1, r8
  2e:	ea81 0504 	eor.w	r5, r1, r4
wrapping_sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:1027
  32:	1a40      	subs	r0, r0, r1
  34:	eb65 0101 	sbc.w	r1, r5, r1
  38:	f8dd 9020 	ldr.w	r9, [sp, #32]
checked_div():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2563
  3c:	f7ff fffe 	bl	0 <__divmoddi4>
bitxor():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:306
  40:	4078      	eors	r0, r7
  42:	4079      	eors	r1, r7
sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/arith.rs:198
  44:	1bc0      	subs	r0, r0, r7
  46:	41b9      	sbcs	r1, r7
wrapping_mul():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:1047
  48:	fba0 230a 	umull	r2, r3, r0, sl
  4c:	fb00 3306 	mla	r3, r0, r6, r3
sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/arith.rs:198
  50:	ebb8 0202 	subs.w	r2, r8, r2
wrapping_mul():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:1047
  54:	fb01 330a 	mla	r3, r1, sl, r3
sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/arith.rs:198
  58:	eb64 0303 	sbc.w	r3, r4, r3
divmod<i64,closure>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/sdiv.rs:51
  5c:	e9c9 2300 	strd	r2, r3, [r9]
__divmoddi4():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
  60:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
abort():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/lib.rs:41
  64:	defe      	udf	#254	; 0xfe
  66:	defe      	udf	#254	; 0xfe

Disassembly of section .text._ZN17compiler_builtins3int4sdiv13rust_i128_div17hba816bd7aff5f749E:

00000000 <compiler_builtins::int::sdiv::rust_i128_div>:
_ZN17compiler_builtins3int4sdiv13rust_i128_div17hba816bd7aff5f749E():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:293
   0:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
   4:	b084      	sub	sp, #16
   6:	e9dd 640c 	ldrd	r6, r4, [sp, #48]	; 0x30
   a:	9d0a      	ldr	r5, [sp, #40]	; 0x28
bitxor():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:306
   c:	ea84 77e4 	eor.w	r7, r4, r4, asr #31
  10:	ea86 78e4 	eor.w	r8, r6, r4, asr #31
  14:	9e0b      	ldr	r6, [sp, #44]	; 0x2c
  16:	ea85 75e4 	eor.w	r5, r5, r4, asr #31
  1a:	ea86 76e4 	eor.w	r6, r6, r4, asr #31
wrapping_sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:1027
  1e:	ebb5 7ce4 	subs.w	ip, r5, r4, asr #31
  22:	eb76 7ee4 	sbcs.w	lr, r6, r4, asr #31
  26:	eb78 78e4 	sbcs.w	r8, r8, r4, asr #31
  2a:	eb67 76e4 	sbc.w	r6, r7, r4, asr #31
checked_div():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2562
  2e:	ea4c 0508 	orr.w	r5, ip, r8
  32:	ea4e 0706 	orr.w	r7, lr, r6
  36:	433d      	orrs	r5, r7
  38:	d021      	beq.n	7e <compiler_builtins::int::sdiv::rust_i128_div+0x7e>
div<i128>():
  3a:	17dd      	asrs	r5, r3, #31
bitxor():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:306
  3c:	4068      	eors	r0, r5
  3e:	4069      	eors	r1, r5
wrapping_sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:1027
  40:	1b40      	subs	r0, r0, r5
div<i128>():
  42:	ea4f 74e4 	mov.w	r4, r4, asr #31
bitxor():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:306
  46:	ea82 0205 	eor.w	r2, r2, r5
wrapping_sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:1027
  4a:	41a9      	sbcs	r1, r5
div<i128>():
  4c:	ea84 74e3 	eor.w	r4, r4, r3, asr #31
bitxor():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:306
  50:	ea83 0305 	eor.w	r3, r3, r5
wrapping_sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:1027
  54:	41aa      	sbcs	r2, r5
  56:	41ab      	sbcs	r3, r5
checked_div():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2563
  58:	e9cd ce00 	strd	ip, lr, [sp]
  5c:	e9cd 8602 	strd	r8, r6, [sp, #8]
  60:	f7ff fffe 	bl	0 <compiler_builtins::int::sdiv::rust_i128_div>
bitxor():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:306
  64:	4060      	eors	r0, r4
  66:	4061      	eors	r1, r4
sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/arith.rs:198
  68:	1b00      	subs	r0, r0, r4
bitxor():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:306
  6a:	ea82 0204 	eor.w	r2, r2, r4
sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/arith.rs:198
  6e:	41a1      	sbcs	r1, r4
bitxor():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:306
  70:	ea83 0304 	eor.w	r3, r3, r4
sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/arith.rs:198
  74:	41a2      	sbcs	r2, r4
  76:	41a3      	sbcs	r3, r4
_ZN17compiler_builtins3int4sdiv13rust_i128_div17hba816bd7aff5f749E():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:295
  78:	b004      	add	sp, #16
  7a:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
abort():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/lib.rs:41
  7e:	defe      	udf	#254	; 0xfe
  80:	defe      	udf	#254	; 0xfe

Disassembly of section .text._ZN17compiler_builtins3int4sdiv13rust_i128_rem17hd7698bbb5a017427E:

00000000 <compiler_builtins::int::sdiv::rust_i128_rem>:
_ZN17compiler_builtins3int4sdiv13rust_i128_rem17hd7698bbb5a017427E():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:293
   0:	b5f0      	push	{r4, r5, r6, r7, lr}
   2:	b085      	sub	sp, #20
   4:	9c0d      	ldr	r4, [sp, #52]	; 0x34
   6:	9e0a      	ldr	r6, [sp, #40]	; 0x28
   8:	eb16 76e4 	adds.w	r6, r6, r4, asr #31
   c:	ea86 7ce4 	eor.w	ip, r6, r4, asr #31
  10:	e9dd 560b 	ldrd	r5, r6, [sp, #44]	; 0x2c
  14:	eb55 75e4 	adcs.w	r5, r5, r4, asr #31
  18:	eb56 76e4 	adcs.w	r6, r6, r4, asr #31
  1c:	ea85 75e4 	eor.w	r5, r5, r4, asr #31
  20:	ea86 7ee4 	eor.w	lr, r6, r4, asr #31
  24:	eb44 76e4 	adc.w	r6, r4, r4, asr #31
  28:	ea86 76e4 	eor.w	r6, r6, r4, asr #31
checked_rem():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2608
  2c:	ea4c 070e 	orr.w	r7, ip, lr
  30:	ea45 0406 	orr.w	r4, r5, r6
  34:	433c      	orrs	r4, r7
  36:	d01c      	beq.n	72 <compiler_builtins::int::sdiv::rust_i128_rem+0x72>
mod_<i128>():
  38:	17dc      	asrs	r4, r3, #31
bitxor():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:306
  3a:	4060      	eors	r0, r4
  3c:	4061      	eors	r1, r4
wrapping_sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:1027
  3e:	1b00      	subs	r0, r0, r4
bitxor():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:306
  40:	ea82 0204 	eor.w	r2, r2, r4
wrapping_sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:1027
  44:	41a1      	sbcs	r1, r4
bitxor():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:306
  46:	ea83 0304 	eor.w	r3, r3, r4
wrapping_sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:1027
  4a:	41a2      	sbcs	r2, r4
  4c:	41a3      	sbcs	r3, r4
checked_rem():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2611
  4e:	e9cd c500 	strd	ip, r5, [sp]
  52:	e9cd e602 	strd	lr, r6, [sp, #8]
  56:	f7ff fffe 	bl	0 <compiler_builtins::int::sdiv::rust_i128_rem>
bitxor():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:306
  5a:	4060      	eors	r0, r4
  5c:	4061      	eors	r1, r4
sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/arith.rs:198
  5e:	1b00      	subs	r0, r0, r4
bitxor():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:306
  60:	ea82 0204 	eor.w	r2, r2, r4
sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/arith.rs:198
  64:	41a1      	sbcs	r1, r4
bitxor():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:306
  66:	ea83 0304 	eor.w	r3, r3, r4
sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/arith.rs:198
  6a:	41a2      	sbcs	r2, r4
  6c:	41a3      	sbcs	r3, r4
_ZN17compiler_builtins3int4sdiv13rust_i128_rem17hd7698bbb5a017427E():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:295
  6e:	b005      	add	sp, #20
  70:	bdf0      	pop	{r4, r5, r6, r7, pc}
abort():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/lib.rs:41
  72:	defe      	udf	#254	; 0xfe
  74:	defe      	udf	#254	; 0xfe

Disassembly of section .text.__ashldi3:

00000000 <__ashldi3>:
__ashldi3():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/shift.rs:9
   0:	0693      	lsls	r3, r2, #26
shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:396
   2:	bf41      	itttt	mi
   4:	f002 011f 	andmi.w	r1, r2, #31
   8:	fa00 f101 	lslmi.w	r1, r0, r1
   c:	2000      	movmi	r0, #0
__ashldi3():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:216
   e:	4770      	bxmi	lr
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/shift.rs:11
  10:	2a00      	cmp	r2, #0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:216
  12:	bf08      	it	eq
  14:	4770      	bxeq	lr
shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:396
  16:	f002 031f 	and.w	r3, r2, #31
__ashldi3():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/shift.rs:16
  1a:	4252      	negs	r2, r2
shr():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:505
  1c:	f002 021f 	and.w	r2, r2, #31
shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:396
  20:	4099      	lsls	r1, r3
shr():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:505
  22:	fa20 f202 	lsr.w	r2, r0, r2
bitor():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:219
  26:	4311      	orrs	r1, r2
shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:396
  28:	4098      	lsls	r0, r3
__ashldi3():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:216
  2a:	4770      	bx	lr

Disassembly of section .text.__aeabi_llsl:

00000000 <__aeabi_llsl>:
__aeabi_llsl():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/shift.rs:9
   0:	0693      	lsls	r3, r2, #26
shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:396
   2:	bf41      	itttt	mi
   4:	f002 011f 	andmi.w	r1, r2, #31
   8:	fa00 f101 	lslmi.w	r1, r0, r1
   c:	2000      	movmi	r0, #0
__aeabi_llsl():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
   e:	4770      	bxmi	lr
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/shift.rs:11
  10:	2a00      	cmp	r2, #0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
  12:	bf08      	it	eq
  14:	4770      	bxeq	lr
shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:396
  16:	f002 031f 	and.w	r3, r2, #31
__aeabi_llsl():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/shift.rs:16
  1a:	4252      	negs	r2, r2
shr():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:505
  1c:	f002 021f 	and.w	r2, r2, #31
shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:396
  20:	4099      	lsls	r1, r3
shr():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:505
  22:	fa20 f202 	lsr.w	r2, r0, r2
bitor():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:219
  26:	4311      	orrs	r1, r2
shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:396
  28:	4098      	lsls	r0, r3
__aeabi_llsl():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
  2a:	4770      	bx	lr

Disassembly of section .text.__ashrdi3:

00000000 <__ashrdi3>:
__ashrdi3():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/shift.rs:30
   0:	0693      	lsls	r3, r2, #26
shr():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:505
   2:	bf41      	itttt	mi
   4:	f002 001f 	andmi.w	r0, r2, #31
   8:	fa41 f000 	asrmi.w	r0, r1, r0
   c:	17c9      	asrmi	r1, r1, #31
__ashrdi3():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:216
   e:	4770      	bxmi	lr
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/shift.rs:33
  10:	2a00      	cmp	r2, #0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:216
  12:	bf08      	it	eq
  14:	4770      	bxeq	lr
shr():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:505
  16:	f002 031f 	and.w	r3, r2, #31
__ashrdi3():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/shift.rs:37
  1a:	4252      	negs	r2, r2
shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:396
  1c:	f002 021f 	and.w	r2, r2, #31
shr():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:505
  20:	40d8      	lsrs	r0, r3
shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:396
  22:	fa01 f202 	lsl.w	r2, r1, r2
bitor():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:219
  26:	4310      	orrs	r0, r2
shr():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:505
  28:	4119      	asrs	r1, r3
__ashrdi3():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:216
  2a:	4770      	bx	lr

Disassembly of section .text.__aeabi_lasr:

00000000 <__aeabi_lasr>:
__aeabi_lasr():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/shift.rs:30
   0:	0693      	lsls	r3, r2, #26
shr():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:505
   2:	bf41      	itttt	mi
   4:	f002 001f 	andmi.w	r0, r2, #31
   8:	fa41 f000 	asrmi.w	r0, r1, r0
   c:	17c9      	asrmi	r1, r1, #31
__aeabi_lasr():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
   e:	4770      	bxmi	lr
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/shift.rs:33
  10:	2a00      	cmp	r2, #0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
  12:	bf08      	it	eq
  14:	4770      	bxeq	lr
shr():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:505
  16:	f002 031f 	and.w	r3, r2, #31
__aeabi_lasr():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/shift.rs:37
  1a:	4252      	negs	r2, r2
shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:396
  1c:	f002 021f 	and.w	r2, r2, #31
shr():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:505
  20:	40d8      	lsrs	r0, r3
shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:396
  22:	fa01 f202 	lsl.w	r2, r1, r2
bitor():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:219
  26:	4310      	orrs	r0, r2
shr():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:505
  28:	4119      	asrs	r1, r3
__aeabi_lasr():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
  2a:	4770      	bx	lr

Disassembly of section .text.__lshrdi3:

00000000 <__lshrdi3>:
__lshrdi3():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/shift.rs:52
   0:	0693      	lsls	r3, r2, #26
shr():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:505
   2:	bf41      	itttt	mi
   4:	f002 001f 	andmi.w	r0, r2, #31
   8:	fa21 f000 	lsrmi.w	r0, r1, r0
   c:	2100      	movmi	r1, #0
__lshrdi3():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:216
   e:	4770      	bxmi	lr
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/shift.rs:54
  10:	2a00      	cmp	r2, #0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:216
  12:	bf08      	it	eq
  14:	4770      	bxeq	lr
shr():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:505
  16:	f002 031f 	and.w	r3, r2, #31
__lshrdi3():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/shift.rs:57
  1a:	4252      	negs	r2, r2
shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:396
  1c:	f002 021f 	and.w	r2, r2, #31
shr():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:505
  20:	40d8      	lsrs	r0, r3
shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:396
  22:	fa01 f202 	lsl.w	r2, r1, r2
bitor():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:219
  26:	4310      	orrs	r0, r2
shr():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:505
  28:	40d9      	lsrs	r1, r3
__lshrdi3():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:216
  2a:	4770      	bx	lr

Disassembly of section .text.__aeabi_llsr:

00000000 <__aeabi_llsr>:
__aeabi_llsr():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/shift.rs:52
   0:	0693      	lsls	r3, r2, #26
shr():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:505
   2:	bf41      	itttt	mi
   4:	f002 001f 	andmi.w	r0, r2, #31
   8:	fa21 f000 	lsrmi.w	r0, r1, r0
   c:	2100      	movmi	r1, #0
__aeabi_llsr():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
   e:	4770      	bxmi	lr
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/shift.rs:54
  10:	2a00      	cmp	r2, #0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
  12:	bf08      	it	eq
  14:	4770      	bxeq	lr
shr():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:505
  16:	f002 031f 	and.w	r3, r2, #31
__aeabi_llsr():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/shift.rs:57
  1a:	4252      	negs	r2, r2
shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:396
  1c:	f002 021f 	and.w	r2, r2, #31
shr():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:505
  20:	40d8      	lsrs	r0, r3
shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:396
  22:	fa01 f202 	lsl.w	r2, r1, r2
bitor():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:219
  26:	4310      	orrs	r0, r2
shr():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:505
  28:	40d9      	lsrs	r1, r3
__aeabi_llsr():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
  2a:	4770      	bx	lr

Disassembly of section .text._ZN17compiler_builtins3int5shift13rust_i128_shl17hb3618dc516d362bfE:

00000000 <compiler_builtins::int::shift::rust_i128_shl>:
_ZN17compiler_builtins3int5shift13rust_i128_shl17hb3618dc516d362bfE():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:293
   0:	b5f0      	push	{r4, r5, r6, r7, lr}
   2:	9d05      	ldr	r5, [sp, #20]
ashl<u128>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/shift.rs:9
   4:	066c      	lsls	r4, r5, #25
   6:	d43d      	bmi.n	84 <compiler_builtins::int::shift::rust_i128_shl+0x84>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/shift.rs:11
   8:	b3dd      	cbz	r5, 82 <compiler_builtins::int::shift::rust_i128_shl+0x82>
shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:396
   a:	f005 0e3f 	and.w	lr, r5, #63	; 0x3f
ashl<u128>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/shift.rs:16
   e:	426d      	negs	r5, r5
shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:396
  10:	f1ce 0620 	rsb	r6, lr, #32
shr():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:505
  14:	f005 053f 	and.w	r5, r5, #63	; 0x3f
shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:396
  18:	fa01 fc0e 	lsl.w	ip, r1, lr
  1c:	fa03 f30e 	lsl.w	r3, r3, lr
  20:	fa20 f406 	lsr.w	r4, r0, r6
  24:	ea4c 0c04 	orr.w	ip, ip, r4
  28:	f1ae 0420 	sub.w	r4, lr, #32
  2c:	fa22 f606 	lsr.w	r6, r2, r6
  30:	2c00      	cmp	r4, #0
  32:	bfa8      	it	ge
  34:	fa00 fc04 	lslge.w	ip, r0, r4
  38:	4333      	orrs	r3, r6
  3a:	2c00      	cmp	r4, #0
shr():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:505
  3c:	fa21 f605 	lsr.w	r6, r1, r5
  40:	f1a5 0720 	sub.w	r7, r5, #32
shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:396
  44:	bfa8      	it	ge
  46:	fa02 f304 	lslge.w	r3, r2, r4
shr():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:505
  4a:	2f00      	cmp	r7, #0
  4c:	bfa8      	it	ge
  4e:	2600      	movge	r6, #0
bitor():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:219
  50:	4333      	orrs	r3, r6
shr():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:505
  52:	fa20 f605 	lsr.w	r6, r0, r5
  56:	f1c5 0520 	rsb	r5, r5, #32
  5a:	2f00      	cmp	r7, #0
shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:396
  5c:	fa00 f00e 	lsl.w	r0, r0, lr
shr():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:505
  60:	fa01 f505 	lsl.w	r5, r1, r5
  64:	ea45 0506 	orr.w	r5, r5, r6
  68:	bfa8      	it	ge
  6a:	fa21 f507 	lsrge.w	r5, r1, r7
shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:396
  6e:	fa02 f10e 	lsl.w	r1, r2, lr
  72:	2c00      	cmp	r4, #0
  74:	bfa8      	it	ge
  76:	2100      	movge	r1, #0
bitor():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:219
  78:	ea45 0201 	orr.w	r2, r5, r1
ashl<u128>():
  7c:	4661      	mov	r1, ip
shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:396
  7e:	bfa8      	it	ge
  80:	2000      	movge	r0, #0
_ZN17compiler_builtins3int5shift13rust_i128_shl17hb3618dc516d362bfE():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:295
  82:	bdf0      	pop	{r4, r5, r6, r7, pc}
shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:396
  84:	f005 023f 	and.w	r2, r5, #63	; 0x3f
  88:	f1c2 0320 	rsb	r3, r2, #32
  8c:	4091      	lsls	r1, r2
  8e:	fa20 f303 	lsr.w	r3, r0, r3
  92:	430b      	orrs	r3, r1
  94:	f1a2 0120 	sub.w	r1, r2, #32
  98:	2900      	cmp	r1, #0
  9a:	bfa8      	it	ge
  9c:	fa00 f301 	lslge.w	r3, r0, r1
  a0:	fa00 f202 	lsl.w	r2, r0, r2
  a4:	f04f 0000 	mov.w	r0, #0
ashl<u128>():
  a8:	f04f 0100 	mov.w	r1, #0
shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:396
  ac:	bfa8      	it	ge
  ae:	2200      	movge	r2, #0
_ZN17compiler_builtins3int5shift13rust_i128_shl17hb3618dc516d362bfE():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:295
  b0:	bdf0      	pop	{r4, r5, r6, r7, pc}

Disassembly of section .text._ZN17compiler_builtins3int5shift14rust_i128_shlo17hd92352339c832a35E:

00000000 <compiler_builtins::int::shift::rust_i128_shlo>:
_ZN17compiler_builtins3int5shift14rust_i128_shlo17hd92352339c832a35E():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:293
   0:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
   4:	b081      	sub	sp, #4
   6:	f8dd 9030 	ldr.w	r9, [sp, #48]	; 0x30
   a:	f10d 0c34 	add.w	ip, sp, #52	; 0x34
ashl<u128>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/shift.rs:9
   e:	ea5f 6749 	movs.w	r7, r9, lsl #25
  12:	e89c 1180 	ldmia.w	ip, {r7, r8, ip}
  16:	d448      	bmi.n	aa <compiler_builtins::int::shift::rust_i128_shlo+0xaa>
  18:	e9dd 560a 	ldrd	r5, r6, [sp, #40]	; 0x28
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/shift.rs:11
  1c:	f1b9 0f00 	cmp.w	r9, #0
  20:	d058      	beq.n	d4 <compiler_builtins::int::shift::rust_i128_shlo+0xd4>
shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:396
  22:	f009 043f 	and.w	r4, r9, #63	; 0x3f
  26:	46e6      	mov	lr, ip
  28:	f1c4 0120 	rsb	r1, r4, #32
  2c:	40a6      	lsls	r6, r4
  2e:	fa03 fa04 	lsl.w	sl, r3, r4
  32:	fa22 f701 	lsr.w	r7, r2, r1
  36:	fa25 f101 	lsr.w	r1, r5, r1
  3a:	ea41 0b06 	orr.w	fp, r1, r6
ashl<u128>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/shift.rs:16
  3e:	f1c9 0600 	rsb	r6, r9, #0
shr():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:505
  42:	f006 013f 	and.w	r1, r6, #63	; 0x3f
shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:396
  46:	ea4a 0a07 	orr.w	sl, sl, r7
  4a:	f1a4 0720 	sub.w	r7, r4, #32
shr():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:505
  4e:	f1a1 0c20 	sub.w	ip, r1, #32
shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:396
  52:	2f00      	cmp	r7, #0
  54:	bfa8      	it	ge
  56:	fa02 fa07 	lslge.w	sl, r2, r7
  5a:	2f00      	cmp	r7, #0
shr():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:505
  5c:	fa23 f601 	lsr.w	r6, r3, r1
shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:396
  60:	bfa8      	it	ge
  62:	fa05 fb07 	lslge.w	fp, r5, r7
shr():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:505
  66:	f1bc 0f00 	cmp.w	ip, #0
  6a:	bfa8      	it	ge
  6c:	2600      	movge	r6, #0
  6e:	f1bc 0f00 	cmp.w	ip, #0
bitor():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:219
  72:	ea46 060b 	orr.w	r6, r6, fp
shr():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:505
  76:	fa22 fb01 	lsr.w	fp, r2, r1
  7a:	f1c1 0120 	rsb	r1, r1, #32
shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:396
  7e:	fa02 f204 	lsl.w	r2, r2, r4
shr():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:505
  82:	fa03 f101 	lsl.w	r1, r3, r1
  86:	ea41 010b 	orr.w	r1, r1, fp
  8a:	bfa8      	it	ge
  8c:	fa23 f10c 	lsrge.w	r1, r3, ip
shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:396
  90:	2f00      	cmp	r7, #0
  92:	fa05 f304 	lsl.w	r3, r5, r4
  96:	9f0d      	ldr	r7, [sp, #52]	; 0x34
  98:	bfa8      	it	ge
  9a:	2300      	movge	r3, #0
bitor():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:219
  9c:	ea41 0503 	orr.w	r5, r1, r3
  a0:	46f4      	mov	ip, lr
ashl<u128>():
  a2:	4653      	mov	r3, sl
shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:396
  a4:	bfa8      	it	ge
  a6:	2200      	movge	r2, #0
  a8:	e014      	b.n	d4 <compiler_builtins::int::shift::rust_i128_shlo+0xd4>
  aa:	f009 043f 	and.w	r4, r9, #63	; 0x3f
  ae:	f1c4 0520 	rsb	r5, r4, #32
  b2:	40a3      	lsls	r3, r4
  b4:	fa22 f505 	lsr.w	r5, r2, r5
  b8:	ea45 0603 	orr.w	r6, r5, r3
  bc:	f1a4 0320 	sub.w	r3, r4, #32
  c0:	fa02 f504 	lsl.w	r5, r2, r4
  c4:	2b00      	cmp	r3, #0
  c6:	bfa8      	it	ge
  c8:	fa02 f603 	lslge.w	r6, r2, r3
  cc:	bfa8      	it	ge
  ce:	2500      	movge	r5, #0
  d0:	2200      	movs	r2, #0
ashl<u128>():
  d2:	2300      	movs	r3, #0
_ZN17compiler_builtins3int5shift14rust_i128_shlo17hd92352339c832a35E():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:295
  d4:	e880 006c 	stmia.w	r0, {r2, r3, r5, r6}
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/shift.rs:106
  d8:	f1d9 027f 	rsbs	r2, r9, #127	; 0x7f
  dc:	f04f 0100 	mov.w	r1, #0
  e0:	eb71 0207 	sbcs.w	r2, r1, r7
  e4:	eb71 0208 	sbcs.w	r2, r1, r8
  e8:	eb71 020c 	sbcs.w	r2, r1, ip
  ec:	bf38      	it	cc
  ee:	2101      	movcc	r1, #1
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:295
  f0:	7401      	strb	r1, [r0, #16]
  f2:	b001      	add	sp, #4
  f4:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}

Disassembly of section .text._ZN17compiler_builtins3int5shift13rust_i128_shr17h3a8269e86e1552deE:

00000000 <compiler_builtins::int::shift::rust_i128_shr>:
_ZN17compiler_builtins3int5shift13rust_i128_shr17h3a8269e86e1552deE():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:293
   0:	b5f0      	push	{r4, r5, r6, r7, lr}
   2:	9d05      	ldr	r5, [sp, #20]
ashr<i128>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/shift.rs:30
   4:	066c      	lsls	r4, r5, #25
   6:	d43e      	bmi.n	86 <compiler_builtins::int::shift::rust_i128_shr+0x86>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/shift.rs:33
   8:	b3e5      	cbz	r5, 84 <compiler_builtins::int::shift::rust_i128_shr+0x84>
shr():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:505
   a:	f005 0e3f 	and.w	lr, r5, #63	; 0x3f
ashr<i128>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/shift.rs:37
   e:	426d      	negs	r5, r5
shr():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:505
  10:	f1ce 0620 	rsb	r6, lr, #32
shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:396
  14:	f005 053f 	and.w	r5, r5, #63	; 0x3f
shr():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:505
  18:	fa22 fc0e 	lsr.w	ip, r2, lr
  1c:	fa20 f00e 	lsr.w	r0, r0, lr
  20:	fa03 f406 	lsl.w	r4, r3, r6
  24:	ea4c 0c04 	orr.w	ip, ip, r4
  28:	f1ae 0420 	sub.w	r4, lr, #32
  2c:	fa01 f606 	lsl.w	r6, r1, r6
  30:	2c00      	cmp	r4, #0
  32:	bfa8      	it	ge
  34:	fa43 fc04 	asrge.w	ip, r3, r4
  38:	4330      	orrs	r0, r6
  3a:	2c00      	cmp	r4, #0
shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:396
  3c:	fa02 f605 	lsl.w	r6, r2, r5
  40:	f1a5 0720 	sub.w	r7, r5, #32
shr():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:505
  44:	bfa8      	it	ge
  46:	fa21 f004 	lsrge.w	r0, r1, r4
shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:396
  4a:	2f00      	cmp	r7, #0
  4c:	bfa8      	it	ge
  4e:	2600      	movge	r6, #0
bitor():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:219
  50:	4330      	orrs	r0, r6
shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:396
  52:	fa03 f605 	lsl.w	r6, r3, r5
  56:	f1c5 0520 	rsb	r5, r5, #32
  5a:	2f00      	cmp	r7, #0
shr():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:505
  5c:	fa21 f10e 	lsr.w	r1, r1, lr
shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:396
  60:	fa22 f505 	lsr.w	r5, r2, r5
  64:	ea45 0506 	orr.w	r5, r5, r6
  68:	bfa8      	it	ge
  6a:	fa02 f507 	lslge.w	r5, r2, r7
shr():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:505
  6e:	2c00      	cmp	r4, #0
  70:	bfa8      	it	ge
  72:	2100      	movge	r1, #0
  74:	fa43 f70e 	asr.w	r7, r3, lr
bitor():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:219
  78:	ea41 0105 	orr.w	r1, r1, r5
shr():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:505
  7c:	bfa8      	it	ge
  7e:	17df      	asrge	r7, r3, #31
ashr<i128>():
  80:	4662      	mov	r2, ip
  82:	463b      	mov	r3, r7
_ZN17compiler_builtins3int5shift13rust_i128_shr17h3a8269e86e1552deE():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:295
  84:	bdf0      	pop	{r4, r5, r6, r7, pc}
shr():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:505
  86:	f005 013f 	and.w	r1, r5, #63	; 0x3f
  8a:	fa22 f001 	lsr.w	r0, r2, r1
  8e:	f1c1 0220 	rsb	r2, r1, #32
  92:	fa03 f202 	lsl.w	r2, r3, r2
  96:	4310      	orrs	r0, r2
  98:	f1a1 0220 	sub.w	r2, r1, #32
  9c:	fa43 f101 	asr.w	r1, r3, r1
  a0:	2a00      	cmp	r2, #0
  a2:	bfa8      	it	ge
  a4:	fa43 f002 	asrge.w	r0, r3, r2
  a8:	ea4f 72e3 	mov.w	r2, r3, asr #31
  ac:	bfa8      	it	ge
  ae:	17d9      	asrge	r1, r3, #31
ashr<i128>():
  b0:	4613      	mov	r3, r2
_ZN17compiler_builtins3int5shift13rust_i128_shr17h3a8269e86e1552deE():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:295
  b2:	bdf0      	pop	{r4, r5, r6, r7, pc}

Disassembly of section .text._ZN17compiler_builtins3int5shift14rust_i128_shro17ha7d04b67e033b50aE:

00000000 <compiler_builtins::int::shift::rust_i128_shro>:
_ZN17compiler_builtins3int5shift14rust_i128_shro17ha7d04b67e033b50aE():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:293
   0:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
   4:	b081      	sub	sp, #4
   6:	f8dd 9030 	ldr.w	r9, [sp, #48]	; 0x30
   a:	f10d 0c34 	add.w	ip, sp, #52	; 0x34
ashr<i128>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/shift.rs:30
   e:	ea5f 6749 	movs.w	r7, r9, lsl #25
  12:	e89c 1180 	ldmia.w	ip, {r7, r8, ip}
  16:	e9dd 650a 	ldrd	r6, r5, [sp, #40]	; 0x28
  1a:	d447      	bmi.n	ac <compiler_builtins::int::shift::rust_i128_shro+0xac>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/shift.rs:33
  1c:	f1b9 0f00 	cmp.w	r9, #0
  20:	d059      	beq.n	d6 <compiler_builtins::int::shift::rust_i128_shro+0xd6>
shr():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:505
  22:	f009 043f 	and.w	r4, r9, #63	; 0x3f
  26:	46e6      	mov	lr, ip
  28:	f1c4 0120 	rsb	r1, r4, #32
  2c:	40e2      	lsrs	r2, r4
  2e:	fa26 fa04 	lsr.w	sl, r6, r4
  32:	fa05 f701 	lsl.w	r7, r5, r1
  36:	fa03 f101 	lsl.w	r1, r3, r1
  3a:	ea42 0b01 	orr.w	fp, r2, r1
ashr<i128>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/shift.rs:37
  3e:	f1c9 0200 	rsb	r2, r9, #0
shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:396
  42:	f002 013f 	and.w	r1, r2, #63	; 0x3f
shr():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:505
  46:	ea4a 0a07 	orr.w	sl, sl, r7
  4a:	f1a4 0720 	sub.w	r7, r4, #32
shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:396
  4e:	f1a1 0c20 	sub.w	ip, r1, #32
shr():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:505
  52:	2f00      	cmp	r7, #0
  54:	bfa8      	it	ge
  56:	fa45 fa07 	asrge.w	sl, r5, r7
  5a:	2f00      	cmp	r7, #0
shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:396
  5c:	fa06 f201 	lsl.w	r2, r6, r1
shr():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:505
  60:	bfa8      	it	ge
  62:	fa23 fb07 	lsrge.w	fp, r3, r7
shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:396
  66:	f1bc 0f00 	cmp.w	ip, #0
  6a:	bfa8      	it	ge
  6c:	2200      	movge	r2, #0
  6e:	f1bc 0f00 	cmp.w	ip, #0
bitor():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:219
  72:	ea42 020b 	orr.w	r2, r2, fp
shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:396
  76:	fa05 fb01 	lsl.w	fp, r5, r1
  7a:	f1c1 0120 	rsb	r1, r1, #32
shr():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:505
  7e:	fa23 f304 	lsr.w	r3, r3, r4
shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:396
  82:	fa26 f101 	lsr.w	r1, r6, r1
  86:	ea41 010b 	orr.w	r1, r1, fp
  8a:	bfa8      	it	ge
  8c:	fa06 f10c 	lslge.w	r1, r6, ip
shr():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:505
  90:	2f00      	cmp	r7, #0
  92:	bfa8      	it	ge
  94:	2300      	movge	r3, #0
  96:	9f0d      	ldr	r7, [sp, #52]	; 0x34
bitor():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:219
  98:	ea43 0301 	orr.w	r3, r3, r1
shr():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:505
  9c:	fa45 f104 	asr.w	r1, r5, r4
  a0:	bfa8      	it	ge
  a2:	17e9      	asrge	r1, r5, #31
  a4:	46f4      	mov	ip, lr
ashr<i128>():
  a6:	4656      	mov	r6, sl
  a8:	460d      	mov	r5, r1
  aa:	e014      	b.n	d6 <compiler_builtins::int::shift::rust_i128_shro+0xd6>
shr():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:505
  ac:	f009 033f 	and.w	r3, r9, #63	; 0x3f
  b0:	f1c3 0420 	rsb	r4, r3, #32
  b4:	fa26 f203 	lsr.w	r2, r6, r3
  b8:	17ee      	asrs	r6, r5, #31
  ba:	fa05 f404 	lsl.w	r4, r5, r4
  be:	4322      	orrs	r2, r4
  c0:	f1a3 0420 	sub.w	r4, r3, #32
  c4:	fa45 f303 	asr.w	r3, r5, r3
  c8:	2c00      	cmp	r4, #0
  ca:	bfa8      	it	ge
  cc:	fa45 f204 	asrge.w	r2, r5, r4
  d0:	bfa8      	it	ge
  d2:	17eb      	asrge	r3, r5, #31
ashr<i128>():
  d4:	4635      	mov	r5, r6
_ZN17compiler_builtins3int5shift14rust_i128_shro17ha7d04b67e033b50aE():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:295
  d6:	e880 004c 	stmia.w	r0, {r2, r3, r6}
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/shift.rs:123
  da:	f1d9 027f 	rsbs	r2, r9, #127	; 0x7f
  de:	f04f 0100 	mov.w	r1, #0
  e2:	eb71 0207 	sbcs.w	r2, r1, r7
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:295
  e6:	60c5      	str	r5, [r0, #12]
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/shift.rs:123
  e8:	eb71 0208 	sbcs.w	r2, r1, r8
  ec:	eb71 020c 	sbcs.w	r2, r1, ip
  f0:	bf38      	it	cc
  f2:	2101      	movcc	r1, #1
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:295
  f4:	7401      	strb	r1, [r0, #16]
  f6:	b001      	add	sp, #4
  f8:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}

Disassembly of section .text._ZN17compiler_builtins3int5shift13rust_u128_shr17hff924baacf55883dE:

00000000 <compiler_builtins::int::shift::rust_u128_shr>:
_ZN17compiler_builtins3int5shift13rust_u128_shr17hff924baacf55883dE():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:293
   0:	b5f0      	push	{r4, r5, r6, r7, lr}
   2:	9d05      	ldr	r5, [sp, #20]
lshr<u128>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/shift.rs:52
   4:	066c      	lsls	r4, r5, #25
   6:	d43d      	bmi.n	84 <compiler_builtins::int::shift::rust_u128_shr+0x84>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/shift.rs:54
   8:	b3dd      	cbz	r5, 82 <compiler_builtins::int::shift::rust_u128_shr+0x82>
shr():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:505
   a:	f005 0e3f 	and.w	lr, r5, #63	; 0x3f
lshr<u128>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/shift.rs:57
   e:	426d      	negs	r5, r5
shr():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:505
  10:	f1ce 0620 	rsb	r6, lr, #32
shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:396
  14:	f005 053f 	and.w	r5, r5, #63	; 0x3f
shr():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:505
  18:	fa22 fc0e 	lsr.w	ip, r2, lr
  1c:	fa20 f00e 	lsr.w	r0, r0, lr
  20:	fa03 f406 	lsl.w	r4, r3, r6
  24:	ea4c 0c04 	orr.w	ip, ip, r4
  28:	f1ae 0420 	sub.w	r4, lr, #32
  2c:	fa01 f606 	lsl.w	r6, r1, r6
  30:	2c00      	cmp	r4, #0
  32:	bfa8      	it	ge
  34:	fa23 fc04 	lsrge.w	ip, r3, r4
  38:	4330      	orrs	r0, r6
  3a:	2c00      	cmp	r4, #0
shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:396
  3c:	fa02 f605 	lsl.w	r6, r2, r5
  40:	f1a5 0720 	sub.w	r7, r5, #32
shr():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:505
  44:	bfa8      	it	ge
  46:	fa21 f004 	lsrge.w	r0, r1, r4
shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:396
  4a:	2f00      	cmp	r7, #0
  4c:	bfa8      	it	ge
  4e:	2600      	movge	r6, #0
bitor():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:219
  50:	4330      	orrs	r0, r6
shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:396
  52:	fa03 f605 	lsl.w	r6, r3, r5
  56:	f1c5 0520 	rsb	r5, r5, #32
  5a:	2f00      	cmp	r7, #0
shr():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:505
  5c:	fa21 f10e 	lsr.w	r1, r1, lr
shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:396
  60:	fa22 f505 	lsr.w	r5, r2, r5
shr():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:505
  64:	fa23 f30e 	lsr.w	r3, r3, lr
shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:396
  68:	ea45 0506 	orr.w	r5, r5, r6
  6c:	bfa8      	it	ge
  6e:	fa02 f507 	lslge.w	r5, r2, r7
shr():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:505
  72:	2c00      	cmp	r4, #0
  74:	bfa8      	it	ge
  76:	2100      	movge	r1, #0
lshr<u128>():
  78:	4662      	mov	r2, ip
bitor():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:219
  7a:	ea41 0105 	orr.w	r1, r1, r5
shr():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:505
  7e:	bfa8      	it	ge
  80:	2300      	movge	r3, #0
_ZN17compiler_builtins3int5shift13rust_u128_shr17hff924baacf55883dE():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:295
  82:	bdf0      	pop	{r4, r5, r6, r7, pc}
shr():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:505
  84:	f005 013f 	and.w	r1, r5, #63	; 0x3f
  88:	fa22 f001 	lsr.w	r0, r2, r1
  8c:	f1c1 0220 	rsb	r2, r1, #32
  90:	fa03 f202 	lsl.w	r2, r3, r2
  94:	4310      	orrs	r0, r2
  96:	f1a1 0220 	sub.w	r2, r1, #32
  9a:	fa23 f101 	lsr.w	r1, r3, r1
  9e:	2a00      	cmp	r2, #0
  a0:	bfa8      	it	ge
  a2:	fa23 f002 	lsrge.w	r0, r3, r2
  a6:	f04f 0200 	mov.w	r2, #0
lshr<u128>():
  aa:	f04f 0300 	mov.w	r3, #0
shr():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:505
  ae:	bfa8      	it	ge
  b0:	2100      	movge	r1, #0
_ZN17compiler_builtins3int5shift13rust_u128_shr17hff924baacf55883dE():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:295
  b2:	bdf0      	pop	{r4, r5, r6, r7, pc}

Disassembly of section .text._ZN17compiler_builtins3int5shift14rust_u128_shro17h0a5feea8783a26e2E:

00000000 <compiler_builtins::int::shift::rust_u128_shro>:
_ZN17compiler_builtins3int5shift14rust_u128_shro17h0a5feea8783a26e2E():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:293
   0:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
   4:	b081      	sub	sp, #4
   6:	f8dd 9030 	ldr.w	r9, [sp, #48]	; 0x30
   a:	f10d 0c34 	add.w	ip, sp, #52	; 0x34
lshr<u128>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/shift.rs:52
   e:	ea5f 6749 	movs.w	r7, r9, lsl #25
  12:	e89c 1180 	ldmia.w	ip, {r7, r8, ip}
  16:	e9dd 650a 	ldrd	r6, r5, [sp, #40]	; 0x28
  1a:	d446      	bmi.n	aa <compiler_builtins::int::shift::rust_u128_shro+0xaa>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/shift.rs:54
  1c:	f1b9 0f00 	cmp.w	r9, #0
  20:	d058      	beq.n	d4 <compiler_builtins::int::shift::rust_u128_shro+0xd4>
shr():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:505
  22:	f009 043f 	and.w	r4, r9, #63	; 0x3f
  26:	46e6      	mov	lr, ip
  28:	f1c4 0120 	rsb	r1, r4, #32
  2c:	40e2      	lsrs	r2, r4
  2e:	fa26 fa04 	lsr.w	sl, r6, r4
  32:	fa05 f701 	lsl.w	r7, r5, r1
  36:	fa03 f101 	lsl.w	r1, r3, r1
  3a:	ea42 0b01 	orr.w	fp, r2, r1
lshr<u128>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/shift.rs:57
  3e:	f1c9 0200 	rsb	r2, r9, #0
shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:396
  42:	f002 013f 	and.w	r1, r2, #63	; 0x3f
shr():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:505
  46:	ea4a 0a07 	orr.w	sl, sl, r7
  4a:	f1a4 0720 	sub.w	r7, r4, #32
shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:396
  4e:	f1a1 0c20 	sub.w	ip, r1, #32
shr():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:505
  52:	2f00      	cmp	r7, #0
  54:	bfa8      	it	ge
  56:	fa25 fa07 	lsrge.w	sl, r5, r7
  5a:	2f00      	cmp	r7, #0
shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:396
  5c:	fa06 f201 	lsl.w	r2, r6, r1
shr():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:505
  60:	bfa8      	it	ge
  62:	fa23 fb07 	lsrge.w	fp, r3, r7
shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:396
  66:	f1bc 0f00 	cmp.w	ip, #0
  6a:	bfa8      	it	ge
  6c:	2200      	movge	r2, #0
  6e:	f1bc 0f00 	cmp.w	ip, #0
bitor():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:219
  72:	ea42 020b 	orr.w	r2, r2, fp
shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:396
  76:	fa05 fb01 	lsl.w	fp, r5, r1
  7a:	f1c1 0120 	rsb	r1, r1, #32
shr():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:505
  7e:	fa23 f304 	lsr.w	r3, r3, r4
  82:	fa25 f504 	lsr.w	r5, r5, r4
shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:396
  86:	fa26 f101 	lsr.w	r1, r6, r1
  8a:	ea41 010b 	orr.w	r1, r1, fp
  8e:	bfa8      	it	ge
  90:	fa06 f10c 	lslge.w	r1, r6, ip
shr():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:505
  94:	2f00      	cmp	r7, #0
  96:	bfa8      	it	ge
  98:	2300      	movge	r3, #0
  9a:	9f0d      	ldr	r7, [sp, #52]	; 0x34
bitor():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:219
  9c:	ea43 0301 	orr.w	r3, r3, r1
  a0:	46f4      	mov	ip, lr
lshr<u128>():
  a2:	4656      	mov	r6, sl
shr():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:505
  a4:	bfa8      	it	ge
  a6:	2500      	movge	r5, #0
  a8:	e014      	b.n	d4 <compiler_builtins::int::shift::rust_u128_shro+0xd4>
  aa:	f009 033f 	and.w	r3, r9, #63	; 0x3f
  ae:	f1c3 0420 	rsb	r4, r3, #32
  b2:	fa26 f203 	lsr.w	r2, r6, r3
  b6:	2600      	movs	r6, #0
  b8:	fa05 f404 	lsl.w	r4, r5, r4
  bc:	4322      	orrs	r2, r4
  be:	f1a3 0420 	sub.w	r4, r3, #32
  c2:	fa25 f303 	lsr.w	r3, r5, r3
  c6:	2c00      	cmp	r4, #0
  c8:	bfa8      	it	ge
  ca:	fa25 f204 	lsrge.w	r2, r5, r4
  ce:	bfa8      	it	ge
  d0:	2300      	movge	r3, #0
lshr<u128>():
  d2:	2500      	movs	r5, #0
_ZN17compiler_builtins3int5shift14rust_u128_shro17h0a5feea8783a26e2E():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:295
  d4:	e880 004c 	stmia.w	r0, {r2, r3, r6}
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/shift.rs:131
  d8:	f1d9 027f 	rsbs	r2, r9, #127	; 0x7f
  dc:	f04f 0100 	mov.w	r1, #0
  e0:	eb71 0207 	sbcs.w	r2, r1, r7
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:295
  e4:	60c5      	str	r5, [r0, #12]
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/shift.rs:131
  e6:	eb71 0208 	sbcs.w	r2, r1, r8
  ea:	eb71 020c 	sbcs.w	r2, r1, ip
  ee:	bf38      	it	cc
  f0:	2101      	movcc	r1, #1
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:295
  f2:	7401      	strb	r1, [r0, #16]
  f4:	b001      	add	sp, #4
  f6:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}

Disassembly of section .text.__udivsi3:

00000000 <__udivsi3>:
__udivsi3():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:159
   0:	2900      	cmp	r1, #0
   2:	f000 80ae 	beq.w	162 <__udivsi3+0x162>
   6:	e92d 43f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, lr}
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:165
   a:	b138      	cbz	r0, 1c <__udivsi3+0x1c>
leading_zeros():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2239
   c:	fab0 f480 	clz	r4, r0
  10:	fab1 fe81 	clz	lr, r1
wrapping_sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2863
  14:	ebae 0304 	sub.w	r3, lr, r4
__udivsi3():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:172
  18:	2b20      	cmp	r3, #32
  1a:	d302      	bcc.n	22 <__udivsi3+0x22>
  1c:	2000      	movs	r0, #0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:216
  1e:	e8bd 83f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, pc}
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:177
  22:	2b1f      	cmp	r3, #31
  24:	d0fb      	beq.n	1e <__udivsi3+0x1e>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:184
  26:	f1c3 051f 	rsb	r5, r3, #31
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:181
  2a:	1c5a      	adds	r2, r3, #1
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:184
  2c:	f005 051f 	and.w	r5, r5, #31
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:185
  30:	f002 021f 	and.w	r2, r2, #31
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:192
  34:	2b03      	cmp	r3, #3
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:184
  36:	fa00 f905 	lsl.w	r9, r0, r5
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:192
  3a:	f10e 0501 	add.w	r5, lr, #1
  3e:	eba5 0504 	sub.w	r5, r5, r4
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:185
  42:	fa20 f202 	lsr.w	r2, r0, r2
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:192
  46:	f005 0c03 	and.w	ip, r5, #3
  4a:	d205      	bcs.n	58 <__udivsi3+0x58>
  4c:	f04f 0e00 	mov.w	lr, #0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:191
  50:	f1bc 0f00 	cmp.w	ip, #0
  54:	d14a      	bne.n	ec <__udivsi3+0xec>
  56:	e059      	b.n	10c <__udivsi3+0x10c>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:192
  58:	eb04 030c 	add.w	r3, r4, ip
  5c:	f04f 0801 	mov.w	r8, #1
  60:	3b01      	subs	r3, #1
  62:	eba3 030e 	sub.w	r3, r3, lr
  66:	f04f 0e00 	mov.w	lr, #0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:195
  6a:	ea4f 75d9 	mov.w	r5, r9, lsr #31
  6e:	ea45 0242 	orr.w	r2, r5, r2, lsl #1
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:191
  72:	3304      	adds	r3, #4
wrapping_sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2863
  74:	ea6f 0502 	mvn.w	r5, r2
  78:	440d      	add	r5, r1
__udivsi3():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:206
  7a:	ea01 76e5 	and.w	r6, r1, r5, asr #31
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:205
  7e:	ea08 75e5 	and.w	r5, r8, r5, asr #31
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:206
  82:	eba2 0206 	sub.w	r2, r2, r6
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:195
  86:	f3c9 7680 	ubfx	r6, r9, #30, #1
  8a:	ea46 0242 	orr.w	r2, r6, r2, lsl #1
wrapping_sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2863
  8e:	ea6f 0602 	mvn.w	r6, r2
  92:	440e      	add	r6, r1
__udivsi3():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:206
  94:	ea01 77e6 	and.w	r7, r1, r6, asr #31
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:205
  98:	ea08 76e6 	and.w	r6, r8, r6, asr #31
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:206
  9c:	eba2 0207 	sub.w	r2, r2, r7
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:195
  a0:	f3c9 7740 	ubfx	r7, r9, #29, #1
  a4:	ea47 0242 	orr.w	r2, r7, r2, lsl #1
wrapping_sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2863
  a8:	ea6f 0702 	mvn.w	r7, r2
  ac:	440f      	add	r7, r1
__udivsi3():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:206
  ae:	ea01 74e7 	and.w	r4, r1, r7, asr #31
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:205
  b2:	ea08 77e7 	and.w	r7, r8, r7, asr #31
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:206
  b6:	eba2 0204 	sub.w	r2, r2, r4
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:195
  ba:	f3c9 7400 	ubfx	r4, r9, #28, #1
  be:	ea44 0242 	orr.w	r2, r4, r2, lsl #1
wrapping_sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2863
  c2:	ea6f 0402 	mvn.w	r4, r2
  c6:	440c      	add	r4, r1
__udivsi3():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:206
  c8:	ea01 70e4 	and.w	r0, r1, r4, asr #31
  cc:	eba2 0200 	sub.w	r2, r2, r0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:196
  d0:	ea4e 0049 	orr.w	r0, lr, r9, lsl #1
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:205
  d4:	ea08 7ee4 	and.w	lr, r8, r4, asr #31
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:196
  d8:	ea45 0040 	orr.w	r0, r5, r0, lsl #1
  dc:	ea46 0040 	orr.w	r0, r6, r0, lsl #1
  e0:	ea47 0940 	orr.w	r9, r7, r0, lsl #1
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:191
  e4:	d1c1      	bne.n	6a <__udivsi3+0x6a>
  e6:	f1bc 0f00 	cmp.w	ip, #0
  ea:	d00f      	beq.n	10c <__udivsi3+0x10c>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:195
  ec:	ea4f 75d9 	mov.w	r5, r9, lsr #31
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:196
  f0:	ea4e 0349 	orr.w	r3, lr, r9, lsl #1
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:195
  f4:	ea45 0542 	orr.w	r5, r5, r2, lsl #1
  f8:	2401      	movs	r4, #1
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:191
  fa:	f1bc 0f01 	cmp.w	ip, #1
wrapping_sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2863
  fe:	ea6f 0205 	mvn.w	r2, r5
 102:	440a      	add	r2, r1
__udivsi3():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:205
 104:	ea04 7ee2 	and.w	lr, r4, r2, asr #31
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:191
 108:	d104      	bne.n	114 <__udivsi3+0x114>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:196
 10a:	4699      	mov	r9, r3
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:209
 10c:	ea4e 0049 	orr.w	r0, lr, r9, lsl #1
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:216
 110:	e8bd 83f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, pc}
 114:	17d0      	asrs	r0, r2, #31
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:196
 116:	ea4e 0243 	orr.w	r2, lr, r3, lsl #1
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:206
 11a:	4008      	ands	r0, r1
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:195
 11c:	f3c9 7380 	ubfx	r3, r9, #30, #1
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:206
 120:	1a28      	subs	r0, r5, r0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:191
 122:	f1bc 0f02 	cmp.w	ip, #2
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:195
 126:	ea43 0340 	orr.w	r3, r3, r0, lsl #1
wrapping_sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2863
 12a:	ea6f 0003 	mvn.w	r0, r3
 12e:	eb00 0501 	add.w	r5, r0, r1
__udivsi3():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:205
 132:	ea04 7ee5 	and.w	lr, r4, r5, asr #31
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:191
 136:	d103      	bne.n	140 <__udivsi3+0x140>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:209
 138:	ea4e 0042 	orr.w	r0, lr, r2, lsl #1
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:216
 13c:	e8bd 83f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, pc}
 140:	17e8      	asrs	r0, r5, #31
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:196
 142:	ea4e 0242 	orr.w	r2, lr, r2, lsl #1
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:206
 146:	4008      	ands	r0, r1
 148:	1a18      	subs	r0, r3, r0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:195
 14a:	f3c9 7340 	ubfx	r3, r9, #29, #1
 14e:	ea43 0040 	orr.w	r0, r3, r0, lsl #1
wrapping_sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2863
 152:	43c0      	mvns	r0, r0
 154:	4408      	add	r0, r1
__udivsi3():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:204
 156:	ea4f 7ed0 	mov.w	lr, r0, lsr #31
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:209
 15a:	ea4e 0042 	orr.w	r0, lr, r2, lsl #1
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:216
 15e:	e8bd 83f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, pc}
abort():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/lib.rs:41
 162:	defe      	udf	#254	; 0xfe
 164:	defe      	udf	#254	; 0xfe

Disassembly of section .text.__aeabi_uidiv:

00000000 <__aeabi_uidiv>:
__aeabi_uidiv():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:159
   0:	2900      	cmp	r1, #0
   2:	f000 80a7 	beq.w	154 <__aeabi_uidiv+0x154>
   6:	e92d 43f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, lr}
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:165
   a:	b138      	cbz	r0, 1c <__aeabi_uidiv+0x1c>
leading_zeros():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2239
   c:	fab0 f480 	clz	r4, r0
  10:	fab1 fe81 	clz	lr, r1
wrapping_sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2863
  14:	ebae 0304 	sub.w	r3, lr, r4
__aeabi_uidiv():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:172
  18:	2b1f      	cmp	r3, #31
  1a:	d902      	bls.n	22 <__aeabi_uidiv+0x22>
  1c:	2000      	movs	r0, #0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
  1e:	e8bd 83f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, pc}
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:177
  22:	f000 8095 	beq.w	150 <__aeabi_uidiv+0x150>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:184
  26:	f1c3 051f 	rsb	r5, r3, #31
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:181
  2a:	1c5a      	adds	r2, r3, #1
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:184
  2c:	f005 051f 	and.w	r5, r5, #31
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:185
  30:	f002 021f 	and.w	r2, r2, #31
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:192
  34:	2b03      	cmp	r3, #3
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:184
  36:	fa00 f905 	lsl.w	r9, r0, r5
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:192
  3a:	f10e 0501 	add.w	r5, lr, #1
  3e:	eba5 0504 	sub.w	r5, r5, r4
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:185
  42:	fa20 f202 	lsr.w	r2, r0, r2
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:192
  46:	f005 0c03 	and.w	ip, r5, #3
  4a:	d205      	bcs.n	58 <__aeabi_uidiv+0x58>
  4c:	f04f 0e00 	mov.w	lr, #0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:191
  50:	f1bc 0f00 	cmp.w	ip, #0
  54:	d149      	bne.n	ea <__aeabi_uidiv+0xea>
  56:	e079      	b.n	14c <__aeabi_uidiv+0x14c>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:192
  58:	eb04 030c 	add.w	r3, r4, ip
  5c:	f04f 0801 	mov.w	r8, #1
  60:	3b01      	subs	r3, #1
  62:	eba3 030e 	sub.w	r3, r3, lr
  66:	f04f 0e00 	mov.w	lr, #0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:195
  6a:	0052      	lsls	r2, r2, #1
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:191
  6c:	3304      	adds	r3, #4
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:195
  6e:	ea42 72d9 	orr.w	r2, r2, r9, lsr #31
wrapping_sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2863
  72:	ea6f 0502 	mvn.w	r5, r2
  76:	440d      	add	r5, r1
__aeabi_uidiv():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:206
  78:	ea01 76e5 	and.w	r6, r1, r5, asr #31
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:205
  7c:	ea08 75e5 	and.w	r5, r8, r5, asr #31
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:206
  80:	eba2 0206 	sub.w	r2, r2, r6
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:195
  84:	f3c9 7680 	ubfx	r6, r9, #30, #1
  88:	ea46 0242 	orr.w	r2, r6, r2, lsl #1
wrapping_sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2863
  8c:	ea6f 0602 	mvn.w	r6, r2
  90:	440e      	add	r6, r1
__aeabi_uidiv():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:206
  92:	ea01 77e6 	and.w	r7, r1, r6, asr #31
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:205
  96:	ea08 76e6 	and.w	r6, r8, r6, asr #31
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:206
  9a:	eba2 0207 	sub.w	r2, r2, r7
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:195
  9e:	f3c9 7740 	ubfx	r7, r9, #29, #1
  a2:	ea47 0242 	orr.w	r2, r7, r2, lsl #1
wrapping_sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2863
  a6:	ea6f 0702 	mvn.w	r7, r2
  aa:	440f      	add	r7, r1
__aeabi_uidiv():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:206
  ac:	ea01 74e7 	and.w	r4, r1, r7, asr #31
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:205
  b0:	ea08 77e7 	and.w	r7, r8, r7, asr #31
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:206
  b4:	eba2 0204 	sub.w	r2, r2, r4
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:195
  b8:	f3c9 7400 	ubfx	r4, r9, #28, #1
  bc:	ea44 0242 	orr.w	r2, r4, r2, lsl #1
wrapping_sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2863
  c0:	ea6f 0402 	mvn.w	r4, r2
  c4:	440c      	add	r4, r1
__aeabi_uidiv():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:206
  c6:	ea01 70e4 	and.w	r0, r1, r4, asr #31
  ca:	eba2 0200 	sub.w	r2, r2, r0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:196
  ce:	ea4e 0049 	orr.w	r0, lr, r9, lsl #1
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:205
  d2:	ea08 7ee4 	and.w	lr, r8, r4, asr #31
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:196
  d6:	ea45 0040 	orr.w	r0, r5, r0, lsl #1
  da:	ea46 0040 	orr.w	r0, r6, r0, lsl #1
  de:	ea47 0940 	orr.w	r9, r7, r0, lsl #1
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:191
  e2:	d1c2      	bne.n	6a <__aeabi_uidiv+0x6a>
  e4:	f1bc 0f00 	cmp.w	ip, #0
  e8:	d030      	beq.n	14c <__aeabi_uidiv+0x14c>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:195
  ea:	0052      	lsls	r2, r2, #1
  ec:	ea42 75d9 	orr.w	r5, r2, r9, lsr #31
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:196
  f0:	ea4e 0349 	orr.w	r3, lr, r9, lsl #1
  f4:	2401      	movs	r4, #1
wrapping_sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2863
  f6:	43ea      	mvns	r2, r5
__aeabi_uidiv():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:191
  f8:	f1bc 0f01 	cmp.w	ip, #1
wrapping_sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2863
  fc:	440a      	add	r2, r1
__aeabi_uidiv():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:205
  fe:	ea04 7ee2 	and.w	lr, r4, r2, asr #31
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:191
 102:	d101      	bne.n	108 <__aeabi_uidiv+0x108>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:196
 104:	4699      	mov	r9, r3
 106:	e021      	b.n	14c <__aeabi_uidiv+0x14c>
 108:	17d0      	asrs	r0, r2, #31
 10a:	ea4e 0243 	orr.w	r2, lr, r3, lsl #1
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:206
 10e:	4008      	ands	r0, r1
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:195
 110:	f3c9 7380 	ubfx	r3, r9, #30, #1
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:206
 114:	1a28      	subs	r0, r5, r0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:191
 116:	f1bc 0f02 	cmp.w	ip, #2
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:195
 11a:	ea43 0340 	orr.w	r3, r3, r0, lsl #1
wrapping_sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2863
 11e:	ea6f 0003 	mvn.w	r0, r3
 122:	eb00 0501 	add.w	r5, r0, r1
__aeabi_uidiv():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:205
 126:	ea04 7ee5 	and.w	lr, r4, r5, asr #31
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:191
 12a:	d101      	bne.n	130 <__aeabi_uidiv+0x130>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:196
 12c:	4691      	mov	r9, r2
 12e:	e00d      	b.n	14c <__aeabi_uidiv+0x14c>
 130:	17e8      	asrs	r0, r5, #31
 132:	ea4e 0242 	orr.w	r2, lr, r2, lsl #1
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:206
 136:	4008      	ands	r0, r1
 138:	1a18      	subs	r0, r3, r0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:195
 13a:	f3c9 7340 	ubfx	r3, r9, #29, #1
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:196
 13e:	4691      	mov	r9, r2
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:195
 140:	ea43 0040 	orr.w	r0, r3, r0, lsl #1
wrapping_sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2863
 144:	43c0      	mvns	r0, r0
 146:	4408      	add	r0, r1
__aeabi_uidiv():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:204
 148:	ea4f 7ed0 	mov.w	lr, r0, lsr #31
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:209
 14c:	ea4e 0049 	orr.w	r0, lr, r9, lsl #1
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
 150:	e8bd 83f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, pc}
abort():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/lib.rs:41
 154:	defe      	udf	#254	; 0xfe
 156:	defe      	udf	#254	; 0xfe

Disassembly of section .text._ZN17compiler_builtins3int4udiv9__umodsi317h64b67705e2fe5457E:

00000000 <compiler_builtins::int::udiv::__umodsi3>:
_ZN17compiler_builtins3int4udiv9__umodsi317h64b67705e2fe5457E():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:77
   0:	f7ff bffe 	b.w	0 <__umodsi3>

Disassembly of section .text._ZN17compiler_builtins3int4udiv12__udivmodsi417h9cf0f22494bf3884E:

00000000 <compiler_builtins::int::udiv::__udivmodsi4>:
_ZN17compiler_builtins3int4udiv12__udivmodsi417h9cf0f22494bf3884E():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:77
   0:	f7ff bffe 	b.w	0 <__udivmodsi4>

Disassembly of section .text.__udivdi3:

00000000 <__udivdi3>:
__udivdi3():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:254
   0:	b580      	push	{r7, lr}
   2:	b082      	sub	sp, #8
   4:	f04f 0c00 	mov.w	ip, #0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:238
   8:	f8cd c000 	str.w	ip, [sp]
   c:	f7ff fffe 	bl	0 <__udivdi3>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
  10:	b002      	add	sp, #8
  12:	bd80      	pop	{r7, pc}

Disassembly of section .text.__umoddi3:

00000000 <__umoddi3>:
__umoddi3():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:254
   0:	b580      	push	{r7, lr}
   2:	b084      	sub	sp, #16
   4:	f04f 0c00 	mov.w	ip, #0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:244
   8:	e9cd cc02 	strd	ip, ip, [sp, #8]
   c:	f10d 0c08 	add.w	ip, sp, #8
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:245
  10:	f8cd c000 	str.w	ip, [sp]
  14:	f7ff fffe 	bl	0 <__umoddi3>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:246
  18:	e9dd 0102 	ldrd	r0, r1, [sp, #8]
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
  1c:	b004      	add	sp, #16
  1e:	bd80      	pop	{r7, pc}

Disassembly of section .text.__udivti3:

00000000 <__udivti3>:
__udivti3():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:254
   0:	b580      	push	{r7, lr}
   2:	b086      	sub	sp, #24
   4:	f04f 0c00 	mov.w	ip, #0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:252
   8:	f8cd c010 	str.w	ip, [sp, #16]
   c:	f8dd c02c 	ldr.w	ip, [sp, #44]	; 0x2c
  10:	f8cd c00c 	str.w	ip, [sp, #12]
  14:	f8dd c028 	ldr.w	ip, [sp, #40]	; 0x28
  18:	f8cd c008 	str.w	ip, [sp, #8]
  1c:	f8dd c024 	ldr.w	ip, [sp, #36]	; 0x24
  20:	f8cd c004 	str.w	ip, [sp, #4]
  24:	f8dd c020 	ldr.w	ip, [sp, #32]
  28:	f8cd c000 	str.w	ip, [sp]
  2c:	f7ff fffe 	bl	0 <__udivti3>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
  30:	b006      	add	sp, #24
  32:	bd80      	pop	{r7, pc}

Disassembly of section .text.__umodti3:

00000000 <__umodti3>:
__umodti3():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:254
   0:	b580      	push	{r7, lr}
   2:	b08a      	sub	sp, #40	; 0x28
   4:	f04f 0c00 	mov.w	ip, #0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:258
   8:	e9cd cc08 	strd	ip, ip, [sp, #32]
   c:	e9cd cc06 	strd	ip, ip, [sp, #24]
  10:	f10d 0c18 	add.w	ip, sp, #24
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:259
  14:	f8cd c010 	str.w	ip, [sp, #16]
  18:	f8dd c03c 	ldr.w	ip, [sp, #60]	; 0x3c
  1c:	f8cd c00c 	str.w	ip, [sp, #12]
  20:	f8dd c038 	ldr.w	ip, [sp, #56]	; 0x38
  24:	f8cd c008 	str.w	ip, [sp, #8]
  28:	f8dd c034 	ldr.w	ip, [sp, #52]	; 0x34
  2c:	f8cd c004 	str.w	ip, [sp, #4]
  30:	f8dd c030 	ldr.w	ip, [sp, #48]	; 0x30
  34:	f8cd c000 	str.w	ip, [sp]
  38:	f7ff fffe 	bl	0 <__umodti3>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:260
  3c:	ab06      	add	r3, sp, #24
  3e:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
  40:	b00a      	add	sp, #40	; 0x28
  42:	bd80      	pop	{r7, pc}

Disassembly of section .text.__udivmoddi4:

00000000 <__udivmoddi4>:
__udivmoddi4():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:254
   0:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
   4:	b085      	sub	sp, #20
   6:	9d0e      	ldr	r5, [sp, #56]	; 0x38
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:265
   8:	b149      	cbz	r1, 1e <__udivmoddi4+0x1e>
   a:	b1ba      	cbz	r2, 3c <__udivmoddi4+0x3c>
   c:	b393      	cbz	r3, 74 <__udivmoddi4+0x74>
leading_zeros():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2239
   e:	fab1 f781 	clz	r7, r1
  12:	fab3 f683 	clz	r6, r3
wrapping_sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2863
  16:	1bf6      	subs	r6, r6, r7
__udivmoddi4():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:265
  18:	2e1f      	cmp	r6, #31
  1a:	d820      	bhi.n	5e <__udivmoddi4+0x5e>
  1c:	e025      	b.n	6a <__udivmoddi4+0x6a>
  1e:	b9f3      	cbnz	r3, 5e <__udivmoddi4+0x5e>
  20:	2d00      	cmp	r5, #0
  22:	f000 814e 	beq.w	2c2 <__udivmoddi4+0x2c2>
checked_rem():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2608
  26:	2a00      	cmp	r2, #0
  28:	f000 81b2 	beq.w	390 <__udivmoddi4+0x390>
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2611
  2c:	fbb0 f3f2 	udiv	r3, r0, r2
  30:	2100      	movs	r1, #0
  32:	fb03 0312 	mls	r3, r3, r2, r0
__udivmoddi4():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:265
  36:	e9c5 3100 	strd	r3, r1, [r5]
  3a:	e144      	b.n	2c6 <__udivmoddi4+0x2c6>
  3c:	2b00      	cmp	r3, #0
  3e:	f000 81a7 	beq.w	390 <__udivmoddi4+0x390>
  42:	2800      	cmp	r0, #0
  44:	f000 810c 	beq.w	260 <__udivmoddi4+0x260>
wrapping_sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2863
  48:	1e5f      	subs	r7, r3, #1
__udivmoddi4():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:265
  4a:	421f      	tst	r7, r3
  4c:	f000 815d 	beq.w	30a <__udivmoddi4+0x30a>
leading_zeros():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2239
  50:	fab1 f781 	clz	r7, r1
  54:	fab3 f683 	clz	r6, r3
wrapping_sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2863
  58:	1bf6      	subs	r6, r6, r7
__udivmoddi4():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:265
  5a:	2e1e      	cmp	r6, #30
  5c:	d905      	bls.n	6a <__udivmoddi4+0x6a>
  5e:	2d00      	cmp	r5, #0
  60:	bf18      	it	ne
  62:	e9c5 0100 	strdne	r0, r1, [r5]
  66:	2000      	movs	r0, #0
  68:	e15d      	b.n	326 <__udivmoddi4+0x326>
  6a:	f1c6 073f 	rsb	r7, r6, #63	; 0x3f
  6e:	f106 0a01 	add.w	sl, r6, #1
  72:	e00c      	b.n	8e <__udivmoddi4+0x8e>
wrapping_sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2863
  74:	1e57      	subs	r7, r2, #1
__udivmoddi4():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:265
  76:	4217      	tst	r7, r2
  78:	f000 8128 	beq.w	2cc <__udivmoddi4+0x2cc>
leading_zeros():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2239
  7c:	fab2 f682 	clz	r6, r2
  80:	fab1 f781 	clz	r7, r1
__udivmoddi4():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:265
  84:	3621      	adds	r6, #33	; 0x21
  86:	eba6 0a07 	sub.w	sl, r6, r7
  8a:	f1ca 0700 	rsb	r7, sl, #0
  8e:	f007 093f 	and.w	r9, r7, #63	; 0x3f
  92:	f00a 063f 	and.w	r6, sl, #63	; 0x3f
  96:	f1c9 0420 	rsb	r4, r9, #32
  9a:	f1a9 0820 	sub.w	r8, r9, #32
  9e:	fa01 f509 	lsl.w	r5, r1, r9
  a2:	f1b8 0f00 	cmp.w	r8, #0
  a6:	fa20 f404 	lsr.w	r4, r0, r4
  aa:	ea44 0e05 	orr.w	lr, r4, r5
  ae:	f1c6 0520 	rsb	r5, r6, #32
  b2:	f1a6 0720 	sub.w	r7, r6, #32
  b6:	e9cd 3201 	strd	r3, r2, [sp, #4]
  ba:	bfa8      	it	ge
  bc:	fa00 fe08 	lslge.w	lr, r0, r8
  c0:	fa20 f406 	lsr.w	r4, r0, r6
  c4:	fa01 f505 	lsl.w	r5, r1, r5
  c8:	ea44 0b05 	orr.w	fp, r4, r5
  cc:	2f00      	cmp	r7, #0
  ce:	bfa8      	it	ge
  d0:	fa21 fb07 	lsrge.w	fp, r1, r7
  d4:	fa00 fc09 	lsl.w	ip, r0, r9
  d8:	f1b8 0f00 	cmp.w	r8, #0
  dc:	bfa8      	it	ge
  de:	f04f 0c00 	movge.w	ip, #0
  e2:	fa21 f406 	lsr.w	r4, r1, r6
  e6:	2f00      	cmp	r7, #0
  e8:	f00a 0103 	and.w	r1, sl, #3
  ec:	f1aa 0001 	sub.w	r0, sl, #1
  f0:	bfa8      	it	ge
  f2:	2400      	movge	r4, #0
  f4:	2803      	cmp	r0, #3
  f6:	9100      	str	r1, [sp, #0]
  f8:	d202      	bcs.n	100 <__udivmoddi4+0x100>
  fa:	2100      	movs	r1, #0
  fc:	2700      	movs	r7, #0
  fe:	e080      	b.n	202 <__udivmoddi4+0x202>
 100:	e9dd 3201 	ldrd	r3, r2, [sp, #4]
 104:	eba1 090a 	sub.w	r9, r1, sl
 108:	2000      	movs	r0, #0
 10a:	2700      	movs	r7, #0
 10c:	46e2      	mov	sl, ip
 10e:	0061      	lsls	r1, r4, #1
 110:	ea4f 044b 	mov.w	r4, fp, lsl #1
 114:	ea44 74de 	orr.w	r4, r4, lr, lsr #31
 118:	e9cd 7003 	strd	r7, r0, [sp, #12]
 11c:	ea41 71db 	orr.w	r1, r1, fp, lsr #31
wrapping_sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2863
 120:	43e7      	mvns	r7, r4
 122:	18bf      	adds	r7, r7, r2
 124:	ea6f 0501 	mvn.w	r5, r1
 128:	eb45 0b03 	adc.w	fp, r5, r3
__udivmoddi4():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:265
 12c:	ea02 70eb 	and.w	r0, r2, fp, asr #31
 130:	ea03 77eb 	and.w	r7, r3, fp, asr #31
 134:	1a20      	subs	r0, r4, r0
 136:	f3ce 7480 	ubfx	r4, lr, #30, #1
 13a:	41b9      	sbcs	r1, r7
 13c:	0049      	lsls	r1, r1, #1
 13e:	ea41 71d0 	orr.w	r1, r1, r0, lsr #31
 142:	ea44 0040 	orr.w	r0, r4, r0, lsl #1
wrapping_sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2863
 146:	43c4      	mvns	r4, r0
 148:	43cf      	mvns	r7, r1
 14a:	18a4      	adds	r4, r4, r2
 14c:	eb47 0c03 	adc.w	ip, r7, r3
__udivmoddi4():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:265
 150:	ea02 77ec 	and.w	r7, r2, ip, asr #31
 154:	ea03 74ec 	and.w	r4, r3, ip, asr #31
 158:	1bc0      	subs	r0, r0, r7
 15a:	f3ce 7740 	ubfx	r7, lr, #29, #1
 15e:	41a1      	sbcs	r1, r4
 160:	0049      	lsls	r1, r1, #1
 162:	ea41 71d0 	orr.w	r1, r1, r0, lsr #31
 166:	ea47 0040 	orr.w	r0, r7, r0, lsl #1
wrapping_sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2863
 16a:	43c7      	mvns	r7, r0
 16c:	43cc      	mvns	r4, r1
 16e:	18bf      	adds	r7, r7, r2
 170:	eb44 0703 	adc.w	r7, r4, r3
__udivmoddi4():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:265
 174:	ea02 76e7 	and.w	r6, r2, r7, asr #31
 178:	ea03 74e7 	and.w	r4, r3, r7, asr #31
 17c:	1b80      	subs	r0, r0, r6
 17e:	f3ce 7600 	ubfx	r6, lr, #28, #1
 182:	41a1      	sbcs	r1, r4
 184:	0049      	lsls	r1, r1, #1
 186:	ea41 71d0 	orr.w	r1, r1, r0, lsr #31
 18a:	ea46 0040 	orr.w	r0, r6, r0, lsl #1
wrapping_sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2863
 18e:	43c6      	mvns	r6, r0
 190:	43cc      	mvns	r4, r1
 192:	18b6      	adds	r6, r6, r2
 194:	eb44 0603 	adc.w	r6, r4, r3
__udivmoddi4():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:265
 198:	ea02 75e6 	and.w	r5, r2, r6, asr #31
 19c:	ea03 74e6 	and.w	r4, r3, r6, asr #31
 1a0:	1b45      	subs	r5, r0, r5
 1a2:	eb61 0804 	sbc.w	r8, r1, r4
 1a6:	2401      	movs	r4, #1
 1a8:	ea04 71e6 	and.w	r1, r4, r6, asr #31
 1ac:	ea04 76eb 	and.w	r6, r4, fp, asr #31
 1b0:	46ab      	mov	fp, r5
 1b2:	9d04      	ldr	r5, [sp, #16]
 1b4:	ea04 70e7 	and.w	r0, r4, r7, asr #31
 1b8:	ea04 77ec 	and.w	r7, r4, ip, asr #31
 1bc:	ea45 044a 	orr.w	r4, r5, sl, lsl #1
 1c0:	9d03      	ldr	r5, [sp, #12]
 1c2:	f119 0904 	adds.w	r9, r9, #4
 1c6:	ea46 0644 	orr.w	r6, r6, r4, lsl #1
 1ca:	ea47 0746 	orr.w	r7, r7, r6, lsl #1
 1ce:	ea40 0c47 	orr.w	ip, r0, r7, lsl #1
 1d2:	ea4f 004e 	mov.w	r0, lr, lsl #1
 1d6:	ea40 70da 	orr.w	r0, r0, sl, lsr #31
 1da:	ea40 0005 	orr.w	r0, r0, r5
 1de:	46e2      	mov	sl, ip
 1e0:	ea4f 0040 	mov.w	r0, r0, lsl #1
 1e4:	ea40 70d4 	orr.w	r0, r0, r4, lsr #31
 1e8:	4644      	mov	r4, r8
 1ea:	ea4f 0040 	mov.w	r0, r0, lsl #1
 1ee:	ea40 70d6 	orr.w	r0, r0, r6, lsr #31
 1f2:	ea4f 0040 	mov.w	r0, r0, lsl #1
 1f6:	ea40 7ed7 	orr.w	lr, r0, r7, lsr #31
 1fa:	f04f 0700 	mov.w	r7, #0
 1fe:	4608      	mov	r0, r1
 200:	d185      	bne.n	10e <__udivmoddi4+0x10e>
 202:	9a00      	ldr	r2, [sp, #0]
 204:	2a00      	cmp	r2, #0
 206:	f000 80b4 	beq.w	372 <__udivmoddi4+0x372>
 20a:	ea4f 064b 	mov.w	r6, fp, lsl #1
 20e:	0060      	lsls	r0, r4, #1
 210:	ea46 76de 	orr.w	r6, r6, lr, lsr #31
 214:	ea40 70db 	orr.w	r0, r0, fp, lsr #31
 218:	f8dd 8008 	ldr.w	r8, [sp, #8]
 21c:	46f2      	mov	sl, lr
wrapping_sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2863
 21e:	43f4      	mvns	r4, r6
 220:	9b01      	ldr	r3, [sp, #4]
 222:	43c5      	mvns	r5, r0
 224:	eb14 0408 	adds.w	r4, r4, r8
 228:	415d      	adcs	r5, r3
 22a:	46be      	mov	lr, r7
__udivmoddi4():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:265
 22c:	ea41 094c 	orr.w	r9, r1, ip, lsl #1
 230:	ea4f 014a 	mov.w	r1, sl, lsl #1
 234:	ea08 74e5 	and.w	r4, r8, r5, asr #31
 238:	ea03 77e5 	and.w	r7, r3, r5, asr #31
 23c:	ebb6 0b04 	subs.w	fp, r6, r4
 240:	ea41 71dc 	orr.w	r1, r1, ip, lsr #31
 244:	eb60 0407 	sbc.w	r4, r0, r7
 248:	2001      	movs	r0, #1
 24a:	ea00 70e5 	and.w	r0, r0, r5, asr #31
 24e:	ea4e 0601 	orr.w	r6, lr, r1
 252:	2a01      	cmp	r2, #1
 254:	d110      	bne.n	278 <__udivmoddi4+0x278>
 256:	2700      	movs	r7, #0
 258:	46cc      	mov	ip, r9
 25a:	46b6      	mov	lr, r6
 25c:	4601      	mov	r1, r0
 25e:	e088      	b.n	372 <__udivmoddi4+0x372>
 260:	2d00      	cmp	r5, #0
 262:	bf1f      	itttt	ne
 264:	2000      	movne	r0, #0
checked_rem():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2611
 266:	fbb1 f2f3 	udivne	r2, r1, r3
 26a:	fb02 1213 	mlsne	r2, r2, r3, r1
__udivmoddi4():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:265
 26e:	e9c5 0200 	strdne	r0, r2, [r5]
checked_div():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2563
 272:	fbb1 f0f3 	udiv	r0, r1, r3
 276:	e056      	b.n	326 <__udivmoddi4+0x326>
__udivmoddi4():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:265
 278:	f3ca 7580 	ubfx	r5, sl, #30, #1
 27c:	0061      	lsls	r1, r4, #1
 27e:	ea45 054b 	orr.w	r5, r5, fp, lsl #1
 282:	ea41 71db 	orr.w	r1, r1, fp, lsr #31
 286:	4607      	mov	r7, r0
 288:	f04f 0c01 	mov.w	ip, #1
wrapping_sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2863
 28c:	43ec      	mvns	r4, r5
 28e:	43c8      	mvns	r0, r1
 290:	eb14 0408 	adds.w	r4, r4, r8
 294:	eb40 0403 	adc.w	r4, r0, r3
__udivmoddi4():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:265
 298:	ea08 70e4 	and.w	r0, r8, r4, asr #31
 29c:	ea03 7ee4 	and.w	lr, r3, r4, asr #31
 2a0:	ebb5 0b00 	subs.w	fp, r5, r0
 2a4:	ea4f 0046 	mov.w	r0, r6, lsl #1
 2a8:	eb61 050e 	sbc.w	r5, r1, lr
 2ac:	ea0c 71e4 	and.w	r1, ip, r4, asr #31
 2b0:	ea47 0c49 	orr.w	ip, r7, r9, lsl #1
 2b4:	ea40 7ed9 	orr.w	lr, r0, r9, lsr #31
 2b8:	2a02      	cmp	r2, #2
 2ba:	d138      	bne.n	32e <__udivmoddi4+0x32e>
 2bc:	2700      	movs	r7, #0
 2be:	462c      	mov	r4, r5
 2c0:	e057      	b.n	372 <__udivmoddi4+0x372>
checked_div():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2562
 2c2:	2a00      	cmp	r2, #0
 2c4:	d064      	beq.n	390 <__udivmoddi4+0x390>
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2563
 2c6:	fbb0 f0f2 	udiv	r0, r0, r2
 2ca:	e02c      	b.n	326 <__udivmoddi4+0x326>
__udivmoddi4():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:265
 2cc:	2d00      	cmp	r5, #0
 2ce:	bf1e      	ittt	ne
 2d0:	2300      	movne	r3, #0
 2d2:	4007      	andne	r7, r0
 2d4:	e9c5 7300 	strdne	r7, r3, [r5]
 2d8:	2a01      	cmp	r2, #1
 2da:	d025      	beq.n	328 <__udivmoddi4+0x328>
trailing_zeros():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2259
 2dc:	fa92 f2a2 	rbit	r2, r2
 2e0:	fab2 f282 	clz	r2, r2
__udivmoddi4():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:265
 2e4:	f1c2 0320 	rsb	r3, r2, #32
 2e8:	40d0      	lsrs	r0, r2
 2ea:	fa01 f303 	lsl.w	r3, r1, r3
 2ee:	4318      	orrs	r0, r3
 2f0:	f1a2 0320 	sub.w	r3, r2, #32
 2f4:	2b00      	cmp	r3, #0
 2f6:	bfa8      	it	ge
 2f8:	fa21 f003 	lsrge.w	r0, r1, r3
 2fc:	fa21 f102 	lsr.w	r1, r1, r2
 300:	bfa8      	it	ge
 302:	2100      	movge	r1, #0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
 304:	b005      	add	sp, #20
 306:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:265
 30a:	2d00      	cmp	r5, #0
 30c:	bf1c      	itt	ne
 30e:	ea07 0201 	andne.w	r2, r7, r1
 312:	e9c5 0200 	strdne	r0, r2, [r5]
trailing_zeros():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2259
 316:	fa93 f0a3 	rbit	r0, r3
 31a:	fab0 f080 	clz	r0, r0
__udivmoddi4():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:265
 31e:	f000 001f 	and.w	r0, r0, #31
 322:	fa21 f000 	lsr.w	r0, r1, r0
 326:	2100      	movs	r1, #0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
 328:	b005      	add	sp, #20
 32a:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:265
 32e:	f3ca 7440 	ubfx	r4, sl, #29, #1
 332:	006f      	lsls	r7, r5, #1
 334:	ea44 044b 	orr.w	r4, r4, fp, lsl #1
 338:	ea47 77db 	orr.w	r7, r7, fp, lsr #31
 33c:	ea41 014c 	orr.w	r1, r1, ip, lsl #1
 340:	ea4f 004e 	mov.w	r0, lr, lsl #1
wrapping_sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2863
 344:	43e6      	mvns	r6, r4
 346:	43fa      	mvns	r2, r7
 348:	eb16 0608 	adds.w	r6, r6, r8
__udivmoddi4():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:265
 34c:	ea40 7edc 	orr.w	lr, r0, ip, lsr #31
wrapping_sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2863
 350:	eb42 0603 	adc.w	r6, r2, r3
__udivmoddi4():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:265
 354:	468c      	mov	ip, r1
 356:	ea08 72e6 	and.w	r2, r8, r6, asr #31
 35a:	ea03 73e6 	and.w	r3, r3, r6, asr #31
 35e:	ebb4 0b02 	subs.w	fp, r4, r2
 362:	f04f 0201 	mov.w	r2, #1
 366:	ea02 72e6 	and.w	r2, r2, r6, asr #31
 36a:	eb67 0403 	sbc.w	r4, r7, r3
 36e:	2700      	movs	r7, #0
 370:	4611      	mov	r1, r2
 372:	980e      	ldr	r0, [sp, #56]	; 0x38
 374:	2800      	cmp	r0, #0
 376:	bf18      	it	ne
 378:	e9c0 b400 	strdne	fp, r4, [r0]
 37c:	ea41 004c 	orr.w	r0, r1, ip, lsl #1
 380:	ea4f 014e 	mov.w	r1, lr, lsl #1
 384:	ea41 71dc 	orr.w	r1, r1, ip, lsr #31
 388:	4339      	orrs	r1, r7
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
 38a:	b005      	add	sp, #20
 38c:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
 390:	defe      	udf	#254	; 0xfe
 392:	defe      	udf	#254	; 0xfe

Disassembly of section .text.__udivmodti4:

00000000 <__udivmodti4>:
__udivmodti4():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:254
   0:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
   4:	b08b      	sub	sp, #44	; 0x2c
   6:	e9dd a416 	ldrd	sl, r4, [sp, #88]	; 0x58
   a:	4605      	mov	r5, r0
   c:	e9dd b914 	ldrd	fp, r9, [sp, #80]	; 0x50
  10:	461e      	mov	r6, r3
  12:	f8dd 8060 	ldr.w	r8, [sp, #96]	; 0x60
  16:	468e      	mov	lr, r1
  18:	4617      	mov	r7, r2
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:273
  1a:	ea52 0003 	orrs.w	r0, r2, r3
  1e:	d018      	beq.n	52 <__udivmodti4+0x52>
  20:	ea5b 0009 	orrs.w	r0, fp, r9
  24:	d030      	beq.n	88 <__udivmodti4+0x88>
  26:	ea5a 0004 	orrs.w	r0, sl, r4
  2a:	d066      	beq.n	fa <__udivmodti4+0xfa>
leading_zeros():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2239
  2c:	fab7 f087 	clz	r0, r7
  30:	faba f18a 	clz	r1, sl
  34:	3020      	adds	r0, #32
  36:	2e00      	cmp	r6, #0
  38:	f101 0120 	add.w	r1, r1, #32
  3c:	bf18      	it	ne
  3e:	fab6 f086 	clzne	r0, r6
  42:	2c00      	cmp	r4, #0
  44:	bf18      	it	ne
  46:	fab4 f184 	clzne	r1, r4
wrapping_sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2863
  4a:	1a09      	subs	r1, r1, r0
__udivmodti4():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:273
  4c:	293f      	cmp	r1, #63	; 0x3f
  4e:	d840      	bhi.n	d2 <__udivmodti4+0xd2>
  50:	e04e      	b.n	f0 <__udivmodti4+0xf0>
  52:	f1ba 0001 	subs.w	r0, sl, #1
  56:	f174 0000 	sbcs.w	r0, r4, #0
  5a:	d23a      	bcs.n	d2 <__udivmodti4+0xd2>
  5c:	f1b8 0f00 	cmp.w	r8, #0
  60:	f000 8335 	beq.w	6ce <__udivmodti4+0x6ce>
  64:	ea5b 0009 	orrs.w	r0, fp, r9
  68:	f000 845e 	beq.w	928 <__udivmodti4+0x928>
  6c:	2000      	movs	r0, #0
checked_rem():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2611
  6e:	4671      	mov	r1, lr
__udivmodti4():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:273
  70:	e9c8 0002 	strd	r0, r0, [r8, #8]
checked_rem():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2611
  74:	4628      	mov	r0, r5
  76:	465a      	mov	r2, fp
  78:	464b      	mov	r3, r9
  7a:	4676      	mov	r6, lr
  7c:	f7ff fffe 	bl	0 <__udivmodti4>
  80:	46b6      	mov	lr, r6
__udivmodti4():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:273
  82:	e9c8 2300 	strd	r2, r3, [r8]
  86:	e326      	b.n	6d6 <__udivmodti4+0x6d6>
  88:	ea5a 0004 	orrs.w	r0, sl, r4
  8c:	f000 844c 	beq.w	928 <__udivmodti4+0x928>
  90:	ea55 000e 	orrs.w	r0, r5, lr
  94:	f000 82b7 	beq.w	606 <__udivmodti4+0x606>
wrapping_sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2863
  98:	f1ba 0001 	subs.w	r0, sl, #1
  9c:	f164 0100 	sbc.w	r1, r4, #0
is_power_of_two():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:3507
  a0:	ea00 020a 	and.w	r2, r0, sl
  a4:	ea01 0304 	and.w	r3, r1, r4
  a8:	431a      	orrs	r2, r3
__udivmodti4():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:273
  aa:	f000 83a7 	beq.w	7fc <__udivmodti4+0x7fc>
leading_zeros():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2239
  ae:	fab7 f087 	clz	r0, r7
  b2:	faba f18a 	clz	r1, sl
  b6:	3020      	adds	r0, #32
  b8:	2e00      	cmp	r6, #0
  ba:	f101 0120 	add.w	r1, r1, #32
  be:	bf18      	it	ne
  c0:	fab6 f086 	clzne	r0, r6
  c4:	2c00      	cmp	r4, #0
  c6:	bf18      	it	ne
  c8:	fab4 f184 	clzne	r1, r4
wrapping_sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2863
  cc:	1a09      	subs	r1, r1, r0
__udivmodti4():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:273
  ce:	293e      	cmp	r1, #62	; 0x3e
  d0:	d90e      	bls.n	f0 <__udivmodti4+0xf0>
  d2:	f1b8 0f00 	cmp.w	r8, #0
  d6:	bf1f      	itttt	ne
  d8:	f8c8 5000 	strne.w	r5, [r8]
  dc:	f8c8 e004 	strne.w	lr, [r8, #4]
  e0:	f8c8 7008 	strne.w	r7, [r8, #8]
  e4:	f8c8 600c 	strne.w	r6, [r8, #12]
  e8:	2500      	movs	r5, #0
  ea:	f04f 0e00 	mov.w	lr, #0
  ee:	e2fa      	b.n	6e6 <__udivmodti4+0x6e6>
  f0:	f1c1 007f 	rsb	r0, r1, #127	; 0x7f
  f4:	462c      	mov	r4, r5
  f6:	3101      	adds	r1, #1
  f8:	e01e      	b.n	138 <__udivmodti4+0x138>
wrapping_sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2863
  fa:	f1bb 0001 	subs.w	r0, fp, #1
  fe:	f169 0100 	sbc.w	r1, r9, #0
is_power_of_two():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:3507
 102:	ea00 020b 	and.w	r2, r0, fp
 106:	ea01 0309 	and.w	r3, r1, r9
 10a:	431a      	orrs	r2, r3
__udivmodti4():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:273
 10c:	f000 82ee 	beq.w	6ec <__udivmodti4+0x6ec>
leading_zeros():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2239
 110:	fab7 f087 	clz	r0, r7
 114:	fabb f18b 	clz	r1, fp
 118:	3020      	adds	r0, #32
 11a:	2e00      	cmp	r6, #0
 11c:	f101 0120 	add.w	r1, r1, #32
 120:	bf18      	it	ne
 122:	fab6 f086 	clzne	r0, r6
 126:	f1b9 0f00 	cmp.w	r9, #0
 12a:	bf18      	it	ne
 12c:	fab9 f189 	clzne	r1, r9
__udivmodti4():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:273
 130:	3141      	adds	r1, #65	; 0x41
 132:	462c      	mov	r4, r5
 134:	1a09      	subs	r1, r1, r0
 136:	4248      	negs	r0, r1
 138:	f001 087f 	and.w	r8, r1, #127	; 0x7f
 13c:	9106      	str	r1, [sp, #24]
 13e:	f1a8 0140 	sub.w	r1, r8, #64	; 0x40
 142:	f1c8 0260 	rsb	r2, r8, #96	; 0x60
 146:	9105      	str	r1, [sp, #20]
 148:	f1c8 0520 	rsb	r5, r8, #32
 14c:	fa27 f101 	lsr.w	r1, r7, r1
 150:	46bc      	mov	ip, r7
 152:	fa06 f202 	lsl.w	r2, r6, r2
 156:	ea41 0702 	orr.w	r7, r1, r2
 15a:	f1a8 0160 	sub.w	r1, r8, #96	; 0x60
 15e:	9104      	str	r1, [sp, #16]
 160:	2900      	cmp	r1, #0
 162:	bfa8      	it	ge
 164:	fa26 f701 	lsrge.w	r7, r6, r1
 168:	fa24 f108 	lsr.w	r1, r4, r8
 16c:	fa0e f205 	lsl.w	r2, lr, r5
 170:	4311      	orrs	r1, r2
 172:	f1a8 0220 	sub.w	r2, r8, #32
 176:	9508      	str	r5, [sp, #32]
 178:	2a00      	cmp	r2, #0
 17a:	9209      	str	r2, [sp, #36]	; 0x24
 17c:	bfa8      	it	ge
 17e:	fa2e f102 	lsrge.w	r1, lr, r2
 182:	f1c8 0240 	rsb	r2, r8, #64	; 0x40
 186:	f000 0b7f 	and.w	fp, r0, #127	; 0x7f
 18a:	2d00      	cmp	r5, #0
 18c:	9203      	str	r2, [sp, #12]
 18e:	fa0c f302 	lsl.w	r3, ip, r2
 192:	f1ab 0040 	sub.w	r0, fp, #64	; 0x40
 196:	bfa8      	it	ge
 198:	2300      	movge	r3, #0
 19a:	f1b8 0f40 	cmp.w	r8, #64	; 0x40
 19e:	bf38      	it	cc
 1a0:	ea41 0703 	orrcc.w	r7, r1, r3
 1a4:	f1cb 0160 	rsb	r1, fp, #96	; 0x60
 1a8:	f1b8 0f00 	cmp.w	r8, #0
 1ac:	bf08      	it	eq
 1ae:	4627      	moveq	r7, r4
 1b0:	9002      	str	r0, [sp, #8]
 1b2:	fa0e f000 	lsl.w	r0, lr, r0
 1b6:	fa24 f101 	lsr.w	r1, r4, r1
 1ba:	f1cb 0520 	rsb	r5, fp, #32
 1be:	4308      	orrs	r0, r1
 1c0:	f1ab 0160 	sub.w	r1, fp, #96	; 0x60
 1c4:	9707      	str	r7, [sp, #28]
 1c6:	2900      	cmp	r1, #0
 1c8:	9101      	str	r1, [sp, #4]
 1ca:	bfa8      	it	ge
 1cc:	fa04 f001 	lslge.w	r0, r4, r1
 1d0:	fa2c f105 	lsr.w	r1, ip, r5
 1d4:	fa06 f30b 	lsl.w	r3, r6, fp
 1d8:	46b2      	mov	sl, r6
 1da:	430b      	orrs	r3, r1
 1dc:	f1ab 0120 	sub.w	r1, fp, #32
 1e0:	f1cb 0640 	rsb	r6, fp, #64	; 0x40
 1e4:	2900      	cmp	r1, #0
 1e6:	bfa8      	it	ge
 1e8:	fa0c f301 	lslge.w	r3, ip, r1
 1ec:	fa2e f706 	lsr.w	r7, lr, r6
 1f0:	2d00      	cmp	r5, #0
 1f2:	bfa8      	it	ge
 1f4:	2700      	movge	r7, #0
 1f6:	f1bb 0f40 	cmp.w	fp, #64	; 0x40
 1fa:	bf38      	it	cc
 1fc:	ea43 0007 	orrcc.w	r0, r3, r7
 200:	f1bb 0f00 	cmp.w	fp, #0
 204:	bf08      	it	eq
 206:	4650      	moveq	r0, sl
 208:	fa0e f30b 	lsl.w	r3, lr, fp
 20c:	fa24 f705 	lsr.w	r7, r4, r5
 210:	ea47 0903 	orr.w	r9, r7, r3
 214:	900a      	str	r0, [sp, #40]	; 0x28
 216:	2900      	cmp	r1, #0
 218:	bfa8      	it	ge
 21a:	fa04 f901 	lslge.w	r9, r4, r1
 21e:	2000      	movs	r0, #0
 220:	f1bb 0f40 	cmp.w	fp, #64	; 0x40
 224:	bf28      	it	cs
 226:	4681      	movcs	r9, r0
 228:	9808      	ldr	r0, [sp, #32]
 22a:	fa2c f708 	lsr.w	r7, ip, r8
 22e:	2300      	movs	r3, #0
 230:	fa0a f200 	lsl.w	r2, sl, r0
 234:	4660      	mov	r0, ip
 236:	46f4      	mov	ip, lr
 238:	ea47 0e02 	orr.w	lr, r7, r2
 23c:	9a09      	ldr	r2, [sp, #36]	; 0x24
 23e:	f1c6 0720 	rsb	r7, r6, #32
 242:	2a00      	cmp	r2, #0
 244:	bfa8      	it	ge
 246:	fa2a fe02 	lsrge.w	lr, sl, r2
 24a:	fa24 f206 	lsr.w	r2, r4, r6
 24e:	f1b8 0f40 	cmp.w	r8, #64	; 0x40
 252:	fa0c f707 	lsl.w	r7, ip, r7
 256:	ea42 0207 	orr.w	r2, r2, r7
 25a:	bf28      	it	cs
 25c:	469e      	movcs	lr, r3
 25e:	2d00      	cmp	r5, #0
 260:	bfa8      	it	ge
 262:	fa2c f205 	lsrge.w	r2, ip, r5
 266:	fa00 f50b 	lsl.w	r5, r0, fp
 26a:	2900      	cmp	r1, #0
 26c:	bfa8      	it	ge
 26e:	2500      	movge	r5, #0
 270:	9b02      	ldr	r3, [sp, #8]
 272:	fa2c f708 	lsr.w	r7, ip, r8
 276:	9e01      	ldr	r6, [sp, #4]
 278:	fa04 f303 	lsl.w	r3, r4, r3
 27c:	2e00      	cmp	r6, #0
 27e:	bfa8      	it	ge
 280:	2300      	movge	r3, #0
 282:	f1bb 0f40 	cmp.w	fp, #64	; 0x40
 286:	bf38      	it	cc
 288:	ea45 0302 	orrcc.w	r3, r5, r2
 28c:	f1bb 0f00 	cmp.w	fp, #0
 290:	bf08      	it	eq
 292:	4603      	moveq	r3, r0
 294:	9d03      	ldr	r5, [sp, #12]
 296:	fa0a f205 	lsl.w	r2, sl, r5
 29a:	f1c5 0520 	rsb	r5, r5, #32
 29e:	fa20 f505 	lsr.w	r5, r0, r5
 2a2:	432a      	orrs	r2, r5
 2a4:	9d08      	ldr	r5, [sp, #32]
 2a6:	2d00      	cmp	r5, #0
 2a8:	bfa8      	it	ge
 2aa:	fa00 f205 	lslge.w	r2, r0, r5
 2ae:	9809      	ldr	r0, [sp, #36]	; 0x24
 2b0:	2800      	cmp	r0, #0
 2b2:	bfa8      	it	ge
 2b4:	2700      	movge	r7, #0
 2b6:	9805      	ldr	r0, [sp, #20]
 2b8:	9d04      	ldr	r5, [sp, #16]
 2ba:	fa2a f000 	lsr.w	r0, sl, r0
 2be:	2d00      	cmp	r5, #0
 2c0:	bfa8      	it	ge
 2c2:	2000      	movge	r0, #0
 2c4:	f1b8 0f40 	cmp.w	r8, #64	; 0x40
 2c8:	bf38      	it	cc
 2ca:	ea47 0002 	orrcc.w	r0, r7, r2
 2ce:	f1b8 0f00 	cmp.w	r8, #0
 2d2:	bf08      	it	eq
 2d4:	4660      	moveq	r0, ip
 2d6:	fa04 fc0b 	lsl.w	ip, r4, fp
 2da:	2900      	cmp	r1, #0
 2dc:	bfa8      	it	ge
 2de:	f04f 0c00 	movge.w	ip, #0
 2e2:	2100      	movs	r1, #0
 2e4:	f1bb 0f40 	cmp.w	fp, #64	; 0x40
 2e8:	9e06      	ldr	r6, [sp, #24]
 2ea:	bf28      	it	cs
 2ec:	468c      	movcs	ip, r1
 2ee:	9909      	ldr	r1, [sp, #36]	; 0x24
 2f0:	fa2a fb08 	lsr.w	fp, sl, r8
 2f4:	f006 0703 	and.w	r7, r6, #3
 2f8:	f04f 0a00 	mov.w	sl, #0
 2fc:	2900      	cmp	r1, #0
 2fe:	bfa8      	it	ge
 300:	f04f 0b00 	movge.w	fp, #0
 304:	f1b8 0f40 	cmp.w	r8, #64	; 0x40
 308:	f1a6 0101 	sub.w	r1, r6, #1
 30c:	bf28      	it	cs
 30e:	46d3      	movcs	fp, sl
 310:	2903      	cmp	r1, #3
 312:	9703      	str	r7, [sp, #12]
 314:	d204      	bcs.n	320 <__udivmodti4+0x320>
 316:	9e0a      	ldr	r6, [sp, #40]	; 0x28
 318:	2400      	movs	r4, #0
 31a:	f8dd 801c 	ldr.w	r8, [sp, #28]
 31e:	e10e      	b.n	53e <__udivmodti4+0x53e>
 320:	1bbf      	subs	r7, r7, r6
 322:	9e0a      	ldr	r6, [sp, #40]	; 0x28
 324:	f8dd 801c 	ldr.w	r8, [sp, #28]
 328:	2100      	movs	r1, #0
 32a:	2400      	movs	r4, #0
 32c:	4665      	mov	r5, ip
 32e:	464a      	mov	r2, r9
 330:	e9cd 5204 	strd	r5, r2, [sp, #16]
 334:	e9cd 4106 	strd	r4, r1, [sp, #24]
 338:	ea4f 014b 	mov.w	r1, fp, lsl #1
 33c:	e9cd 7308 	strd	r7, r3, [sp, #32]
 340:	ea4f 034e 	mov.w	r3, lr, lsl #1
 344:	ea4f 0748 	mov.w	r7, r8, lsl #1
 348:	ea43 73d0 	orr.w	r3, r3, r0, lsr #31
 34c:	0040      	lsls	r0, r0, #1
 34e:	ea47 77d6 	orr.w	r7, r7, r6, lsr #31
 352:	ea40 70d8 	orr.w	r0, r0, r8, lsr #31
 356:	f8dd c054 	ldr.w	ip, [sp, #84]	; 0x54
 35a:	f8dd 8050 	ldr.w	r8, [sp, #80]	; 0x50
 35e:	46b3      	mov	fp, r6
wrapping_sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2863
 360:	960a      	str	r6, [sp, #40]	; 0x28
 362:	43fe      	mvns	r6, r7
 364:	43c4      	mvns	r4, r0
 366:	eb16 0608 	adds.w	r6, r6, r8
__udivmodti4():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:273
 36a:	ea41 71de 	orr.w	r1, r1, lr, lsr #31
 36e:	4662      	mov	r2, ip
wrapping_sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2863
 370:	eb54 040c 	adcs.w	r4, r4, ip
 374:	f8dd c058 	ldr.w	ip, [sp, #88]	; 0x58
 378:	f8dd a05c 	ldr.w	sl, [sp, #92]	; 0x5c
 37c:	ea6f 0e03 	mvn.w	lr, r3
 380:	ea6f 0901 	mvn.w	r9, r1
 384:	eb5e 040c 	adcs.w	r4, lr, ip
 388:	eb49 090a 	adc.w	r9, r9, sl
 38c:	4665      	mov	r5, ip
__udivmodti4():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:273
 38e:	ea08 7ee9 	and.w	lr, r8, r9, asr #31
 392:	ea02 76e9 	and.w	r6, r2, r9, asr #31
 396:	ebb7 070e 	subs.w	r7, r7, lr
 39a:	ea0c 75e9 	and.w	r5, ip, r9, asr #31
 39e:	41b0      	sbcs	r0, r6
 3a0:	ea0a 74e9 	and.w	r4, sl, r9, asr #31
 3a4:	41ab      	sbcs	r3, r5
 3a6:	41a1      	sbcs	r1, r4
 3a8:	0049      	lsls	r1, r1, #1
 3aa:	ea41 76d3 	orr.w	r6, r1, r3, lsr #31
 3ae:	005b      	lsls	r3, r3, #1
 3b0:	f3cb 7180 	ubfx	r1, fp, #30, #1
 3b4:	ea43 73d0 	orr.w	r3, r3, r0, lsr #31
 3b8:	0040      	lsls	r0, r0, #1
 3ba:	ea40 70d7 	orr.w	r0, r0, r7, lsr #31
 3be:	ea41 0747 	orr.w	r7, r1, r7, lsl #1
 3c2:	4693      	mov	fp, r2
wrapping_sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2863
 3c4:	43dd      	mvns	r5, r3
 3c6:	43f9      	mvns	r1, r7
 3c8:	43c4      	mvns	r4, r0
 3ca:	eb11 0108 	adds.w	r1, r1, r8
 3ce:	ea6f 0e06 	mvn.w	lr, r6
 3d2:	eb54 0102 	adcs.w	r1, r4, r2
 3d6:	9a16      	ldr	r2, [sp, #88]	; 0x58
 3d8:	eb55 0102 	adcs.w	r1, r5, r2
 3dc:	eb4e 0c0a 	adc.w	ip, lr, sl
 3e0:	990a      	ldr	r1, [sp, #40]	; 0x28
__udivmodti4():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:273
 3e2:	ea0b 75ec 	and.w	r5, fp, ip, asr #31
 3e6:	ea08 7bec 	and.w	fp, r8, ip, asr #31
 3ea:	ebb7 070b 	subs.w	r7, r7, fp
 3ee:	ea02 74ec 	and.w	r4, r2, ip, asr #31
 3f2:	41a8      	sbcs	r0, r5
 3f4:	ea0a 7eec 	and.w	lr, sl, ip, asr #31
 3f8:	41a3      	sbcs	r3, r4
 3fa:	f3c1 7240 	ubfx	r2, r1, #29, #1
 3fe:	eb66 060e 	sbc.w	r6, r6, lr
 402:	ea42 0247 	orr.w	r2, r2, r7, lsl #1
 406:	0076      	lsls	r6, r6, #1
 408:	ea46 7bd3 	orr.w	fp, r6, r3, lsr #31
 40c:	005b      	lsls	r3, r3, #1
 40e:	ea43 74d0 	orr.w	r4, r3, r0, lsr #31
 412:	0040      	lsls	r0, r0, #1
 414:	9e15      	ldr	r6, [sp, #84]	; 0x54
 416:	ea40 70d7 	orr.w	r0, r0, r7, lsr #31
wrapping_sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2863
 41a:	43d7      	mvns	r7, r2
 41c:	eb17 0708 	adds.w	r7, r7, r8
 420:	ea6f 0304 	mvn.w	r3, r4
 424:	ea6f 0500 	mvn.w	r5, r0
 428:	9f16      	ldr	r7, [sp, #88]	; 0x58
 42a:	4175      	adcs	r5, r6
 42c:	ea6f 0e0b 	mvn.w	lr, fp
 430:	417b      	adcs	r3, r7
 432:	eb4e 030a 	adc.w	r3, lr, sl
 436:	463d      	mov	r5, r7
__udivmodti4():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:273
 438:	ea07 75e3 	and.w	r5, r7, r3, asr #31
 43c:	ea06 77e3 	and.w	r7, r6, r3, asr #31
 440:	ea08 76e3 	and.w	r6, r8, r3, asr #31
 444:	ea0a 7ee3 	and.w	lr, sl, r3, asr #31
 448:	1b92      	subs	r2, r2, r6
 44a:	41b8      	sbcs	r0, r7
 44c:	41ac      	sbcs	r4, r5
 44e:	eb6b 070e 	sbc.w	r7, fp, lr
 452:	0065      	lsls	r5, r4, #1
 454:	007f      	lsls	r7, r7, #1
 456:	ea45 75d0 	orr.w	r5, r5, r0, lsr #31
 45a:	ea47 77d4 	orr.w	r7, r7, r4, lsr #31
 45e:	0040      	lsls	r0, r0, #1
 460:	f3c1 7400 	ubfx	r4, r1, #28, #1
 464:	ea40 70d2 	orr.w	r0, r0, r2, lsr #31
 468:	ea44 0242 	orr.w	r2, r4, r2, lsl #1
 46c:	9915      	ldr	r1, [sp, #84]	; 0x54
wrapping_sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2863
 46e:	43c6      	mvns	r6, r0
 470:	ea6f 0b05 	mvn.w	fp, r5
 474:	43d4      	mvns	r4, r2
 476:	ea6f 0e07 	mvn.w	lr, r7
 47a:	eb14 0408 	adds.w	r4, r4, r8
 47e:	eb56 0401 	adcs.w	r4, r6, r1
 482:	9e16      	ldr	r6, [sp, #88]	; 0x58
 484:	eb5b 0406 	adcs.w	r4, fp, r6
 488:	eb4e 040a 	adc.w	r4, lr, sl
__udivmodti4():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:273
 48c:	ea08 78e4 	and.w	r8, r8, r4, asr #31
 490:	ea06 7ee4 	and.w	lr, r6, r4, asr #31
 494:	ea01 76e4 	and.w	r6, r1, r4, asr #31
 498:	ebb2 0808 	subs.w	r8, r2, r8
 49c:	41b0      	sbcs	r0, r6
 49e:	f04f 0601 	mov.w	r6, #1
 4a2:	ea0a 7be4 	and.w	fp, sl, r4, asr #31
 4a6:	eb75 0e0e 	sbcs.w	lr, r5, lr
 4aa:	ea06 72e3 	and.w	r2, r6, r3, asr #31
 4ae:	ea06 73e9 	and.w	r3, r6, r9, asr #31
 4b2:	9d04      	ldr	r5, [sp, #16]
 4b4:	eb67 0b0b 	sbc.w	fp, r7, fp
 4b8:	f8dd 9014 	ldr.w	r9, [sp, #20]
 4bc:	ea06 7ae4 	and.w	sl, r6, r4, asr #31
 4c0:	9f07      	ldr	r7, [sp, #28]
 4c2:	ea06 71ec 	and.w	r1, r6, ip, asr #31
 4c6:	ea47 0445 	orr.w	r4, r7, r5, lsl #1
 4ca:	ea4f 0649 	mov.w	r6, r9, lsl #1
 4ce:	ea46 77d5 	orr.w	r7, r6, r5, lsr #31
 4d2:	9d06      	ldr	r5, [sp, #24]
 4d4:	ea43 0344 	orr.w	r3, r3, r4, lsl #1
 4d8:	432f      	orrs	r7, r5
 4da:	ea41 0143 	orr.w	r1, r1, r3, lsl #1
 4de:	007e      	lsls	r6, r7, #1
 4e0:	ea46 76d4 	orr.w	r6, r6, r4, lsr #31
 4e4:	ea42 0c41 	orr.w	ip, r2, r1, lsl #1
 4e8:	9a09      	ldr	r2, [sp, #36]	; 0x24
 4ea:	0074      	lsls	r4, r6, #1
 4ec:	ea44 74d3 	orr.w	r4, r4, r3, lsr #31
 4f0:	0063      	lsls	r3, r4, #1
 4f2:	ea43 73d1 	orr.w	r3, r3, r1, lsr #31
 4f6:	0051      	lsls	r1, r2, #1
 4f8:	ea41 71d9 	orr.w	r1, r1, r9, lsr #31
 4fc:	4329      	orrs	r1, r5
 4fe:	4699      	mov	r9, r3
 500:	004b      	lsls	r3, r1, #1
 502:	ea43 73d7 	orr.w	r3, r3, r7, lsr #31
 506:	005f      	lsls	r7, r3, #1
 508:	ea47 77d6 	orr.w	r7, r7, r6, lsr #31
 50c:	9e0a      	ldr	r6, [sp, #40]	; 0x28
 50e:	0076      	lsls	r6, r6, #1
 510:	ea46 76d2 	orr.w	r6, r6, r2, lsr #31
 514:	464a      	mov	r2, r9
 516:	432e      	orrs	r6, r5
 518:	4665      	mov	r5, ip
 51a:	0076      	lsls	r6, r6, #1
 51c:	ea46 71d1 	orr.w	r1, r6, r1, lsr #31
 520:	0049      	lsls	r1, r1, #1
 522:	ea41 71d3 	orr.w	r1, r1, r3, lsr #31
 526:	0049      	lsls	r1, r1, #1
 528:	ea41 76d7 	orr.w	r6, r1, r7, lsr #31
 52c:	0079      	lsls	r1, r7, #1
 52e:	9f08      	ldr	r7, [sp, #32]
 530:	ea41 73d4 	orr.w	r3, r1, r4, lsr #31
 534:	2400      	movs	r4, #0
 536:	3704      	adds	r7, #4
 538:	4651      	mov	r1, sl
 53a:	f47f aef9 	bne.w	330 <__udivmodti4+0x330>
 53e:	f8cd a020 	str.w	sl, [sp, #32]
 542:	9903      	ldr	r1, [sp, #12]
 544:	f8dd a050 	ldr.w	sl, [sp, #80]	; 0x50
 548:	2900      	cmp	r1, #0
 54a:	f000 81cc 	beq.w	8e6 <__udivmodti4+0x8e6>
 54e:	ea4f 014b 	mov.w	r1, fp, lsl #1
 552:	9309      	str	r3, [sp, #36]	; 0x24
 554:	ea41 71de 	orr.w	r1, r1, lr, lsr #31
 558:	4633      	mov	r3, r6
 55a:	ea4f 0648 	mov.w	r6, r8, lsl #1
 55e:	0045      	lsls	r5, r0, #1
 560:	ea46 76d3 	orr.w	r6, r6, r3, lsr #31
wrapping_sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2863
 564:	910a      	str	r1, [sp, #40]	; 0x28
 566:	43c9      	mvns	r1, r1
__udivmodti4():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:273
 568:	ea4f 074e 	mov.w	r7, lr, lsl #1
 56c:	ea47 72d0 	orr.w	r2, r7, r0, lsr #31
 570:	ea45 75d8 	orr.w	r5, r5, r8, lsr #31
 574:	9107      	str	r1, [sp, #28]
wrapping_sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2863
 576:	43f1      	mvns	r1, r6
 578:	9815      	ldr	r0, [sp, #84]	; 0x54
 57a:	eb11 010a 	adds.w	r1, r1, sl
 57e:	f8dd b058 	ldr.w	fp, [sp, #88]	; 0x58
 582:	ea6f 0705 	mvn.w	r7, r5
 586:	eb57 0100 	adcs.w	r1, r7, r0
 58a:	ea6f 0e02 	mvn.w	lr, r2
 58e:	eb5e 010b 	adcs.w	r1, lr, fp
 592:	46d0      	mov	r8, sl
 594:	f8dd a05c 	ldr.w	sl, [sp, #92]	; 0x5c
 598:	465f      	mov	r7, fp
 59a:	9907      	ldr	r1, [sp, #28]
 59c:	eb41 010a 	adc.w	r1, r1, sl
__udivmodti4():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:273
 5a0:	ea07 7ee1 	and.w	lr, r7, r1, asr #31
 5a4:	ea08 77e1 	and.w	r7, r8, r1, asr #31
 5a8:	1bf6      	subs	r6, r6, r7
 5aa:	ea00 70e1 	and.w	r0, r0, r1, asr #31
 5ae:	eb75 0000 	sbcs.w	r0, r5, r0
 5b2:	ea0a 7be1 	and.w	fp, sl, r1, asr #31
 5b6:	eb72 0e0e 	sbcs.w	lr, r2, lr
 5ba:	9a0a      	ldr	r2, [sp, #40]	; 0x28
 5bc:	9d09      	ldr	r5, [sp, #36]	; 0x24
 5be:	eb62 0b0b 	sbc.w	fp, r2, fp
 5c2:	2201      	movs	r2, #1
 5c4:	ea02 72e1 	and.w	r2, r2, r1, asr #31
 5c8:	9908      	ldr	r1, [sp, #32]
 5ca:	9607      	str	r6, [sp, #28]
 5cc:	461e      	mov	r6, r3
 5ce:	ea41 084c 	orr.w	r8, r1, ip, lsl #1
 5d2:	ea4f 0149 	mov.w	r1, r9, lsl #1
 5d6:	ea41 71dc 	orr.w	r1, r1, ip, lsr #31
 5da:	ea44 0701 	orr.w	r7, r4, r1
 5de:	0069      	lsls	r1, r5, #1
 5e0:	ea41 71d9 	orr.w	r1, r1, r9, lsr #31
 5e4:	ea44 0301 	orr.w	r3, r4, r1
 5e8:	0071      	lsls	r1, r6, #1
 5ea:	ea41 71d5 	orr.w	r1, r1, r5, lsr #31
 5ee:	9d03      	ldr	r5, [sp, #12]
 5f0:	4321      	orrs	r1, r4
 5f2:	2d01      	cmp	r5, #1
 5f4:	d11a      	bne.n	62c <__udivmodti4+0x62c>
 5f6:	46c4      	mov	ip, r8
 5f8:	f8dd 801c 	ldr.w	r8, [sp, #28]
 5fc:	2400      	movs	r4, #0
 5fe:	46b9      	mov	r9, r7
 600:	460e      	mov	r6, r1
 602:	9208      	str	r2, [sp, #32]
 604:	e16f      	b.n	8e6 <__udivmodti4+0x8e6>
 606:	f1b8 0f00 	cmp.w	r8, #0
 60a:	d00a      	beq.n	622 <__udivmodti4+0x622>
 60c:	2000      	movs	r0, #0
checked_rem():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2611
 60e:	4631      	mov	r1, r6
__udivmodti4():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:273
 610:	e9c8 0000 	strd	r0, r0, [r8]
checked_rem():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2611
 614:	4638      	mov	r0, r7
 616:	4652      	mov	r2, sl
 618:	4623      	mov	r3, r4
 61a:	f7ff fffe 	bl	0 <__udivmodti4>
__udivmodti4():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:273
 61e:	e9c8 2302 	strd	r2, r3, [r8, #8]
checked_div():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2563
 622:	4638      	mov	r0, r7
 624:	4631      	mov	r1, r6
 626:	4652      	mov	r2, sl
 628:	4623      	mov	r3, r4
 62a:	e058      	b.n	6de <__udivmodti4+0x6de>
__udivmodti4():
 62c:	9305      	str	r3, [sp, #20]
 62e:	4634      	mov	r4, r6
 630:	9b07      	ldr	r3, [sp, #28]
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:273
 632:	ea4f 064e 	mov.w	r6, lr, lsl #1
 636:	9209      	str	r2, [sp, #36]	; 0x24
 638:	ea46 76d0 	orr.w	r6, r6, r0, lsr #31
 63c:	9106      	str	r1, [sp, #24]
 63e:	0040      	lsls	r0, r0, #1
 640:	940a      	str	r4, [sp, #40]	; 0x28
 642:	f3c4 7180 	ubfx	r1, r4, #30, #1
 646:	ea41 0143 	orr.w	r1, r1, r3, lsl #1
 64a:	9c14      	ldr	r4, [sp, #80]	; 0x50
 64c:	ea40 70d3 	orr.w	r0, r0, r3, lsr #31
 650:	ea4f 024b 	mov.w	r2, fp, lsl #1
wrapping_sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2863
 654:	43cb      	mvns	r3, r1
__udivmodti4():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:273
 656:	ea42 79de 	orr.w	r9, r2, lr, lsr #31
wrapping_sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2863
 65a:	191b      	adds	r3, r3, r4
 65c:	ea6f 0200 	mvn.w	r2, r0
 660:	9b15      	ldr	r3, [sp, #84]	; 0x54
 662:	46a4      	mov	ip, r4
 664:	ea6f 0e06 	mvn.w	lr, r6
 668:	ea6f 0b09 	mvn.w	fp, r9
 66c:	461c      	mov	r4, r3
 66e:	4153      	adcs	r3, r2
 670:	9b16      	ldr	r3, [sp, #88]	; 0x58
 672:	461d      	mov	r5, r3
 674:	eb53 030e 	adcs.w	r3, r3, lr
 678:	eb4b 030a 	adc.w	r3, fp, sl
__udivmodti4():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:273
 67c:	ea0c 72e3 	and.w	r2, ip, r3, asr #31
 680:	ea04 74e3 	and.w	r4, r4, r3, asr #31
 684:	1a8a      	subs	r2, r1, r2
 686:	ea05 75e3 	and.w	r5, r5, r3, asr #31
 68a:	41a0      	sbcs	r0, r4
 68c:	f04f 0101 	mov.w	r1, #1
 690:	ea01 74e3 	and.w	r4, r1, r3, asr #31
 694:	eb76 0e05 	sbcs.w	lr, r6, r5
 698:	9909      	ldr	r1, [sp, #36]	; 0x24
 69a:	ea0a 7be3 	and.w	fp, sl, r3, asr #31
 69e:	9d05      	ldr	r5, [sp, #20]
 6a0:	eb69 0b0b 	sbc.w	fp, r9, fp
 6a4:	ea41 0c48 	orr.w	ip, r1, r8, lsl #1
 6a8:	0079      	lsls	r1, r7, #1
 6aa:	ea41 79d8 	orr.w	r9, r1, r8, lsr #31
 6ae:	9408      	str	r4, [sp, #32]
 6b0:	0069      	lsls	r1, r5, #1
 6b2:	ea41 73d7 	orr.w	r3, r1, r7, lsr #31
 6b6:	9906      	ldr	r1, [sp, #24]
 6b8:	0049      	lsls	r1, r1, #1
 6ba:	ea41 71d5 	orr.w	r1, r1, r5, lsr #31
 6be:	9d03      	ldr	r5, [sp, #12]
 6c0:	2d02      	cmp	r5, #2
 6c2:	f040 80c7 	bne.w	854 <__udivmodti4+0x854>
 6c6:	2400      	movs	r4, #0
 6c8:	460e      	mov	r6, r1
 6ca:	4690      	mov	r8, r2
 6cc:	e10b      	b.n	8e6 <__udivmodti4+0x8e6>
 6ce:	ea5b 0009 	orrs.w	r0, fp, r9
checked_div():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2562
 6d2:	f000 8129 	beq.w	928 <__udivmodti4+0x928>
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2563
 6d6:	4628      	mov	r0, r5
 6d8:	4671      	mov	r1, lr
 6da:	465a      	mov	r2, fp
 6dc:	464b      	mov	r3, r9
__udivmodti4():
 6de:	f7ff fffe 	bl	0 <__udivmodti4>
 6e2:	4605      	mov	r5, r0
 6e4:	468e      	mov	lr, r1
 6e6:	2700      	movs	r7, #0
 6e8:	2600      	movs	r6, #0
 6ea:	e116      	b.n	91a <__udivmodti4+0x91a>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:273
 6ec:	f1b8 0f00 	cmp.w	r8, #0
 6f0:	d007      	beq.n	702 <__udivmodti4+0x702>
 6f2:	2200      	movs	r2, #0
 6f4:	4028      	ands	r0, r5
 6f6:	ea01 010e 	and.w	r1, r1, lr
 6fa:	e888 0007 	stmia.w	r8, {r0, r1, r2}
 6fe:	f8c8 200c 	str.w	r2, [r8, #12]
 702:	f08b 0001 	eor.w	r0, fp, #1
 706:	ea50 0009 	orrs.w	r0, r0, r9
 70a:	f000 8106 	beq.w	91a <__udivmodti4+0x91a>
trailing_zeros():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2259
 70e:	fa99 f0a9 	rbit	r0, r9
 712:	fa9b f1ab 	rbit	r1, fp
 716:	fab0 f080 	clz	r0, r0
 71a:	f1bb 0f00 	cmp.w	fp, #0
 71e:	f100 0020 	add.w	r0, r0, #32
 722:	46f0      	mov	r8, lr
 724:	bf18      	it	ne
 726:	fab1 f081 	clzne	r0, r1
__udivmodti4():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:273
 72a:	f1c0 0c20 	rsb	ip, r0, #32
 72e:	f1a0 0920 	sub.w	r9, r0, #32
 732:	fa25 f100 	lsr.w	r1, r5, r0
 736:	fa0e f30c 	lsl.w	r3, lr, ip
 73a:	f1c0 0260 	rsb	r2, r0, #96	; 0x60
 73e:	430b      	orrs	r3, r1
 740:	f1b9 0f00 	cmp.w	r9, #0
 744:	bfa8      	it	ge
 746:	fa2e f309 	lsrge.w	r3, lr, r9
 74a:	f1a0 0e40 	sub.w	lr, r0, #64	; 0x40
 74e:	f1c0 0140 	rsb	r1, r0, #64	; 0x40
 752:	fa06 fa02 	lsl.w	sl, r6, r2
 756:	fa27 f20e 	lsr.w	r2, r7, lr
 75a:	f1bc 0f00 	cmp.w	ip, #0
 75e:	fa07 f401 	lsl.w	r4, r7, r1
 762:	ea42 020a 	orr.w	r2, r2, sl
 766:	f1a0 0a60 	sub.w	sl, r0, #96	; 0x60
 76a:	bfa8      	it	ge
 76c:	2400      	movge	r4, #0
 76e:	f1ba 0f00 	cmp.w	sl, #0
 772:	bfa8      	it	ge
 774:	fa26 f20a 	lsrge.w	r2, r6, sl
 778:	2840      	cmp	r0, #64	; 0x40
 77a:	bf38      	it	cc
 77c:	ea43 0204 	orrcc.w	r2, r3, r4
 780:	f1c1 0320 	rsb	r3, r1, #32
 784:	2800      	cmp	r0, #0
 786:	bf18      	it	ne
 788:	4615      	movne	r5, r2
 78a:	fa06 f201 	lsl.w	r2, r6, r1
 78e:	fa27 f303 	lsr.w	r3, r7, r3
 792:	431a      	orrs	r2, r3
 794:	f1bc 0f00 	cmp.w	ip, #0
 798:	bfa8      	it	ge
 79a:	fa07 f20c 	lslge.w	r2, r7, ip
 79e:	fa28 f300 	lsr.w	r3, r8, r0
 7a2:	f1b9 0f00 	cmp.w	r9, #0
 7a6:	bfa8      	it	ge
 7a8:	2300      	movge	r3, #0
 7aa:	fa26 f40e 	lsr.w	r4, r6, lr
 7ae:	f1ba 0f00 	cmp.w	sl, #0
 7b2:	bfa8      	it	ge
 7b4:	2400      	movge	r4, #0
 7b6:	2840      	cmp	r0, #64	; 0x40
 7b8:	bf38      	it	cc
 7ba:	ea43 0402 	orrcc.w	r4, r3, r2
 7be:	46c6      	mov	lr, r8
 7c0:	2800      	cmp	r0, #0
 7c2:	bf18      	it	ne
 7c4:	46a6      	movne	lr, r4
 7c6:	fa27 f300 	lsr.w	r3, r7, r0
 7ca:	fa06 f70c 	lsl.w	r7, r6, ip
 7ce:	fa26 f100 	lsr.w	r1, r6, r0
 7d2:	f1b9 0f00 	cmp.w	r9, #0
 7d6:	bfa8      	it	ge
 7d8:	2100      	movge	r1, #0
 7da:	2840      	cmp	r0, #64	; 0x40
 7dc:	ea47 0703 	orr.w	r7, r7, r3
 7e0:	f04f 0200 	mov.w	r2, #0
 7e4:	bf28      	it	cs
 7e6:	4611      	movcs	r1, r2
 7e8:	f1b9 0f00 	cmp.w	r9, #0
 7ec:	bfa8      	it	ge
 7ee:	fa26 f709 	lsrge.w	r7, r6, r9
 7f2:	2840      	cmp	r0, #64	; 0x40
 7f4:	bf28      	it	cs
 7f6:	4617      	movcs	r7, r2
 7f8:	460e      	mov	r6, r1
 7fa:	e08e      	b.n	91a <__udivmodti4+0x91a>
 7fc:	f1b8 0f00 	cmp.w	r8, #0
 800:	bf1f      	itttt	ne
 802:	4038      	andne	r0, r7
 804:	4031      	andne	r1, r6
 806:	e9c8 5e00 	strdne	r5, lr, [r8]
 80a:	e9c8 0102 	strdne	r0, r1, [r8, #8]
trailing_zeros():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2259
 80e:	fa94 f1a4 	rbit	r1, r4
 812:	fa9a f0aa 	rbit	r0, sl
 816:	fab1 f181 	clz	r1, r1
 81a:	f1ba 0f00 	cmp.w	sl, #0
 81e:	f101 0120 	add.w	r1, r1, #32
 822:	bf18      	it	ne
 824:	fab0 f180 	clzne	r1, r0
__udivmodti4():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:273
 828:	f001 003f 	and.w	r0, r1, #63	; 0x3f
 82c:	f1c0 0220 	rsb	r2, r0, #32
 830:	fa27 f100 	lsr.w	r1, r7, r0
 834:	fa26 fe00 	lsr.w	lr, r6, r0
 838:	fa06 f202 	lsl.w	r2, r6, r2
 83c:	ea41 0502 	orr.w	r5, r1, r2
 840:	f1a0 0120 	sub.w	r1, r0, #32
 844:	2900      	cmp	r1, #0
 846:	bfa8      	it	ge
 848:	fa26 f501 	lsrge.w	r5, r6, r1
 84c:	bfa8      	it	ge
 84e:	f04f 0e00 	movge.w	lr, #0
 852:	e748      	b.n	6e6 <__udivmodti4+0x6e6>
 854:	9f0a      	ldr	r7, [sp, #40]	; 0x28
 856:	ea4f 064e 	mov.w	r6, lr, lsl #1
 85a:	9309      	str	r3, [sp, #36]	; 0x24
 85c:	ea46 76d0 	orr.w	r6, r6, r0, lsr #31
 860:	0040      	lsls	r0, r0, #1
 862:	ea4f 034b 	mov.w	r3, fp, lsl #1
 866:	f3c7 7740 	ubfx	r7, r7, #29, #1
 86a:	ea40 70d2 	orr.w	r0, r0, r2, lsr #31
 86e:	ea47 0742 	orr.w	r7, r7, r2, lsl #1
 872:	9a14      	ldr	r2, [sp, #80]	; 0x50
 874:	910a      	str	r1, [sp, #40]	; 0x28
wrapping_sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2863
 876:	43c4      	mvns	r4, r0
 878:	43f9      	mvns	r1, r7
__udivmodti4():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:273
 87a:	ea43 7bde 	orr.w	fp, r3, lr, lsr #31
wrapping_sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2863
 87e:	1889      	adds	r1, r1, r2
 880:	ea6f 0506 	mvn.w	r5, r6
 884:	9915      	ldr	r1, [sp, #84]	; 0x54
 886:	ea6f 030b 	mvn.w	r3, fp
 88a:	4696      	mov	lr, r2
 88c:	4688      	mov	r8, r1
 88e:	4161      	adcs	r1, r4
 890:	9916      	ldr	r1, [sp, #88]	; 0x58
 892:	460c      	mov	r4, r1
 894:	4169      	adcs	r1, r5
 896:	eb43 010a 	adc.w	r1, r3, sl
__udivmodti4():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:273
 89a:	ea0e 73e1 	and.w	r3, lr, r1, asr #31
 89e:	ea08 75e1 	and.w	r5, r8, r1, asr #31
 8a2:	ebb7 0803 	subs.w	r8, r7, r3
 8a6:	ea04 74e1 	and.w	r4, r4, r1, asr #31
 8aa:	41a8      	sbcs	r0, r5
 8ac:	ea0a 72e1 	and.w	r2, sl, r1, asr #31
 8b0:	eb76 0e04 	sbcs.w	lr, r6, r4
 8b4:	9e09      	ldr	r6, [sp, #36]	; 0x24
 8b6:	eb6b 0b02 	sbc.w	fp, fp, r2
 8ba:	9a08      	ldr	r2, [sp, #32]
 8bc:	2301      	movs	r3, #1
 8be:	ea03 71e1 	and.w	r1, r3, r1, asr #31
 8c2:	ea42 034c 	orr.w	r3, r2, ip, lsl #1
 8c6:	0072      	lsls	r2, r6, #1
 8c8:	ea4f 0749 	mov.w	r7, r9, lsl #1
 8cc:	ea42 74d9 	orr.w	r4, r2, r9, lsr #31
 8d0:	9a0a      	ldr	r2, [sp, #40]	; 0x28
 8d2:	ea47 77dc 	orr.w	r7, r7, ip, lsr #31
 8d6:	469c      	mov	ip, r3
 8d8:	4623      	mov	r3, r4
 8da:	46b9      	mov	r9, r7
 8dc:	2400      	movs	r4, #0
 8de:	0052      	lsls	r2, r2, #1
 8e0:	ea42 76d6 	orr.w	r6, r2, r6, lsr #31
 8e4:	9108      	str	r1, [sp, #32]
 8e6:	9918      	ldr	r1, [sp, #96]	; 0x60
 8e8:	2900      	cmp	r1, #0
 8ea:	bf1c      	itt	ne
 8ec:	e9c1 8000 	strdne	r8, r0, [r1]
 8f0:	e9c1 eb02 	strdne	lr, fp, [r1, #8]
 8f4:	9808      	ldr	r0, [sp, #32]
 8f6:	ea40 054c 	orr.w	r5, r0, ip, lsl #1
 8fa:	ea4f 0049 	mov.w	r0, r9, lsl #1
 8fe:	ea40 70dc 	orr.w	r0, r0, ip, lsr #31
 902:	ea44 0e00 	orr.w	lr, r4, r0
 906:	0058      	lsls	r0, r3, #1
 908:	ea40 70d9 	orr.w	r0, r0, r9, lsr #31
 90c:	ea44 0700 	orr.w	r7, r4, r0
 910:	0070      	lsls	r0, r6, #1
 912:	ea40 70d3 	orr.w	r0, r0, r3, lsr #31
 916:	ea44 0600 	orr.w	r6, r4, r0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
 91a:	4628      	mov	r0, r5
 91c:	4671      	mov	r1, lr
 91e:	463a      	mov	r2, r7
 920:	4633      	mov	r3, r6
 922:	b00b      	add	sp, #44	; 0x2c
 924:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
 928:	defe      	udf	#254	; 0xfe
 92a:	defe      	udf	#254	; 0xfe

Disassembly of section .text._ZN17compiler_builtins3int4udiv13rust_u128_div17h126d1909db3140ffE:

00000000 <compiler_builtins::int::udiv::rust_u128_div>:
_ZN17compiler_builtins3int4udiv13rust_u128_div17h126d1909db3140ffE():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:293
   0:	b580      	push	{r7, lr}
   2:	b086      	sub	sp, #24
   4:	f04f 0c00 	mov.w	ip, #0
__udivti3():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:252
   8:	f8cd c010 	str.w	ip, [sp, #16]
   c:	f8dd c02c 	ldr.w	ip, [sp, #44]	; 0x2c
  10:	f8cd c00c 	str.w	ip, [sp, #12]
  14:	f8dd c028 	ldr.w	ip, [sp, #40]	; 0x28
  18:	f8cd c008 	str.w	ip, [sp, #8]
  1c:	f8dd c024 	ldr.w	ip, [sp, #36]	; 0x24
  20:	f8cd c004 	str.w	ip, [sp, #4]
  24:	f8dd c020 	ldr.w	ip, [sp, #32]
  28:	f8cd c000 	str.w	ip, [sp]
  2c:	f7ff fffe 	bl	0 <compiler_builtins::int::udiv::rust_u128_div>
_ZN17compiler_builtins3int4udiv13rust_u128_div17h126d1909db3140ffE():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:295
  30:	b006      	add	sp, #24
  32:	bd80      	pop	{r7, pc}

Disassembly of section .text._ZN17compiler_builtins3int4udiv13rust_u128_rem17hd6298656faf5ac7aE:

00000000 <compiler_builtins::int::udiv::rust_u128_rem>:
_ZN17compiler_builtins3int4udiv13rust_u128_rem17hd6298656faf5ac7aE():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:293
   0:	b580      	push	{r7, lr}
   2:	b08a      	sub	sp, #40	; 0x28
   4:	f04f 0c00 	mov.w	ip, #0
__umodti3():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:258
   8:	e9cd cc08 	strd	ip, ip, [sp, #32]
   c:	e9cd cc06 	strd	ip, ip, [sp, #24]
  10:	f10d 0c18 	add.w	ip, sp, #24
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:259
  14:	f8cd c010 	str.w	ip, [sp, #16]
  18:	f8dd c03c 	ldr.w	ip, [sp, #60]	; 0x3c
  1c:	f8cd c00c 	str.w	ip, [sp, #12]
  20:	f8dd c038 	ldr.w	ip, [sp, #56]	; 0x38
  24:	f8cd c008 	str.w	ip, [sp, #8]
  28:	f8dd c034 	ldr.w	ip, [sp, #52]	; 0x34
  2c:	f8cd c004 	str.w	ip, [sp, #4]
  30:	f8dd c030 	ldr.w	ip, [sp, #48]	; 0x30
  34:	f8cd c000 	str.w	ip, [sp]
  38:	f7ff fffe 	bl	0 <compiler_builtins::int::udiv::rust_u128_rem>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/udiv.rs:260
  3c:	ab06      	add	r3, sp, #24
  3e:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
_ZN17compiler_builtins3int4udiv13rust_u128_rem17hd6298656faf5ac7aE():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:295
  40:	b00a      	add	sp, #40	; 0x28
  42:	bd80      	pop	{r7, pc}

Disassembly of section .text._ZN51_$LT$u32$u20$as$u20$compiler_builtins..int..Int$GT$12extract_sign17h33adf43c30dffd40E:

00000000 <<u32 as compiler_builtins::int::Int>::extract_sign>:
_ZN51_$LT$u32$u20$as$u20$compiler_builtins..int..Int$GT$12extract_sign17h33adf43c30dffd40E():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:148
   0:	4601      	mov	r1, r0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:150
   2:	2000      	movs	r0, #0
   4:	4770      	bx	lr

Disassembly of section .text._ZN51_$LT$i32$u20$as$u20$compiler_builtins..int..Int$GT$12extract_sign17h59aff4784251113aE:

00000000 <<i32 as compiler_builtins::int::Int>::extract_sign>:
_ZN51_$LT$i32$u20$as$u20$compiler_builtins..int..Int$GT$12extract_sign17h59aff4784251113aE():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:167
   0:	4601      	mov	r1, r0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:168
   2:	0fc0      	lsrs	r0, r0, #31
   4:	2900      	cmp	r1, #0
   6:	bf48      	it	mi
   8:	4249      	negmi	r1, r1
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:173
   a:	4770      	bx	lr

Disassembly of section .text._ZN51_$LT$i32$u20$as$u20$compiler_builtins..int..Int$GT$13from_unsigned17h912ba4681c884616E:

00000000 <<i32 as compiler_builtins::int::Int>::from_unsigned>:
_ZN69_$LT$u32$u20$as$u20$compiler_builtins..int..CastInto$LT$usize$GT$$GT$4cast17h20858ac6b40266edE():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:181
   0:	4770      	bx	lr

Disassembly of section .text._ZN51_$LT$u32$u20$as$u20$compiler_builtins..int..Int$GT$9max_value17h29aad6492bdd7a34E:

00000000 <<u32 as compiler_builtins::int::Int>::max_value>:
_ZN51_$LT$u32$u20$as$u20$compiler_builtins..int..Int$GT$9max_value17h29aad6492bdd7a34E():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:102
   0:	f04f 30ff 	mov.w	r0, #4294967295	; 0xffffffff
   4:	4770      	bx	lr

Disassembly of section .text._ZN51_$LT$u32$u20$as$u20$compiler_builtins..int..Int$GT$9min_value17h1d6e54bc61bbfdbfE:

00000000 <<u32 as compiler_builtins::int::Int>::min_value>:
_ZN51_$LT$u32$u20$as$u20$compiler_builtins..int..Int$GT$9min_value17h1d6e54bc61bbfdbfE():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:106
   0:	2000      	movs	r0, #0
   2:	4770      	bx	lr

Disassembly of section .text._ZN51_$LT$u32$u20$as$u20$compiler_builtins..int..Int$GT$15overflowing_add17h06eb618729cc02ffE:

00000000 <<u32 as compiler_builtins::int::Int>::overflowing_add>:
_ZN51_$LT$u32$u20$as$u20$compiler_builtins..int..Int$GT$15overflowing_add17h06eb618729cc02ffE():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:3123
   0:	1840      	adds	r0, r0, r1
   2:	f04f 0200 	mov.w	r2, #0
   6:	f142 0100 	adc.w	r1, r2, #0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:126
   a:	4770      	bx	lr

Disassembly of section .text._ZN51_$LT$u32$u20$as$u20$compiler_builtins..int..Int$GT$12aborting_div17hd8eecf1c06795427E:

00000000 <<u32 as compiler_builtins::int::Int>::aborting_div>:
_ZN51_$LT$u32$u20$as$u20$compiler_builtins..int..Int$GT$12aborting_div17hd8eecf1c06795427E():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2562
   0:	2900      	cmp	r1, #0
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2563
   2:	bf1c      	itt	ne
   4:	fbb0 f0f1 	udivne	r0, r0, r1
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:130
   8:	4770      	bxne	lr
abort():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/lib.rs:41
   a:	defe      	udf	#254	; 0xfe
   c:	defe      	udf	#254	; 0xfe

Disassembly of section .text._ZN51_$LT$u32$u20$as$u20$compiler_builtins..int..Int$GT$12aborting_rem17h39cc4c01441f9605E:

00000000 <<u32 as compiler_builtins::int::Int>::aborting_rem>:
_ZN51_$LT$u32$u20$as$u20$compiler_builtins..int..Int$GT$12aborting_rem17h39cc4c01441f9605E():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2608
   0:	2900      	cmp	r1, #0
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2611
   2:	bf1e      	ittt	ne
   4:	fbb0 f2f1 	udivne	r2, r0, r1
   8:	fb02 0011 	mlsne	r0, r2, r1, r0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:134
   c:	4770      	bxne	lr
abort():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/lib.rs:41
   e:	defe      	udf	#254	; 0xfe
  10:	defe      	udf	#254	; 0xfe

Disassembly of section .text._ZN51_$LT$i32$u20$as$u20$compiler_builtins..int..Int$GT$9from_bool17h5ce29bcefc738cd3E:

00000000 <<i32 as compiler_builtins::int::Int>::from_bool>:
_ZN51_$LT$u32$u20$as$u20$compiler_builtins..int..Int$GT$9from_bool17h24e8653865346b24E():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:98
   0:	4770      	bx	lr

Disassembly of section .text._ZN51_$LT$i32$u20$as$u20$compiler_builtins..int..Int$GT$9max_value17hdb9ce960eb51b051E:

00000000 <<i32 as compiler_builtins::int::Int>::max_value>:
_ZN51_$LT$i32$u20$as$u20$compiler_builtins..int..Int$GT$9max_value17hdb9ce960eb51b051E():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:102
   0:	f06f 4000 	mvn.w	r0, #2147483648	; 0x80000000
   4:	4770      	bx	lr

Disassembly of section .text._ZN51_$LT$i32$u20$as$u20$compiler_builtins..int..Int$GT$9min_value17h1224b5d40c822689E:

00000000 <<i32 as compiler_builtins::int::Int>::min_value>:
_ZN51_$LT$i32$u20$as$u20$compiler_builtins..int..Int$GT$9min_value17h1224b5d40c822689E():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:106
   0:	f04f 4000 	mov.w	r0, #2147483648	; 0x80000000
   4:	4770      	bx	lr

Disassembly of section .text._ZN51_$LT$i32$u20$as$u20$compiler_builtins..int..Int$GT$12wrapping_add17hb39f70ea35030430E:

00000000 <<i32 as compiler_builtins::int::Int>::wrapping_add>:
_ZN51_$LT$i32$u20$as$u20$compiler_builtins..int..Int$GT$12wrapping_add17hb39f70ea35030430E():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:1006
   0:	4408      	add	r0, r1
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:110
   2:	4770      	bx	lr

Disassembly of section .text._ZN51_$LT$i32$u20$as$u20$compiler_builtins..int..Int$GT$12wrapping_mul17hdf40fbc326f60bb8E:

00000000 <<i32 as compiler_builtins::int::Int>::wrapping_mul>:
_ZN51_$LT$i32$u20$as$u20$compiler_builtins..int..Int$GT$12wrapping_mul17hdf40fbc326f60bb8E():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:1047
   0:	4348      	muls	r0, r1
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:114
   2:	4770      	bx	lr

Disassembly of section .text._ZN51_$LT$i32$u20$as$u20$compiler_builtins..int..Int$GT$12wrapping_sub17hbaffacd5e0e4f3a4E:

00000000 <<i32 as compiler_builtins::int::Int>::wrapping_sub>:
_ZN51_$LT$i32$u20$as$u20$compiler_builtins..int..Int$GT$12wrapping_sub17hbaffacd5e0e4f3a4E():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:1027
   0:	1a40      	subs	r0, r0, r1
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:118
   2:	4770      	bx	lr

Disassembly of section .text._ZN51_$LT$i32$u20$as$u20$compiler_builtins..int..Int$GT$12wrapping_shl17h19bd9310d067da86E:

00000000 <<i32 as compiler_builtins::int::Int>::wrapping_shl>:
_ZN51_$LT$i32$u20$as$u20$compiler_builtins..int..Int$GT$12wrapping_shl17h19bd9310d067da86E():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:1209
   0:	f001 011f 	and.w	r1, r1, #31
   4:	4088      	lsls	r0, r1
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:122
   6:	4770      	bx	lr

Disassembly of section .text._ZN51_$LT$i32$u20$as$u20$compiler_builtins..int..Int$GT$15overflowing_add17hbfefb848da74fd48E:

00000000 <<i32 as compiler_builtins::int::Int>::overflowing_add>:
_ZN51_$LT$i32$u20$as$u20$compiler_builtins..int..Int$GT$15overflowing_add17hbfefb848da74fd48E():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:1331
   0:	1840      	adds	r0, r0, r1
   2:	f04f 0101 	mov.w	r1, #1
   6:	bf78      	it	vc
   8:	2100      	movvc	r1, #0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:126
   a:	4770      	bx	lr

Disassembly of section .text._ZN51_$LT$i32$u20$as$u20$compiler_builtins..int..Int$GT$12aborting_div17h639bbfcbc7f6e051E:

00000000 <<i32 as compiler_builtins::int::Int>::aborting_div>:
_ZN51_$LT$i32$u20$as$u20$compiler_builtins..int..Int$GT$12aborting_div17h639bbfcbc7f6e051E():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:670
   0:	b141      	cbz	r1, 14 <<i32 as compiler_builtins::int::Int>::aborting_div+0x14>
   2:	f1b0 4f00 	cmp.w	r0, #2147483648	; 0x80000000
   6:	bf08      	it	eq
   8:	f111 0201 	addseq.w	r2, r1, #1
   c:	d002      	beq.n	14 <<i32 as compiler_builtins::int::Int>::aborting_div+0x14>
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:673
   e:	fb90 f0f1 	sdiv	r0, r0, r1
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:130
  12:	4770      	bx	lr
abort():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/lib.rs:41
  14:	defe      	udf	#254	; 0xfe
  16:	defe      	udf	#254	; 0xfe

Disassembly of section .text._ZN51_$LT$i32$u20$as$u20$compiler_builtins..int..Int$GT$12aborting_rem17hbfec48ea99737c40E:

00000000 <<i32 as compiler_builtins::int::Int>::aborting_rem>:
_ZN51_$LT$i32$u20$as$u20$compiler_builtins..int..Int$GT$12aborting_rem17hbfec48ea99737c40E():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:723
   0:	b151      	cbz	r1, 18 <<i32 as compiler_builtins::int::Int>::aborting_rem+0x18>
   2:	f1b0 4f00 	cmp.w	r0, #2147483648	; 0x80000000
   6:	bf08      	it	eq
   8:	f111 0201 	addseq.w	r2, r1, #1
   c:	d004      	beq.n	18 <<i32 as compiler_builtins::int::Int>::aborting_rem+0x18>
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:726
   e:	fb90 f2f1 	sdiv	r2, r0, r1
  12:	fb02 0011 	mls	r0, r2, r1, r0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:134
  16:	4770      	bx	lr
abort():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/lib.rs:41
  18:	defe      	udf	#254	; 0xfe
  1a:	defe      	udf	#254	; 0xfe

Disassembly of section .text._ZN51_$LT$i32$u20$as$u20$compiler_builtins..int..Int$GT$13leading_zeros17h493896b73a4e3913E:

00000000 <<i32 as compiler_builtins::int::Int>::leading_zeros>:
_ZN51_$LT$i32$u20$as$u20$compiler_builtins..int..Int$GT$13leading_zeros17h493896b73a4e3913E():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2239
   0:	fab0 f080 	clz	r0, r0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:138
   4:	4770      	bx	lr

Disassembly of section .text._ZN51_$LT$u64$u20$as$u20$compiler_builtins..int..Int$GT$12extract_sign17h71b2b4864ef7bc8cE:

00000000 <<u64 as compiler_builtins::int::Int>::extract_sign>:
_ZN51_$LT$u64$u20$as$u20$compiler_builtins..int..Int$GT$12extract_sign17h71b2b4864ef7bc8cE():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:148
   0:	460a      	mov	r2, r1
   2:	4601      	mov	r1, r0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:150
   4:	2000      	movs	r0, #0
   6:	4770      	bx	lr

Disassembly of section .text._ZN51_$LT$i64$u20$as$u20$compiler_builtins..int..Int$GT$12extract_sign17h83e3ddee6223dd9cE:

00000000 <<i64 as compiler_builtins::int::Int>::extract_sign>:
_ZN51_$LT$i64$u20$as$u20$compiler_builtins..int..Int$GT$12extract_sign17h83e3ddee6223dd9cE():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:167
   0:	eb10 70e1 	adds.w	r0, r0, r1, asr #31
   4:	ea80 73e1 	eor.w	r3, r0, r1, asr #31
   8:	eb41 70e1 	adc.w	r0, r1, r1, asr #31
   c:	ea80 72e1 	eor.w	r2, r0, r1, asr #31
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:168
  10:	0fc8      	lsrs	r0, r1, #31
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:173
  12:	4619      	mov	r1, r3
  14:	4770      	bx	lr

Disassembly of section .text._ZN51_$LT$i64$u20$as$u20$compiler_builtins..int..Int$GT$13from_unsigned17h1afee29cc1c7acb7E:

00000000 <<i64 as compiler_builtins::int::Int>::from_unsigned>:
_ZN67_$LT$u64$u20$as$u20$compiler_builtins..int..CastInto$LT$u64$GT$$GT$4cast17hf20a03b5e0180068E():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:181
   0:	4770      	bx	lr

Disassembly of section .text._ZN51_$LT$u64$u20$as$u20$compiler_builtins..int..Int$GT$9max_value17h9309223f57092cc4E:

00000000 <<u64 as compiler_builtins::int::Int>::max_value>:
_ZN51_$LT$u64$u20$as$u20$compiler_builtins..int..Int$GT$9max_value17h9309223f57092cc4E():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:102
   0:	f04f 30ff 	mov.w	r0, #4294967295	; 0xffffffff
   4:	f04f 31ff 	mov.w	r1, #4294967295	; 0xffffffff
   8:	4770      	bx	lr

Disassembly of section .text._ZN51_$LT$u64$u20$as$u20$compiler_builtins..int..Int$GT$9min_value17h6657c7e8f4ee069dE:

00000000 <<u64 as compiler_builtins::int::Int>::min_value>:
_ZN51_$LT$u64$u20$as$u20$compiler_builtins..int..Int$GT$9min_value17h6657c7e8f4ee069dE():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:106
   0:	2000      	movs	r0, #0
   2:	2100      	movs	r1, #0
   4:	4770      	bx	lr

Disassembly of section .text._ZN51_$LT$u64$u20$as$u20$compiler_builtins..int..Int$GT$15overflowing_add17h3328873e68c8d23fE:

00000000 <<u64 as compiler_builtins::int::Int>::overflowing_add>:
_ZN51_$LT$u64$u20$as$u20$compiler_builtins..int..Int$GT$15overflowing_add17h3328873e68c8d23fE():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:3123
   0:	1880      	adds	r0, r0, r2
   2:	f04f 0c00 	mov.w	ip, #0
   6:	4159      	adcs	r1, r3
   8:	f14c 0200 	adc.w	r2, ip, #0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:126
   c:	4770      	bx	lr

Disassembly of section .text._ZN51_$LT$u64$u20$as$u20$compiler_builtins..int..Int$GT$12aborting_div17hc0244a985da9e5d7E:

00000000 <<u64 as compiler_builtins::int::Int>::aborting_div>:
_ZN51_$LT$u64$u20$as$u20$compiler_builtins..int..Int$GT$12aborting_div17hc0244a985da9e5d7E():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2562
   0:	ea52 0c03 	orrs.w	ip, r2, r3
   4:	d003      	beq.n	e <<u64 as compiler_builtins::int::Int>::aborting_div+0xe>
   6:	b580      	push	{r7, lr}
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2563
   8:	f7ff fffe 	bl	0 <<u64 as compiler_builtins::int::Int>::aborting_div>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:130
   c:	bd80      	pop	{r7, pc}
abort():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/lib.rs:41
   e:	defe      	udf	#254	; 0xfe
  10:	defe      	udf	#254	; 0xfe

Disassembly of section .text._ZN51_$LT$u64$u20$as$u20$compiler_builtins..int..Int$GT$12aborting_rem17hc5259316a099a85eE:

00000000 <<u64 as compiler_builtins::int::Int>::aborting_rem>:
_ZN51_$LT$u64$u20$as$u20$compiler_builtins..int..Int$GT$12aborting_rem17hc5259316a099a85eE():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2608
   0:	ea52 0c03 	orrs.w	ip, r2, r3
   4:	d005      	beq.n	12 <<u64 as compiler_builtins::int::Int>::aborting_rem+0x12>
   6:	b580      	push	{r7, lr}
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2611
   8:	f7ff fffe 	bl	0 <<u64 as compiler_builtins::int::Int>::aborting_rem>
   c:	4610      	mov	r0, r2
   e:	4619      	mov	r1, r3
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:134
  10:	bd80      	pop	{r7, pc}
abort():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/lib.rs:41
  12:	defe      	udf	#254	; 0xfe
  14:	defe      	udf	#254	; 0xfe

Disassembly of section .text._ZN51_$LT$i64$u20$as$u20$compiler_builtins..int..Int$GT$9from_bool17h2985c7fff1557d13E:

00000000 <<i64 as compiler_builtins::int::Int>::from_bool>:
_ZN51_$LT$u64$u20$as$u20$compiler_builtins..int..Int$GT$9from_bool17h401a73770bb13bf5E():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:98
   0:	2100      	movs	r1, #0
   2:	4770      	bx	lr

Disassembly of section .text._ZN51_$LT$i64$u20$as$u20$compiler_builtins..int..Int$GT$9max_value17h38a927b2268cd881E:

00000000 <<i64 as compiler_builtins::int::Int>::max_value>:
_ZN51_$LT$i64$u20$as$u20$compiler_builtins..int..Int$GT$9max_value17h38a927b2268cd881E():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:102
   0:	f04f 30ff 	mov.w	r0, #4294967295	; 0xffffffff
   4:	f06f 4100 	mvn.w	r1, #2147483648	; 0x80000000
   8:	4770      	bx	lr

Disassembly of section .text._ZN51_$LT$i64$u20$as$u20$compiler_builtins..int..Int$GT$9min_value17h4ba184aca481ae0aE:

00000000 <<i64 as compiler_builtins::int::Int>::min_value>:
_ZN51_$LT$i64$u20$as$u20$compiler_builtins..int..Int$GT$9min_value17h4ba184aca481ae0aE():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:106
   0:	2000      	movs	r0, #0
   2:	f04f 4100 	mov.w	r1, #2147483648	; 0x80000000
   6:	4770      	bx	lr

Disassembly of section .text._ZN51_$LT$i64$u20$as$u20$compiler_builtins..int..Int$GT$12wrapping_add17hc307005aec61ad80E:

00000000 <<i64 as compiler_builtins::int::Int>::wrapping_add>:
_ZN51_$LT$i64$u20$as$u20$compiler_builtins..int..Int$GT$12wrapping_add17hc307005aec61ad80E():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:1006
   0:	1880      	adds	r0, r0, r2
   2:	4159      	adcs	r1, r3
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:110
   4:	4770      	bx	lr

Disassembly of section .text._ZN51_$LT$i64$u20$as$u20$compiler_builtins..int..Int$GT$12wrapping_mul17h355876921f34d3edE:

00000000 <<i64 as compiler_builtins::int::Int>::wrapping_mul>:
_ZN51_$LT$i64$u20$as$u20$compiler_builtins..int..Int$GT$12wrapping_mul17h355876921f34d3edE():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:112
   0:	b580      	push	{r7, lr}
wrapping_mul():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:1047
   2:	fba2 ce00 	umull	ip, lr, r2, r0
   6:	fb02 e101 	mla	r1, r2, r1, lr
   a:	fb03 1100 	mla	r1, r3, r0, r1
_ZN51_$LT$i64$u20$as$u20$compiler_builtins..int..Int$GT$12wrapping_mul17h355876921f34d3edE():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:114
   e:	4660      	mov	r0, ip
  10:	bd80      	pop	{r7, pc}

Disassembly of section .text._ZN51_$LT$i64$u20$as$u20$compiler_builtins..int..Int$GT$12wrapping_sub17hab2c71ed25260a36E:

00000000 <<i64 as compiler_builtins::int::Int>::wrapping_sub>:
_ZN51_$LT$i64$u20$as$u20$compiler_builtins..int..Int$GT$12wrapping_sub17hab2c71ed25260a36E():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:1027
   0:	1a80      	subs	r0, r0, r2
   2:	4199      	sbcs	r1, r3
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:118
   4:	4770      	bx	lr

Disassembly of section .text._ZN51_$LT$i64$u20$as$u20$compiler_builtins..int..Int$GT$12wrapping_shl17h9cb6b0fea82242d9E:

00000000 <<i64 as compiler_builtins::int::Int>::wrapping_shl>:
_ZN51_$LT$i64$u20$as$u20$compiler_builtins..int..Int$GT$12wrapping_shl17h9cb6b0fea82242d9E():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:1209
   0:	f002 023f 	and.w	r2, r2, #63	; 0x3f
   4:	f1c2 0320 	rsb	r3, r2, #32
   8:	4091      	lsls	r1, r2
   a:	fa20 f303 	lsr.w	r3, r0, r3
   e:	4319      	orrs	r1, r3
  10:	f1a2 0320 	sub.w	r3, r2, #32
  14:	2b00      	cmp	r3, #0
  16:	bfa8      	it	ge
  18:	fa00 f103 	lslge.w	r1, r0, r3
  1c:	fa00 f002 	lsl.w	r0, r0, r2
  20:	bfa8      	it	ge
  22:	2000      	movge	r0, #0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:122
  24:	4770      	bx	lr

Disassembly of section .text._ZN51_$LT$i64$u20$as$u20$compiler_builtins..int..Int$GT$15overflowing_add17hf2a83a1a50fbc16fE:

00000000 <<i64 as compiler_builtins::int::Int>::overflowing_add>:
_ZN51_$LT$i64$u20$as$u20$compiler_builtins..int..Int$GT$15overflowing_add17hf2a83a1a50fbc16fE():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:124
   0:	b580      	push	{r7, lr}
overflowing_add():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:1331
   2:	f1b1 3fff 	cmp.w	r1, #4294967295	; 0xffffffff
   6:	f04f 0e00 	mov.w	lr, #0
   a:	bfc8      	it	gt
   c:	f04f 0e01 	movgt.w	lr, #1
  10:	1880      	adds	r0, r0, r2
  12:	4159      	adcs	r1, r3
  14:	2200      	movs	r2, #0
  16:	f1b1 3fff 	cmp.w	r1, #4294967295	; 0xffffffff
  1a:	bfc8      	it	gt
  1c:	2201      	movgt	r2, #1
  1e:	ebbe 0202 	subs.w	r2, lr, r2
  22:	f04f 0c00 	mov.w	ip, #0
  26:	bf18      	it	ne
  28:	2201      	movne	r2, #1
  2a:	f1b3 3fff 	cmp.w	r3, #4294967295	; 0xffffffff
  2e:	bfc8      	it	gt
  30:	f04f 0c01 	movgt.w	ip, #1
  34:	ebae 030c 	sub.w	r3, lr, ip
  38:	fab3 f383 	clz	r3, r3
  3c:	095b      	lsrs	r3, r3, #5
  3e:	401a      	ands	r2, r3
_ZN51_$LT$i64$u20$as$u20$compiler_builtins..int..Int$GT$15overflowing_add17hf2a83a1a50fbc16fE():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:126
  40:	bd80      	pop	{r7, pc}

Disassembly of section .text._ZN51_$LT$i64$u20$as$u20$compiler_builtins..int..Int$GT$12aborting_div17hfc8c410c2aab6cb0E:

00000000 <<i64 as compiler_builtins::int::Int>::aborting_div>:
_ZN51_$LT$i64$u20$as$u20$compiler_builtins..int..Int$GT$12aborting_div17hfc8c410c2aab6cb0E():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:128
   0:	b510      	push	{r4, lr}
checked_div():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:670
   2:	ea52 0c03 	orrs.w	ip, r2, r3
   6:	d015      	beq.n	34 <<i64 as compiler_builtins::int::Int>::aborting_div+0x34>
   8:	f04f 0c00 	mov.w	ip, #0
   c:	f04f 4e00 	mov.w	lr, #2147483648	; 0x80000000
  10:	f1bc 0c01 	subs.w	ip, ip, #1
  14:	f081 4400 	eor.w	r4, r1, #2147483648	; 0x80000000
  18:	f16e 4e00 	sbc.w	lr, lr, #2147483648	; 0x80000000
  1c:	4304      	orrs	r4, r0
  1e:	bf02      	ittt	eq
  20:	ea8c 0c02 	eoreq.w	ip, ip, r2
  24:	ea83 040e 	eoreq.w	r4, r3, lr
  28:	ea54 040c 	orrseq.w	r4, r4, ip
  2c:	d002      	beq.n	8 <<i64 as compiler_builtins::int::Int>::aborting_div+0x8>
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:673
  2e:	f7ff fffe 	bl	0 <<i64 as compiler_builtins::int::Int>::aborting_div>
_ZN51_$LT$i64$u20$as$u20$compiler_builtins..int..Int$GT$12aborting_div17hfc8c410c2aab6cb0E():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:130
  32:	bd10      	pop	{r4, pc}
abort():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/lib.rs:41
  34:	defe      	udf	#254	; 0xfe
  36:	defe      	udf	#254	; 0xfe

Disassembly of section .text._ZN51_$LT$i64$u20$as$u20$compiler_builtins..int..Int$GT$12aborting_rem17h915ab6a088b8ab8bE:

00000000 <<i64 as compiler_builtins::int::Int>::aborting_rem>:
_ZN51_$LT$i64$u20$as$u20$compiler_builtins..int..Int$GT$12aborting_rem17h915ab6a088b8ab8bE():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:132
   0:	b510      	push	{r4, lr}
checked_rem():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:723
   2:	ea52 0c03 	orrs.w	ip, r2, r3
   6:	d017      	beq.n	38 <<i64 as compiler_builtins::int::Int>::aborting_rem+0x38>
   8:	f04f 0c00 	mov.w	ip, #0
   c:	f04f 4e00 	mov.w	lr, #2147483648	; 0x80000000
  10:	f1bc 0c01 	subs.w	ip, ip, #1
  14:	f081 4400 	eor.w	r4, r1, #2147483648	; 0x80000000
  18:	f16e 4e00 	sbc.w	lr, lr, #2147483648	; 0x80000000
  1c:	4304      	orrs	r4, r0
  1e:	bf02      	ittt	eq
  20:	ea8c 0c02 	eoreq.w	ip, ip, r2
  24:	ea83 040e 	eoreq.w	r4, r3, lr
  28:	ea54 040c 	orrseq.w	r4, r4, ip
  2c:	d004      	beq.n	c <<i64 as compiler_builtins::int::Int>::aborting_rem+0xc>
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:726
  2e:	f7ff fffe 	bl	0 <<i64 as compiler_builtins::int::Int>::aborting_rem>
  32:	4610      	mov	r0, r2
  34:	4619      	mov	r1, r3
_ZN51_$LT$i64$u20$as$u20$compiler_builtins..int..Int$GT$12aborting_rem17h915ab6a088b8ab8bE():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:134
  36:	bd10      	pop	{r4, pc}
abort():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/lib.rs:41
  38:	defe      	udf	#254	; 0xfe
  3a:	defe      	udf	#254	; 0xfe

Disassembly of section .text._ZN51_$LT$i64$u20$as$u20$compiler_builtins..int..Int$GT$13leading_zeros17hd06722f271716343E:

00000000 <<i64 as compiler_builtins::int::Int>::leading_zeros>:
_ZN51_$LT$i64$u20$as$u20$compiler_builtins..int..Int$GT$13leading_zeros17hd06722f271716343E():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2239
   0:	fab0 f080 	clz	r0, r0
   4:	2900      	cmp	r1, #0
   6:	f100 0020 	add.w	r0, r0, #32
   a:	bf18      	it	ne
   c:	fab1 f081 	clzne	r0, r1
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:138
  10:	4770      	bx	lr

Disassembly of section .text._ZN52_$LT$u128$u20$as$u20$compiler_builtins..int..Int$GT$12extract_sign17h54f5d9f6912932b4E:

00000000 <<u128 as compiler_builtins::int::Int>::extract_sign>:
_ZN52_$LT$u128$u20$as$u20$compiler_builtins..int..Int$GT$12extract_sign17h54f5d9f6912932b4E():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:148
   0:	9901      	ldr	r1, [sp, #4]
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:150
   2:	6141      	str	r1, [r0, #20]
   4:	9900      	ldr	r1, [sp, #0]
   6:	6101      	str	r1, [r0, #16]
   8:	2100      	movs	r1, #0
   a:	e9c0 2302 	strd	r2, r3, [r0, #8]
   e:	7001      	strb	r1, [r0, #0]
  10:	4770      	bx	lr

Disassembly of section .text._ZN52_$LT$i128$u20$as$u20$compiler_builtins..int..Int$GT$12extract_sign17h9d8961dd365d2212E:

00000000 <<i128 as compiler_builtins::int::Int>::extract_sign>:
_ZN52_$LT$i128$u20$as$u20$compiler_builtins..int..Int$GT$12extract_sign17h9d8961dd365d2212E():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:167
   0:	f8dd c004 	ldr.w	ip, [sp, #4]
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:168
   4:	ea4f 71dc 	mov.w	r1, ip, lsr #31
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:173
   8:	7001      	strb	r1, [r0, #0]
   a:	eb12 71ec 	adds.w	r1, r2, ip, asr #31
   e:	ea81 71ec 	eor.w	r1, r1, ip, asr #31
  12:	6081      	str	r1, [r0, #8]
  14:	eb53 71ec 	adcs.w	r1, r3, ip, asr #31
  18:	ea81 71ec 	eor.w	r1, r1, ip, asr #31
  1c:	60c1      	str	r1, [r0, #12]
  1e:	9900      	ldr	r1, [sp, #0]
  20:	eb51 71ec 	adcs.w	r1, r1, ip, asr #31
  24:	ea81 71ec 	eor.w	r1, r1, ip, asr #31
  28:	6101      	str	r1, [r0, #16]
  2a:	eb4c 71ec 	adc.w	r1, ip, ip, asr #31
  2e:	ea81 71ec 	eor.w	r1, r1, ip, asr #31
  32:	6141      	str	r1, [r0, #20]
  34:	4770      	bx	lr

Disassembly of section .text._ZN52_$LT$i128$u20$as$u20$compiler_builtins..int..Int$GT$13from_unsigned17h46eb238f8024026cE:

00000000 <<i128 as compiler_builtins::int::Int>::from_unsigned>:
_ZN69_$LT$u128$u20$as$u20$compiler_builtins..int..CastInto$LT$u128$GT$$GT$4cast17h54e551254b0515c5E():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:181
   0:	4770      	bx	lr

Disassembly of section .text._ZN52_$LT$u128$u20$as$u20$compiler_builtins..int..Int$GT$9max_value17h8a7c76afc9c615ffE:

00000000 <<u128 as compiler_builtins::int::Int>::max_value>:
_ZN52_$LT$u128$u20$as$u20$compiler_builtins..int..Int$GT$9max_value17h8a7c76afc9c615ffE():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:102
   0:	f04f 30ff 	mov.w	r0, #4294967295	; 0xffffffff
   4:	f04f 31ff 	mov.w	r1, #4294967295	; 0xffffffff
   8:	f04f 32ff 	mov.w	r2, #4294967295	; 0xffffffff
   c:	f04f 33ff 	mov.w	r3, #4294967295	; 0xffffffff
  10:	4770      	bx	lr

Disassembly of section .text._ZN52_$LT$u128$u20$as$u20$compiler_builtins..int..Int$GT$9min_value17hee40099e11196ad3E:

00000000 <<u128 as compiler_builtins::int::Int>::min_value>:
_ZN52_$LT$u128$u20$as$u20$compiler_builtins..int..Int$GT$9min_value17hee40099e11196ad3E():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:106
   0:	2000      	movs	r0, #0
   2:	2100      	movs	r1, #0
   4:	2200      	movs	r2, #0
   6:	2300      	movs	r3, #0
   8:	4770      	bx	lr

Disassembly of section .text._ZN52_$LT$u128$u20$as$u20$compiler_builtins..int..Int$GT$15overflowing_add17h427042b03dbadd5dE:

00000000 <<u128 as compiler_builtins::int::Int>::overflowing_add>:
_ZN52_$LT$u128$u20$as$u20$compiler_builtins..int..Int$GT$15overflowing_add17h427042b03dbadd5dE():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:124
   0:	9902      	ldr	r1, [sp, #8]
overflowing_add():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:3123
   2:	1889      	adds	r1, r1, r2
_ZN52_$LT$u128$u20$as$u20$compiler_builtins..int..Int$GT$15overflowing_add17h427042b03dbadd5dE():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:126
   4:	6001      	str	r1, [r0, #0]
   6:	9903      	ldr	r1, [sp, #12]
   8:	9a00      	ldr	r2, [sp, #0]
overflowing_add():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:3123
   a:	4159      	adcs	r1, r3
_ZN52_$LT$u128$u20$as$u20$compiler_builtins..int..Int$GT$15overflowing_add17h427042b03dbadd5dE():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:126
   c:	6041      	str	r1, [r0, #4]
   e:	9904      	ldr	r1, [sp, #16]
overflowing_add():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:3123
  10:	4151      	adcs	r1, r2
_ZN52_$LT$u128$u20$as$u20$compiler_builtins..int..Int$GT$15overflowing_add17h427042b03dbadd5dE():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:126
  12:	6081      	str	r1, [r0, #8]
  14:	9905      	ldr	r1, [sp, #20]
  16:	9a01      	ldr	r2, [sp, #4]
overflowing_add():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:3123
  18:	4151      	adcs	r1, r2
_ZN52_$LT$u128$u20$as$u20$compiler_builtins..int..Int$GT$15overflowing_add17h427042b03dbadd5dE():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:126
  1a:	60c1      	str	r1, [r0, #12]
  1c:	f04f 0100 	mov.w	r1, #0
overflowing_add():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:3123
  20:	f141 0100 	adc.w	r1, r1, #0
_ZN52_$LT$u128$u20$as$u20$compiler_builtins..int..Int$GT$15overflowing_add17h427042b03dbadd5dE():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:126
  24:	7401      	strb	r1, [r0, #16]
  26:	4770      	bx	lr

Disassembly of section .text._ZN52_$LT$u128$u20$as$u20$compiler_builtins..int..Int$GT$12aborting_div17h27a57baa605fa62cE:

00000000 <<u128 as compiler_builtins::int::Int>::aborting_div>:
_ZN52_$LT$u128$u20$as$u20$compiler_builtins..int..Int$GT$12aborting_div17h27a57baa605fa62cE():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:128
   0:	b5f0      	push	{r4, r5, r6, r7, lr}
   2:	b085      	sub	sp, #20
   4:	f8dd c034 	ldr.w	ip, [sp, #52]	; 0x34
   8:	f8dd e02c 	ldr.w	lr, [sp, #44]	; 0x2c
   c:	9c0c      	ldr	r4, [sp, #48]	; 0x30
   e:	9d0a      	ldr	r5, [sp, #40]	; 0x28
checked_div():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2562
  10:	ea4e 060c 	orr.w	r6, lr, ip
  14:	ea45 0704 	orr.w	r7, r5, r4
  18:	433e      	orrs	r6, r7
  1a:	d007      	beq.n	2c <<u128 as compiler_builtins::int::Int>::aborting_div+0x2c>
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2563
  1c:	e9cd 5e00 	strd	r5, lr, [sp]
  20:	e9cd 4c02 	strd	r4, ip, [sp, #8]
  24:	f7ff fffe 	bl	0 <<u128 as compiler_builtins::int::Int>::aborting_div>
_ZN52_$LT$u128$u20$as$u20$compiler_builtins..int..Int$GT$12aborting_div17h27a57baa605fa62cE():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:130
  28:	b005      	add	sp, #20
  2a:	bdf0      	pop	{r4, r5, r6, r7, pc}
abort():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/lib.rs:41
  2c:	defe      	udf	#254	; 0xfe
  2e:	defe      	udf	#254	; 0xfe

Disassembly of section .text._ZN52_$LT$u128$u20$as$u20$compiler_builtins..int..Int$GT$12aborting_rem17h00ad1ff11268c56fE:

00000000 <<u128 as compiler_builtins::int::Int>::aborting_rem>:
_ZN52_$LT$u128$u20$as$u20$compiler_builtins..int..Int$GT$12aborting_rem17h00ad1ff11268c56fE():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:132
   0:	b5f0      	push	{r4, r5, r6, r7, lr}
   2:	b085      	sub	sp, #20
   4:	f8dd c034 	ldr.w	ip, [sp, #52]	; 0x34
   8:	f8dd e02c 	ldr.w	lr, [sp, #44]	; 0x2c
   c:	9c0c      	ldr	r4, [sp, #48]	; 0x30
   e:	9d0a      	ldr	r5, [sp, #40]	; 0x28
checked_rem():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2608
  10:	ea4e 060c 	orr.w	r6, lr, ip
  14:	ea45 0704 	orr.w	r7, r5, r4
  18:	433e      	orrs	r6, r7
  1a:	d007      	beq.n	2c <<u128 as compiler_builtins::int::Int>::aborting_rem+0x2c>
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2611
  1c:	e9cd 5e00 	strd	r5, lr, [sp]
  20:	e9cd 4c02 	strd	r4, ip, [sp, #8]
  24:	f7ff fffe 	bl	0 <<u128 as compiler_builtins::int::Int>::aborting_rem>
_ZN52_$LT$u128$u20$as$u20$compiler_builtins..int..Int$GT$12aborting_rem17h00ad1ff11268c56fE():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:134
  28:	b005      	add	sp, #20
  2a:	bdf0      	pop	{r4, r5, r6, r7, pc}
abort():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/lib.rs:41
  2c:	defe      	udf	#254	; 0xfe
  2e:	defe      	udf	#254	; 0xfe

Disassembly of section .text._ZN52_$LT$i128$u20$as$u20$compiler_builtins..int..Int$GT$9from_bool17h9be4e299856bec49E:

00000000 <<i128 as compiler_builtins::int::Int>::from_bool>:
_ZN52_$LT$u128$u20$as$u20$compiler_builtins..int..Int$GT$9from_bool17h5fac1ff16ef00816E():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:98
   0:	2100      	movs	r1, #0
   2:	2200      	movs	r2, #0
   4:	2300      	movs	r3, #0
   6:	4770      	bx	lr

Disassembly of section .text._ZN52_$LT$i128$u20$as$u20$compiler_builtins..int..Int$GT$9max_value17hf71a0b5f8136d1deE:

00000000 <<i128 as compiler_builtins::int::Int>::max_value>:
_ZN52_$LT$i128$u20$as$u20$compiler_builtins..int..Int$GT$9max_value17hf71a0b5f8136d1deE():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:102
   0:	f04f 30ff 	mov.w	r0, #4294967295	; 0xffffffff
   4:	f04f 31ff 	mov.w	r1, #4294967295	; 0xffffffff
   8:	f04f 32ff 	mov.w	r2, #4294967295	; 0xffffffff
   c:	f06f 4300 	mvn.w	r3, #2147483648	; 0x80000000
  10:	4770      	bx	lr

Disassembly of section .text._ZN52_$LT$i128$u20$as$u20$compiler_builtins..int..Int$GT$9min_value17hc2cb32d55cb828b8E:

00000000 <<i128 as compiler_builtins::int::Int>::min_value>:
_ZN52_$LT$i128$u20$as$u20$compiler_builtins..int..Int$GT$9min_value17hc2cb32d55cb828b8E():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:106
   0:	2000      	movs	r0, #0
   2:	2100      	movs	r1, #0
   4:	2200      	movs	r2, #0
   6:	f04f 4300 	mov.w	r3, #2147483648	; 0x80000000
   a:	4770      	bx	lr

Disassembly of section .text._ZN52_$LT$i128$u20$as$u20$compiler_builtins..int..Int$GT$12wrapping_add17h4f5617214a5602b2E:

00000000 <<i128 as compiler_builtins::int::Int>::wrapping_add>:
_ZN52_$LT$i128$u20$as$u20$compiler_builtins..int..Int$GT$12wrapping_add17h4f5617214a5602b2E():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:108
   0:	b5b0      	push	{r4, r5, r7, lr}
   2:	e9dd ec06 	ldrd	lr, ip, [sp, #24]
   6:	e9dd 5404 	ldrd	r5, r4, [sp, #16]
wrapping_add():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:1006
   a:	1940      	adds	r0, r0, r5
   c:	4161      	adcs	r1, r4
   e:	eb52 020e 	adcs.w	r2, r2, lr
  12:	eb43 030c 	adc.w	r3, r3, ip
_ZN52_$LT$i128$u20$as$u20$compiler_builtins..int..Int$GT$12wrapping_add17h4f5617214a5602b2E():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:110
  16:	bdb0      	pop	{r4, r5, r7, pc}

Disassembly of section .text._ZN52_$LT$i128$u20$as$u20$compiler_builtins..int..Int$GT$12wrapping_mul17hb0fa787bb0399bceE:

00000000 <<i128 as compiler_builtins::int::Int>::wrapping_mul>:
_ZN52_$LT$i128$u20$as$u20$compiler_builtins..int..Int$GT$12wrapping_mul17hb0fa787bb0399bceE():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:112
   0:	b580      	push	{r7, lr}
   2:	b084      	sub	sp, #16
wrapping_mul():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:1047
   4:	e88d 000f 	stmia.w	sp, {r0, r1, r2, r3}
   8:	ab06      	add	r3, sp, #24
   a:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
   c:	f7ff fffe 	bl	0 <<i128 as compiler_builtins::int::Int>::wrapping_mul>
_ZN52_$LT$i128$u20$as$u20$compiler_builtins..int..Int$GT$12wrapping_mul17hb0fa787bb0399bceE():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:114
  10:	b004      	add	sp, #16
  12:	bd80      	pop	{r7, pc}

Disassembly of section .text._ZN52_$LT$i128$u20$as$u20$compiler_builtins..int..Int$GT$12wrapping_sub17hac10a1a389091212E:

00000000 <<i128 as compiler_builtins::int::Int>::wrapping_sub>:
_ZN52_$LT$i128$u20$as$u20$compiler_builtins..int..Int$GT$12wrapping_sub17hac10a1a389091212E():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:116
   0:	b5b0      	push	{r4, r5, r7, lr}
   2:	e9dd ec06 	ldrd	lr, ip, [sp, #24]
   6:	e9dd 5404 	ldrd	r5, r4, [sp, #16]
wrapping_sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:1027
   a:	1b40      	subs	r0, r0, r5
   c:	41a1      	sbcs	r1, r4
   e:	eb72 020e 	sbcs.w	r2, r2, lr
  12:	eb63 030c 	sbc.w	r3, r3, ip
_ZN52_$LT$i128$u20$as$u20$compiler_builtins..int..Int$GT$12wrapping_sub17hac10a1a389091212E():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:118
  16:	bdb0      	pop	{r4, r5, r7, pc}

Disassembly of section .text._ZN52_$LT$i128$u20$as$u20$compiler_builtins..int..Int$GT$12wrapping_shl17hf3fd9a091d8ca7afE:

00000000 <<i128 as compiler_builtins::int::Int>::wrapping_shl>:
_ZN52_$LT$i128$u20$as$u20$compiler_builtins..int..Int$GT$12wrapping_shl17hf3fd9a091d8ca7afE():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:120
   0:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
   4:	9f09      	ldr	r7, [sp, #36]	; 0x24
   6:	f04f 0800 	mov.w	r8, #0
wrapping_shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:1209
   a:	f007 0e7f 	and.w	lr, r7, #127	; 0x7f
   e:	f1ae 0940 	sub.w	r9, lr, #64	; 0x40
  12:	f1ce 0660 	rsb	r6, lr, #96	; 0x60
  16:	f1ae 0a60 	sub.w	sl, lr, #96	; 0x60
  1a:	fa03 f50e 	lsl.w	r5, r3, lr
  1e:	fa01 f709 	lsl.w	r7, r1, r9
  22:	fa20 f606 	lsr.w	r6, r0, r6
  26:	ea46 0407 	orr.w	r4, r6, r7
  2a:	f1ce 0720 	rsb	r7, lr, #32
  2e:	f1ba 0f00 	cmp.w	sl, #0
  32:	f1ce 0b40 	rsb	fp, lr, #64	; 0x40
  36:	fa22 f607 	lsr.w	r6, r2, r7
  3a:	ea46 0c05 	orr.w	ip, r6, r5
  3e:	f1ae 0520 	sub.w	r5, lr, #32
  42:	bfa8      	it	ge
  44:	fa00 f40a 	lslge.w	r4, r0, sl
  48:	2d00      	cmp	r5, #0
  4a:	bfa8      	it	ge
  4c:	fa02 fc05 	lslge.w	ip, r2, r5
  50:	fa21 f60b 	lsr.w	r6, r1, fp
  54:	2f00      	cmp	r7, #0
  56:	bfa8      	it	ge
  58:	2600      	movge	r6, #0
  5a:	f1be 0f40 	cmp.w	lr, #64	; 0x40
  5e:	bf38      	it	cc
  60:	ea4c 0406 	orrcc.w	r4, ip, r6
  64:	f1be 0f00 	cmp.w	lr, #0
  68:	fa01 f60e 	lsl.w	r6, r1, lr
  6c:	bf18      	it	ne
  6e:	4623      	movne	r3, r4
  70:	fa20 f407 	lsr.w	r4, r0, r7
  74:	ea44 0c06 	orr.w	ip, r4, r6
  78:	f1cb 0620 	rsb	r6, fp, #32
  7c:	2d00      	cmp	r5, #0
  7e:	bfa8      	it	ge
  80:	fa00 fc05 	lslge.w	ip, r0, r5
  84:	f1be 0f40 	cmp.w	lr, #64	; 0x40
  88:	fa20 f40b 	lsr.w	r4, r0, fp
  8c:	bf28      	it	cs
  8e:	46c4      	movcs	ip, r8
  90:	fa01 f606 	lsl.w	r6, r1, r6
  94:	4334      	orrs	r4, r6
  96:	2f00      	cmp	r7, #0
  98:	bfa8      	it	ge
  9a:	fa21 f407 	lsrge.w	r4, r1, r7
  9e:	fa02 f10e 	lsl.w	r1, r2, lr
  a2:	2d00      	cmp	r5, #0
  a4:	bfa8      	it	ge
  a6:	2100      	movge	r1, #0
  a8:	fa00 f609 	lsl.w	r6, r0, r9
  ac:	f1ba 0f00 	cmp.w	sl, #0
  b0:	bfa8      	it	ge
  b2:	2600      	movge	r6, #0
  b4:	f1be 0f40 	cmp.w	lr, #64	; 0x40
  b8:	bf38      	it	cc
  ba:	ea41 0604 	orrcc.w	r6, r1, r4
  be:	f1be 0f00 	cmp.w	lr, #0
  c2:	fa00 f00e 	lsl.w	r0, r0, lr
  c6:	bf18      	it	ne
  c8:	4632      	movne	r2, r6
  ca:	2d00      	cmp	r5, #0
  cc:	bfa8      	it	ge
  ce:	2000      	movge	r0, #0
_ZN52_$LT$i128$u20$as$u20$compiler_builtins..int..Int$GT$12wrapping_shl17hf3fd9a091d8ca7afE():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:122
  d0:	4661      	mov	r1, ip
wrapping_shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:1209
  d2:	f1be 0f40 	cmp.w	lr, #64	; 0x40
  d6:	bf28      	it	cs
  d8:	4640      	movcs	r0, r8
_ZN52_$LT$i128$u20$as$u20$compiler_builtins..int..Int$GT$12wrapping_shl17hf3fd9a091d8ca7afE():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:122
  da:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}

Disassembly of section .text._ZN52_$LT$i128$u20$as$u20$compiler_builtins..int..Int$GT$15overflowing_add17h97923dff9358c8f1E:

00000000 <<i128 as compiler_builtins::int::Int>::overflowing_add>:
_ZN52_$LT$i128$u20$as$u20$compiler_builtins..int..Int$GT$15overflowing_add17h97923dff9358c8f1E():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:124
   0:	9902      	ldr	r1, [sp, #8]
   2:	f8dd c014 	ldr.w	ip, [sp, #20]
overflowing_add():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:1331
   6:	1889      	adds	r1, r1, r2
_ZN52_$LT$i128$u20$as$u20$compiler_builtins..int..Int$GT$15overflowing_add17h97923dff9358c8f1E():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:126
   8:	6001      	str	r1, [r0, #0]
   a:	9903      	ldr	r1, [sp, #12]
   c:	9a00      	ldr	r2, [sp, #0]
overflowing_add():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:1331
   e:	4159      	adcs	r1, r3
_ZN52_$LT$i128$u20$as$u20$compiler_builtins..int..Int$GT$15overflowing_add17h97923dff9358c8f1E():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:126
  10:	6041      	str	r1, [r0, #4]
  12:	9904      	ldr	r1, [sp, #16]
overflowing_add():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:1331
  14:	4151      	adcs	r1, r2
  16:	9a01      	ldr	r2, [sp, #4]
_ZN52_$LT$i128$u20$as$u20$compiler_builtins..int..Int$GT$15overflowing_add17h97923dff9358c8f1E():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:126
  18:	6081      	str	r1, [r0, #8]
  1a:	f04f 0100 	mov.w	r1, #0
overflowing_add():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:1331
  1e:	eb42 030c 	adc.w	r3, r2, ip
  22:	f1b2 3fff 	cmp.w	r2, #4294967295	; 0xffffffff
  26:	f04f 0200 	mov.w	r2, #0
_ZN52_$LT$i128$u20$as$u20$compiler_builtins..int..Int$GT$15overflowing_add17h97923dff9358c8f1E():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:126
  2a:	60c3      	str	r3, [r0, #12]
overflowing_add():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:1331
  2c:	bfc8      	it	gt
  2e:	2201      	movgt	r2, #1
  30:	f1b3 3fff 	cmp.w	r3, #4294967295	; 0xffffffff
  34:	f04f 0300 	mov.w	r3, #0
  38:	bfc8      	it	gt
  3a:	2301      	movgt	r3, #1
  3c:	1ad3      	subs	r3, r2, r3
  3e:	bf18      	it	ne
  40:	2301      	movne	r3, #1
  42:	f1bc 3fff 	cmp.w	ip, #4294967295	; 0xffffffff
  46:	bfc8      	it	gt
  48:	2101      	movgt	r1, #1
  4a:	1a51      	subs	r1, r2, r1
  4c:	fab1 f181 	clz	r1, r1
  50:	0949      	lsrs	r1, r1, #5
  52:	4019      	ands	r1, r3
_ZN52_$LT$i128$u20$as$u20$compiler_builtins..int..Int$GT$15overflowing_add17h97923dff9358c8f1E():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:126
  54:	7401      	strb	r1, [r0, #16]
  56:	4770      	bx	lr

Disassembly of section .text._ZN52_$LT$i128$u20$as$u20$compiler_builtins..int..Int$GT$12aborting_div17h268dde6fc0cc8311E:

00000000 <<i128 as compiler_builtins::int::Int>::aborting_div>:
_ZN52_$LT$i128$u20$as$u20$compiler_builtins..int..Int$GT$12aborting_div17h268dde6fc0cc8311E():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:128
   0:	b5f0      	push	{r4, r5, r6, r7, lr}
   2:	b085      	sub	sp, #20
   4:	f8dd c034 	ldr.w	ip, [sp, #52]	; 0x34
   8:	f8dd e02c 	ldr.w	lr, [sp, #44]	; 0x2c
   c:	9c0c      	ldr	r4, [sp, #48]	; 0x30
   e:	9d0a      	ldr	r5, [sp, #40]	; 0x28
checked_div():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:670
  10:	ea4e 060c 	orr.w	r6, lr, ip
  14:	ea45 0704 	orr.w	r7, r5, r4
  18:	433e      	orrs	r6, r7
  1a:	d016      	beq.n	4a <<i128 as compiler_builtins::int::Int>::aborting_div+0x4a>
  1c:	f083 4700 	eor.w	r7, r3, #2147483648	; 0x80000000
  20:	ea40 0602 	orr.w	r6, r0, r2
  24:	430f      	orrs	r7, r1
  26:	433e      	orrs	r6, r7
  28:	bf01      	itttt	eq
  2a:	ea05 0604 	andeq.w	r6, r5, r4
  2e:	ea0e 070c 	andeq.w	r7, lr, ip
  32:	403e      	andeq	r6, r7
  34:	f116 0601 	addseq.w	r6, r6, #1
  38:	d007      	beq.n	4a <<i128 as compiler_builtins::int::Int>::aborting_div+0x4a>
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:673
  3a:	e9cd 5e00 	strd	r5, lr, [sp]
  3e:	e9cd 4c02 	strd	r4, ip, [sp, #8]
  42:	f7ff fffe 	bl	0 <<i128 as compiler_builtins::int::Int>::aborting_div>
_ZN52_$LT$i128$u20$as$u20$compiler_builtins..int..Int$GT$12aborting_div17h268dde6fc0cc8311E():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:130
  46:	b005      	add	sp, #20
  48:	bdf0      	pop	{r4, r5, r6, r7, pc}
abort():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/lib.rs:41
  4a:	defe      	udf	#254	; 0xfe
  4c:	defe      	udf	#254	; 0xfe

Disassembly of section .text._ZN52_$LT$i128$u20$as$u20$compiler_builtins..int..Int$GT$12aborting_rem17h3b27c2da81205d13E:

00000000 <<i128 as compiler_builtins::int::Int>::aborting_rem>:
_ZN52_$LT$i128$u20$as$u20$compiler_builtins..int..Int$GT$12aborting_rem17h3b27c2da81205d13E():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:132
   0:	b5f0      	push	{r4, r5, r6, r7, lr}
   2:	b085      	sub	sp, #20
   4:	f8dd c034 	ldr.w	ip, [sp, #52]	; 0x34
   8:	f8dd e02c 	ldr.w	lr, [sp, #44]	; 0x2c
   c:	9c0c      	ldr	r4, [sp, #48]	; 0x30
   e:	9d0a      	ldr	r5, [sp, #40]	; 0x28
checked_rem():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:723
  10:	ea4e 060c 	orr.w	r6, lr, ip
  14:	ea45 0704 	orr.w	r7, r5, r4
  18:	433e      	orrs	r6, r7
  1a:	d016      	beq.n	4a <<i128 as compiler_builtins::int::Int>::aborting_rem+0x4a>
  1c:	f083 4700 	eor.w	r7, r3, #2147483648	; 0x80000000
  20:	ea40 0602 	orr.w	r6, r0, r2
  24:	430f      	orrs	r7, r1
  26:	433e      	orrs	r6, r7
  28:	bf01      	itttt	eq
  2a:	ea05 0604 	andeq.w	r6, r5, r4
  2e:	ea0e 070c 	andeq.w	r7, lr, ip
  32:	403e      	andeq	r6, r7
  34:	f116 0601 	addseq.w	r6, r6, #1
  38:	d007      	beq.n	4a <<i128 as compiler_builtins::int::Int>::aborting_rem+0x4a>
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:726
  3a:	e9cd 5e00 	strd	r5, lr, [sp]
  3e:	e9cd 4c02 	strd	r4, ip, [sp, #8]
  42:	f7ff fffe 	bl	0 <<i128 as compiler_builtins::int::Int>::aborting_rem>
_ZN52_$LT$i128$u20$as$u20$compiler_builtins..int..Int$GT$12aborting_rem17h3b27c2da81205d13E():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:134
  46:	b005      	add	sp, #20
  48:	bdf0      	pop	{r4, r5, r6, r7, pc}
abort():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/lib.rs:41
  4a:	defe      	udf	#254	; 0xfe
  4c:	defe      	udf	#254	; 0xfe

Disassembly of section .text._ZN52_$LT$i128$u20$as$u20$compiler_builtins..int..Int$GT$13leading_zeros17he2388646cbcfbaf0E:

00000000 <<i128 as compiler_builtins::int::Int>::leading_zeros>:
_ZN52_$LT$i128$u20$as$u20$compiler_builtins..int..Int$GT$13leading_zeros17he2388646cbcfbaf0E():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2239
   0:	fab2 fc82 	clz	ip, r2
   4:	fab0 f080 	clz	r0, r0
   8:	f10c 0c20 	add.w	ip, ip, #32
   c:	2b00      	cmp	r3, #0
   e:	f100 0020 	add.w	r0, r0, #32
  12:	bf18      	it	ne
  14:	fab3 fc83 	clzne	ip, r3
  18:	2900      	cmp	r1, #0
  1a:	bf18      	it	ne
  1c:	fab1 f081 	clzne	r0, r1
  20:	ea52 0103 	orrs.w	r1, r2, r3
  24:	bf08      	it	eq
  26:	f100 0c40 	addeq.w	ip, r0, #64	; 0x40
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:138
  2a:	4660      	mov	r0, ip
  2c:	4770      	bx	lr

Disassembly of section .text._ZN56_$LT$i64$u20$as$u20$compiler_builtins..int..LargeInt$GT$3low17hab22e0c7935ffddeE:

00000000 <<i64 as compiler_builtins::int::LargeInt>::low>:
_ZN69_$LT$u64$u20$as$u20$compiler_builtins..int..CastInto$LT$usize$GT$$GT$4cast17h81588877fb1116ceE():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:212
   0:	4770      	bx	lr

Disassembly of section .text._ZN56_$LT$i64$u20$as$u20$compiler_builtins..int..LargeInt$GT$4high17h36e5923a9920504eE:

00000000 <<i64 as compiler_builtins::int::LargeInt>::high>:
_ZN56_$LT$u64$u20$as$u20$compiler_builtins..int..LargeInt$GT$4high17h222a6ec7e1623fbeE():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:216
   0:	4608      	mov	r0, r1
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:218
   2:	4770      	bx	lr

Disassembly of section .text._ZN56_$LT$i64$u20$as$u20$compiler_builtins..int..LargeInt$GT$10from_parts17h6771ef238b646afeE:

00000000 <<i64 as compiler_builtins::int::LargeInt>::from_parts>:
_ZN56_$LT$u64$u20$as$u20$compiler_builtins..int..LargeInt$GT$10from_parts17h9e1750f8073bd734E():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:224
   0:	4770      	bx	lr

Disassembly of section .text._ZN57_$LT$i128$u20$as$u20$compiler_builtins..int..LargeInt$GT$3low17h6fc60cc7c251eaf4E:

00000000 <<i128 as compiler_builtins::int::LargeInt>::low>:
_ZN68_$LT$u128$u20$as$u20$compiler_builtins..int..CastInto$LT$u64$GT$$GT$4cast17h471482c72f1751acE():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:212
   0:	4770      	bx	lr

Disassembly of section .text._ZN57_$LT$i128$u20$as$u20$compiler_builtins..int..LargeInt$GT$4high17hda152460f860e7eaE:

00000000 <<i128 as compiler_builtins::int::LargeInt>::high>:
_ZN57_$LT$u128$u20$as$u20$compiler_builtins..int..LargeInt$GT$4high17h204d411e43e72342E():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:216
   0:	4619      	mov	r1, r3
   2:	4610      	mov	r0, r2
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:218
   4:	4770      	bx	lr

Disassembly of section .text._ZN57_$LT$i128$u20$as$u20$compiler_builtins..int..LargeInt$GT$10from_parts17h4b05453ca62bce04E:

00000000 <<i128 as compiler_builtins::int::LargeInt>::from_parts>:
_ZN57_$LT$u128$u20$as$u20$compiler_builtins..int..LargeInt$GT$10from_parts17h7f3f3babc25be102E():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:224
   0:	4770      	bx	lr

Disassembly of section .text._ZN67_$LT$u32$u20$as$u20$compiler_builtins..int..CastInto$LT$i64$GT$$GT$4cast17hc9fef88750a9416eE:

00000000 <<u32 as compiler_builtins::int::CastInto<i64>>::cast>:
_ZN67_$LT$u32$u20$as$u20$compiler_builtins..int..CastInto$LT$u64$GT$$GT$4cast17hf5d796d0b24c7e43E():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:247
   0:	2100      	movs	r1, #0
   2:	4770      	bx	lr

Disassembly of section .text._ZN68_$LT$u32$u20$as$u20$compiler_builtins..int..CastInto$LT$i128$GT$$GT$4cast17h21aedfda4e7a0525E:

00000000 <<u32 as compiler_builtins::int::CastInto<i128>>::cast>:
_ZN68_$LT$u32$u20$as$u20$compiler_builtins..int..CastInto$LT$u128$GT$$GT$4cast17h64722758cdc5ea33E():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:247
   0:	2100      	movs	r1, #0
   2:	2200      	movs	r2, #0
   4:	2300      	movs	r3, #0
   6:	4770      	bx	lr

Disassembly of section .text._ZN67_$LT$i32$u20$as$u20$compiler_builtins..int..CastInto$LT$i64$GT$$GT$4cast17h26dc26ff041e24bbE:

00000000 <<i32 as compiler_builtins::int::CastInto<i64>>::cast>:
_ZN67_$LT$i32$u20$as$u20$compiler_builtins..int..CastInto$LT$u64$GT$$GT$4cast17h84a06006b0a689d1E():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:241
   0:	17c1      	asrs	r1, r0, #31
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:247
   2:	4770      	bx	lr

Disassembly of section .text._ZN68_$LT$i32$u20$as$u20$compiler_builtins..int..CastInto$LT$i128$GT$$GT$4cast17h6667ed2402f2130bE:

00000000 <<i32 as compiler_builtins::int::CastInto<i128>>::cast>:
_ZN68_$LT$i32$u20$as$u20$compiler_builtins..int..CastInto$LT$u128$GT$$GT$4cast17hed4cc375ca07db43E():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:241
   0:	17c1      	asrs	r1, r0, #31
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:247
   2:	460a      	mov	r2, r1
   4:	460b      	mov	r3, r1
   6:	4770      	bx	lr

Disassembly of section .text._ZN68_$LT$u64$u20$as$u20$compiler_builtins..int..CastInto$LT$i128$GT$$GT$4cast17ha5e94be2abc73f48E:

00000000 <<u64 as compiler_builtins::int::CastInto<i128>>::cast>:
_ZN68_$LT$u64$u20$as$u20$compiler_builtins..int..CastInto$LT$u128$GT$$GT$4cast17he1c3dc6b74936031E():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:247
   0:	2200      	movs	r2, #0
   2:	2300      	movs	r3, #0
   4:	4770      	bx	lr

Disassembly of section .text._ZN68_$LT$i64$u20$as$u20$compiler_builtins..int..CastInto$LT$i128$GT$$GT$4cast17hc963927caff004deE:

00000000 <<i64 as compiler_builtins::int::CastInto<i128>>::cast>:
_ZN68_$LT$i64$u20$as$u20$compiler_builtins..int..CastInto$LT$u128$GT$$GT$4cast17he0f85ccbe7382ca5E():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:241
   0:	17ca      	asrs	r2, r1, #31
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:247
   2:	4613      	mov	r3, r2
   4:	4770      	bx	lr

Disassembly of section .text._ZN68_$LT$i128$u20$as$u20$compiler_builtins..int..CastInto$LT$i32$GT$$GT$4cast17h6d5240993509f82eE:

00000000 <<i128 as compiler_builtins::int::CastInto<i32>>::cast>:
_ZN70_$LT$u128$u20$as$u20$compiler_builtins..int..CastInto$LT$usize$GT$$GT$4cast17h892a577605ea0121E():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:247
   0:	4770      	bx	lr

Disassembly of section .text._ZN55_$LT$u32$u20$as$u20$compiler_builtins..int..WideInt$GT$8wide_mul17h42ad4962ba9037e9E:

00000000 <<u32 as compiler_builtins::int::WideInt>::wide_mul>:
_ZN55_$LT$u32$u20$as$u20$compiler_builtins..int..WideInt$GT$8wide_mul17h42ad4962ba9037e9E():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2884
   0:	fba1 1000 	umull	r1, r0, r1, r0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:275
   4:	4770      	bx	lr

Disassembly of section .text._ZN55_$LT$u32$u20$as$u20$compiler_builtins..int..WideInt$GT$15wide_shift_left17h313bc0d781de8304E:

00000000 <<u32 as compiler_builtins::int::WideInt>::wide_shift_left>:
_ZN55_$LT$u32$u20$as$u20$compiler_builtins..int..WideInt$GT$15wide_shift_left17h313bc0d781de8304E():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:277
   0:	b580      	push	{r7, lr}
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:278
   2:	6803      	ldr	r3, [r0, #0]
   4:	f002 0c1f 	and.w	ip, r2, #31
   8:	4252      	negs	r2, r2
   a:	f002 021f 	and.w	r2, r2, #31
   e:	fa03 fe0c 	lsl.w	lr, r3, ip
  12:	680b      	ldr	r3, [r1, #0]
  14:	fa23 f202 	lsr.w	r2, r3, r2
  18:	ea42 020e 	orr.w	r2, r2, lr
  1c:	6002      	str	r2, [r0, #0]
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:279
  1e:	6808      	ldr	r0, [r1, #0]
  20:	fa00 f00c 	lsl.w	r0, r0, ip
  24:	6008      	str	r0, [r1, #0]
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:280
  26:	bd80      	pop	{r7, pc}

Disassembly of section .text._ZN55_$LT$u32$u20$as$u20$compiler_builtins..int..WideInt$GT$28wide_shift_right_with_sticky17h8109bdc72e06bfdcE:

00000000 <<u32 as compiler_builtins::int::WideInt>::wide_shift_right_with_sticky>:
_ZN55_$LT$u32$u20$as$u20$compiler_builtins..int..WideInt$GT$28wide_shift_right_with_sticky17h8109bdc72e06bfdcE():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:283
   0:	2a1f      	cmp	r2, #31
   2:	dc16      	bgt.n	32 <<u32 as compiler_builtins::int::WideInt>::wide_shift_right_with_sticky+0x32>
   4:	b580      	push	{r7, lr}
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:284
   6:	680b      	ldr	r3, [r1, #0]
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:285
   8:	f8d0 e000 	ldr.w	lr, [r0]
   c:	fa63 fc02 	ror.w	ip, r3, r2
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:284
  10:	4253      	negs	r3, r2
  12:	f003 031f 	and.w	r3, r3, #31
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:285
  16:	fa0e f303 	lsl.w	r3, lr, r3
  1a:	ea43 030c 	orr.w	r3, r3, ip
  1e:	600b      	str	r3, [r1, #0]
  20:	f002 011f 	and.w	r1, r2, #31
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:286
  24:	6802      	ldr	r2, [r0, #0]
  26:	fa22 f101 	lsr.w	r1, r2, r1
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:283
  2a:	e8bd 4080 	ldmia.w	sp!, {r7, lr}
  2e:	6001      	str	r1, [r0, #0]
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:296
  30:	4770      	bx	lr
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:287
  32:	2a3f      	cmp	r2, #63	; 0x3f
  34:	dc05      	bgt.n	42 <<u32 as compiler_builtins::int::WideInt>::wide_shift_right_with_sticky+0x42>
  36:	6803      	ldr	r3, [r0, #0]
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:288
  38:	fa63 f202 	ror.w	r2, r3, r2
  3c:	680b      	ldr	r3, [r1, #0]
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:289
  3e:	431a      	orrs	r2, r3
  40:	600a      	str	r2, [r1, #0]
  42:	2100      	movs	r1, #0
  44:	6001      	str	r1, [r0, #0]
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:296
  46:	4770      	bx	lr

Disassembly of section .text._ZN55_$LT$u64$u20$as$u20$compiler_builtins..int..WideInt$GT$8wide_mul17hda13b9597728566bE:

00000000 <<u64 as compiler_builtins::int::WideInt>::wide_mul>:
_ZN55_$LT$u64$u20$as$u20$compiler_builtins..int..WideInt$GT$8wide_mul17hda13b9597728566bE():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:272
   0:	b580      	push	{r7, lr}
   2:	b084      	sub	sp, #16
   4:	f04f 0c00 	mov.w	ip, #0
wrapping_mul():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2884
   8:	e88d 1003 	stmia.w	sp, {r0, r1, ip}
   c:	4610      	mov	r0, r2
   e:	4619      	mov	r1, r3
  10:	2200      	movs	r2, #0
  12:	2300      	movs	r3, #0
  14:	f8cd c00c 	str.w	ip, [sp, #12]
  18:	f7ff fffe 	bl	0 <<u64 as compiler_builtins::int::WideInt>::wide_mul>
  1c:	4684      	mov	ip, r0
  1e:	468e      	mov	lr, r1
  20:	4610      	mov	r0, r2
  22:	4619      	mov	r1, r3
_ZN55_$LT$u64$u20$as$u20$compiler_builtins..int..WideInt$GT$8wide_mul17hda13b9597728566bE():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:275
  24:	4662      	mov	r2, ip
  26:	4673      	mov	r3, lr
  28:	b004      	add	sp, #16
  2a:	bd80      	pop	{r7, pc}

Disassembly of section .text._ZN55_$LT$u64$u20$as$u20$compiler_builtins..int..WideInt$GT$15wide_shift_left17h29b3f43e358ad09cE:

00000000 <<u64 as compiler_builtins::int::WideInt>::wide_shift_left>:
_ZN55_$LT$u64$u20$as$u20$compiler_builtins..int..WideInt$GT$15wide_shift_left17h29b3f43e358ad09cE():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:277
   0:	e92d 43f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, lr}
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:278
   4:	f002 0c3f 	and.w	ip, r2, #63	; 0x3f
   8:	e9d0 9300 	ldrd	r9, r3, [r0]
   c:	f1cc 0e20 	rsb	lr, ip, #32
  10:	4252      	negs	r2, r2
  12:	fa03 f30c 	lsl.w	r3, r3, ip
  16:	f002 023f 	and.w	r2, r2, #63	; 0x3f
  1a:	fa29 f50e 	lsr.w	r5, r9, lr
  1e:	f1a2 0420 	sub.w	r4, r2, #32
  22:	431d      	orrs	r5, r3
  24:	f1ac 0320 	sub.w	r3, ip, #32
  28:	2b00      	cmp	r3, #0
  2a:	bfa8      	it	ge
  2c:	fa09 f503 	lslge.w	r5, r9, r3
  30:	e9d1 8700 	ldrd	r8, r7, [r1]
  34:	2c00      	cmp	r4, #0
  36:	fa27 f602 	lsr.w	r6, r7, r2
  3a:	bfa8      	it	ge
  3c:	2600      	movge	r6, #0
  3e:	4335      	orrs	r5, r6
  40:	6045      	str	r5, [r0, #4]
  42:	fa28 f502 	lsr.w	r5, r8, r2
  46:	f1c2 0220 	rsb	r2, r2, #32
  4a:	2c00      	cmp	r4, #0
  4c:	fa07 f202 	lsl.w	r2, r7, r2
  50:	ea42 0205 	orr.w	r2, r2, r5
  54:	bfa8      	it	ge
  56:	fa27 f204 	lsrge.w	r2, r7, r4
  5a:	fa09 f40c 	lsl.w	r4, r9, ip
  5e:	2b00      	cmp	r3, #0
  60:	bfa8      	it	ge
  62:	2400      	movge	r4, #0
  64:	4322      	orrs	r2, r4
  66:	6002      	str	r2, [r0, #0]
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:279
  68:	e9d1 0200 	ldrd	r0, r2, [r1]
  6c:	2b00      	cmp	r3, #0
  6e:	fa02 f20c 	lsl.w	r2, r2, ip
  72:	fa00 f40c 	lsl.w	r4, r0, ip
  76:	fa20 f70e 	lsr.w	r7, r0, lr
  7a:	ea42 0207 	orr.w	r2, r2, r7
  7e:	bfa8      	it	ge
  80:	2400      	movge	r4, #0
  82:	2b00      	cmp	r3, #0
  84:	bfa8      	it	ge
  86:	fa00 f203 	lslge.w	r2, r0, r3
  8a:	e9c1 4200 	strd	r4, r2, [r1]
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:280
  8e:	e8bd 83f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, pc}

Disassembly of section .text._ZN55_$LT$u64$u20$as$u20$compiler_builtins..int..WideInt$GT$28wide_shift_right_with_sticky17h498f9ce8c9e4ba3cE:

00000000 <<u64 as compiler_builtins::int::WideInt>::wide_shift_right_with_sticky>:
_ZN55_$LT$u64$u20$as$u20$compiler_builtins..int..WideInt$GT$28wide_shift_right_with_sticky17h498f9ce8c9e4ba3cE():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:282
   0:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:283
   4:	2a3f      	cmp	r2, #63	; 0x3f
   6:	dc5d      	bgt.n	c4 <<u64 as compiler_builtins::int::WideInt>::wide_shift_right_with_sticky+0xc4>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:285
   8:	f002 033f 	and.w	r3, r2, #63	; 0x3f
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:284
   c:	e9d1 b800 	ldrd	fp, r8, [r1]
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:285
  10:	f1c3 0e20 	rsb	lr, r3, #32
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:284
  14:	4252      	negs	r2, r2
  16:	f002 023f 	and.w	r2, r2, #63	; 0x3f
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:285
  1a:	fa2b fc03 	lsr.w	ip, fp, r3
  1e:	fa08 f60e 	lsl.w	r6, r8, lr
  22:	ea46 060c 	orr.w	r6, r6, ip
  26:	f1a3 0c20 	sub.w	ip, r3, #32
  2a:	f1bc 0f00 	cmp.w	ip, #0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:284
  2e:	fa0b f702 	lsl.w	r7, fp, r2
  32:	f1a2 0420 	sub.w	r4, r2, #32
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:285
  36:	bfa8      	it	ge
  38:	fa28 f60c 	lsrge.w	r6, r8, ip
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:284
  3c:	2c00      	cmp	r4, #0
  3e:	bfa8      	it	ge
  40:	2700      	movge	r7, #0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:285
  42:	ea47 0a06 	orr.w	sl, r7, r6
  46:	e9d0 7900 	ldrd	r7, r9, [r0]
  4a:	2c00      	cmp	r4, #0
  4c:	fa09 f902 	lsl.w	r9, r9, r2
  50:	fa07 f602 	lsl.w	r6, r7, r2
  54:	bfa8      	it	ge
  56:	2600      	movge	r6, #0
  58:	2c00      	cmp	r4, #0
  5a:	ea46 060a 	orr.w	r6, r6, sl
  5e:	600e      	str	r6, [r1, #0]
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:284
  60:	f1c2 0620 	rsb	r6, r2, #32
  64:	fa08 f202 	lsl.w	r2, r8, r2
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:285
  68:	fa27 f506 	lsr.w	r5, r7, r6
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:284
  6c:	fa2b f606 	lsr.w	r6, fp, r6
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:285
  70:	ea45 0509 	orr.w	r5, r5, r9
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:284
  74:	ea42 0206 	orr.w	r2, r2, r6
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:285
  78:	bfa8      	it	ge
  7a:	fa07 f504 	lslge.w	r5, r7, r4
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:284
  7e:	2c00      	cmp	r4, #0
  80:	bfa8      	it	ge
  82:	fa0b f204 	lslge.w	r2, fp, r4
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:285
  86:	fa28 f403 	lsr.w	r4, r8, r3
  8a:	f1bc 0f00 	cmp.w	ip, #0
  8e:	bfa8      	it	ge
  90:	2400      	movge	r4, #0
  92:	4322      	orrs	r2, r4
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:286
  94:	f1bc 0f00 	cmp.w	ip, #0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:285
  98:	ea42 0205 	orr.w	r2, r2, r5
  9c:	604a      	str	r2, [r1, #4]
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:286
  9e:	e9d0 1200 	ldrd	r1, r2, [r0]
  a2:	fa02 f70e 	lsl.w	r7, r2, lr
  a6:	fa21 f103 	lsr.w	r1, r1, r3
  aa:	ea41 0107 	orr.w	r1, r1, r7
  ae:	bfa8      	it	ge
  b0:	fa22 f10c 	lsrge.w	r1, r2, ip
  b4:	fa22 f203 	lsr.w	r2, r2, r3
  b8:	bfa8      	it	ge
  ba:	2200      	movge	r2, #0
  bc:	e9c0 1200 	strd	r1, r2, [r0]
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:296
  c0:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:287
  c4:	2a7f      	cmp	r2, #127	; 0x7f
  c6:	dc38      	bgt.n	13a <<u64 as compiler_builtins::int::WideInt>::wide_shift_right_with_sticky+0x13a>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:289
  c8:	f002 063f 	and.w	r6, r2, #63	; 0x3f
  cc:	e9d0 3e00 	ldrd	r3, lr, [r0]
  d0:	f1c6 0420 	rsb	r4, r6, #32
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:288
  d4:	4252      	negs	r2, r2
  d6:	f002 023f 	and.w	r2, r2, #63	; 0x3f
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:289
  da:	f1a6 0c20 	sub.w	ip, r6, #32
  de:	fa23 f506 	lsr.w	r5, r3, r6
  e2:	fa0e f404 	lsl.w	r4, lr, r4
  e6:	4325      	orrs	r5, r4
  e8:	f1bc 0f00 	cmp.w	ip, #0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:288
  ec:	fa03 f402 	lsl.w	r4, r3, r2
  f0:	f1a2 0720 	sub.w	r7, r2, #32
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:289
  f4:	bfa8      	it	ge
  f6:	fa2e f50c 	lsrge.w	r5, lr, ip
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:288
  fa:	2f00      	cmp	r7, #0
  fc:	bfa8      	it	ge
  fe:	2400      	movge	r4, #0
 100:	2f00      	cmp	r7, #0
 102:	ea44 0405 	orr.w	r4, r4, r5
 106:	e9d1 5800 	ldrd	r5, r8, [r1]
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:289
 10a:	ea44 0405 	orr.w	r4, r4, r5
 10e:	600c      	str	r4, [r1, #0]
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:288
 110:	fa0e f402 	lsl.w	r4, lr, r2
 114:	f1c2 0220 	rsb	r2, r2, #32
 118:	fa23 f202 	lsr.w	r2, r3, r2
 11c:	ea42 0204 	orr.w	r2, r2, r4
 120:	bfa8      	it	ge
 122:	fa03 f207 	lslge.w	r2, r3, r7
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:289
 126:	fa2e f306 	lsr.w	r3, lr, r6
 12a:	f1bc 0f00 	cmp.w	ip, #0
 12e:	bfa8      	it	ge
 130:	2300      	movge	r3, #0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:288
 132:	431a      	orrs	r2, r3
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:289
 134:	ea42 0208 	orr.w	r2, r2, r8
 138:	604a      	str	r2, [r1, #4]
 13a:	2100      	movs	r1, #0
 13c:	2200      	movs	r2, #0
 13e:	e9c0 1200 	strd	r1, r2, [r0]
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:296
 142:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}

Disassembly of section .text.__clzsi2:

00000000 <__clzsi2>:
__clzsi2():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:254
   0:	2210      	movs	r2, #16
   2:	2100      	movs	r1, #0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:340
   4:	ebb1 4f10 	cmp.w	r1, r0, lsr #16
   8:	bf18      	it	ne
   a:	0c00      	lsrne	r0, r0, #16
   c:	bf08      	it	eq
   e:	2220      	moveq	r2, #32
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:346
  10:	ebb1 2f10 	cmp.w	r1, r0, lsr #8
  14:	bf1c      	itt	ne
  16:	3a08      	subne	r2, #8
  18:	0a00      	lsrne	r0, r0, #8
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:351
  1a:	ebb1 1f10 	cmp.w	r1, r0, lsr #4
  1e:	bf1c      	itt	ne
  20:	3a04      	subne	r2, #4
  22:	0900      	lsrne	r0, r0, #4
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:356
  24:	ebb1 0f90 	cmp.w	r1, r0, lsr #2
  28:	bf1c      	itt	ne
  2a:	3a02      	subne	r2, #2
  2c:	0880      	lsrne	r0, r0, #2
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:361
  2e:	4241      	negs	r1, r0
  30:	2801      	cmp	r0, #1
  32:	bf88      	it	hi
  34:	f06f 0101 	mvnhi.w	r1, #1
  38:	1888      	adds	r0, r1, r2
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
  3a:	4770      	bx	lr

Disassembly of section .text.__floatsisf:

00000000 <__floatsisf>:
__floatsisf():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:75
   0:	2800      	cmp	r0, #0
   2:	bf04      	itt	eq
   4:	2000      	moveq	r0, #0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:216
   6:	4770      	bxeq	lr
extract_sign():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:168
   8:	4603      	mov	r3, r0
   a:	bf48      	it	mi
   c:	4243      	negmi	r3, r0
leading_zeros():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2239
   e:	fab3 f183 	clz	r1, r3
__floatsisf():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:75
  12:	f1c1 0c1f 	rsb	ip, r1, #31
  16:	f1c1 0120 	rsb	r1, r1, #32
  1a:	2918      	cmp	r1, #24
  1c:	d913      	bls.n	46 <__floatsisf+0x46>
  1e:	2919      	cmp	r1, #25
  20:	d018      	beq.n	54 <__floatsisf+0x54>
  22:	291a      	cmp	r1, #26
  24:	d017      	beq.n	56 <__floatsisf+0x56>
  26:	f1c1 021a 	rsb	r2, r1, #26
wrapping_shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:3032
  2a:	f002 021f 	and.w	r2, r2, #31
  2e:	fa13 f202 	lsls.w	r2, r3, r2
__floatsisf():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:75
  32:	f101 0206 	add.w	r2, r1, #6
  36:	f002 021f 	and.w	r2, r2, #31
  3a:	fa23 f302 	lsr.w	r3, r3, r2
  3e:	bf18      	it	ne
  40:	f043 0301 	orrne.w	r3, r3, #1
  44:	e007      	b.n	56 <__floatsisf+0x56>
  46:	f1c1 0118 	rsb	r1, r1, #24
wrapping_shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:3032
  4a:	f001 011f 	and.w	r1, r1, #31
  4e:	408b      	lsls	r3, r1
__floatsisf():
  50:	4661      	mov	r1, ip
  52:	e00e      	b.n	72 <__floatsisf+0x72>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:75
  54:	005b      	lsls	r3, r3, #1
  56:	f3c3 0280 	ubfx	r2, r3, #2, #1
  5a:	431a      	orrs	r2, r3
  5c:	3201      	adds	r2, #1
  5e:	f012 6380 	ands.w	r3, r2, #67108864	; 0x4000000
  62:	f04f 0303 	mov.w	r3, #3
  66:	bf08      	it	eq
  68:	2302      	moveq	r3, #2
  6a:	bf08      	it	eq
  6c:	4661      	moveq	r1, ip
  6e:	fa22 f303 	lsr.w	r3, r2, r3
  72:	f04f 527e 	mov.w	r2, #1065353216	; 0x3f800000
from_parts():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mod.rs:122
  76:	eb02 51c1 	add.w	r1, r2, r1, lsl #23
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mod.rs:121
  7a:	f000 4000 	and.w	r0, r0, #2147483648	; 0x80000000
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mod.rs:123
  7e:	f36f 53df 	bfc	r3, #23, #9
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mod.rs:121
  82:	4418      	add	r0, r3
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mod.rs:122
  84:	f001 41ff 	and.w	r1, r1, #2139095040	; 0x7f800000
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mod.rs:121
  88:	4408      	add	r0, r1
__floatsisf():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:216
  8a:	4770      	bx	lr

Disassembly of section .text.__aeabi_i2f:

00000000 <__aeabi_i2f>:
__aeabi_i2f():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:75
   0:	2800      	cmp	r0, #0
   2:	bf04      	itt	eq
   4:	2000      	moveq	r0, #0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
   6:	4770      	bxeq	lr
extract_sign():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:168
   8:	4603      	mov	r3, r0
   a:	bf48      	it	mi
   c:	4243      	negmi	r3, r0
leading_zeros():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2239
   e:	fab3 f183 	clz	r1, r3
__aeabi_i2f():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:75
  12:	f1c1 0c1f 	rsb	ip, r1, #31
  16:	f1c1 0120 	rsb	r1, r1, #32
  1a:	2919      	cmp	r1, #25
  1c:	d312      	bcc.n	44 <__aeabi_i2f+0x44>
  1e:	d018      	beq.n	52 <__aeabi_i2f+0x52>
  20:	291a      	cmp	r1, #26
  22:	d017      	beq.n	54 <__aeabi_i2f+0x54>
  24:	f1c1 021a 	rsb	r2, r1, #26
wrapping_shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:3032
  28:	f002 021f 	and.w	r2, r2, #31
  2c:	fa13 f202 	lsls.w	r2, r3, r2
__aeabi_i2f():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:75
  30:	f101 0206 	add.w	r2, r1, #6
  34:	f002 021f 	and.w	r2, r2, #31
  38:	fa23 f302 	lsr.w	r3, r3, r2
  3c:	bf18      	it	ne
  3e:	f043 0301 	orrne.w	r3, r3, #1
  42:	e007      	b.n	54 <__aeabi_i2f+0x54>
  44:	f1c1 0118 	rsb	r1, r1, #24
wrapping_shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:3032
  48:	f001 011f 	and.w	r1, r1, #31
  4c:	408b      	lsls	r3, r1
__aeabi_i2f():
  4e:	4661      	mov	r1, ip
  50:	e00e      	b.n	70 <__aeabi_i2f+0x70>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:75
  52:	005b      	lsls	r3, r3, #1
  54:	f3c3 0280 	ubfx	r2, r3, #2, #1
  58:	431a      	orrs	r2, r3
  5a:	3201      	adds	r2, #1
  5c:	f012 6380 	ands.w	r3, r2, #67108864	; 0x4000000
  60:	f04f 0303 	mov.w	r3, #3
  64:	bf08      	it	eq
  66:	2302      	moveq	r3, #2
  68:	bf08      	it	eq
  6a:	4661      	moveq	r1, ip
  6c:	fa22 f303 	lsr.w	r3, r2, r3
  70:	f04f 527e 	mov.w	r2, #1065353216	; 0x3f800000
from_parts():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mod.rs:122
  74:	eb02 51c1 	add.w	r1, r2, r1, lsl #23
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mod.rs:121
  78:	f000 4000 	and.w	r0, r0, #2147483648	; 0x80000000
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mod.rs:123
  7c:	f36f 53df 	bfc	r3, #23, #9
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mod.rs:121
  80:	4418      	add	r0, r3
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mod.rs:122
  82:	f001 41ff 	and.w	r1, r1, #2139095040	; 0x7f800000
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mod.rs:121
  86:	4408      	add	r0, r1
__aeabi_i2f():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
  88:	4770      	bx	lr

Disassembly of section .text.__floatsidf:

00000000 <__floatsidf>:
__floatsidf():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:80
   0:	2800      	cmp	r0, #0
   2:	bf02      	ittt	eq
   4:	2000      	moveq	r0, #0
   6:	2100      	moveq	r1, #0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:216
   8:	4770      	bxeq	lr
extract_sign():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:168
   a:	4602      	mov	r2, r0
   c:	bf48      	it	mi
   e:	4242      	negmi	r2, r0
  10:	b510      	push	{r4, lr}
leading_zeros():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2239
  12:	fab2 fe82 	clz	lr, r2
  16:	f240 441e 	movw	r4, #1054	; 0x41e
__floatsidf():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:80
  1a:	f10e 0315 	add.w	r3, lr, #21
  1e:	eba4 040e 	sub.w	r4, r4, lr
  22:	f003 033f 	and.w	r3, r3, #63	; 0x3f
from_parts():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mod.rs:121
  26:	f000 4000 	and.w	r0, r0, #2147483648	; 0x80000000
__floatsidf():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:80
  2a:	f1c3 0120 	rsb	r1, r3, #32
  2e:	f1a3 0c20 	sub.w	ip, r3, #32
  32:	f1bc 0f00 	cmp.w	ip, #0
from_parts():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mod.rs:121
  36:	ea40 5004 	orr.w	r0, r0, r4, lsl #20
__floatsidf():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:80
  3a:	fa22 f101 	lsr.w	r1, r2, r1
  3e:	bfa8      	it	ge
  40:	fa02 f10c 	lslge.w	r1, r2, ip
  44:	f1bc 0f00 	cmp.w	ip, #0
from_parts():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mod.rs:123
  48:	f36f 511f 	bfc	r1, #20, #12
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mod.rs:121
  4c:	4401      	add	r1, r0
__floatsidf():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:80
  4e:	fa02 f003 	lsl.w	r0, r2, r3
  52:	bfa8      	it	ge
  54:	2000      	movge	r0, #0
  56:	bd10      	pop	{r4, pc}

Disassembly of section .text.__aeabi_i2d:

00000000 <__aeabi_i2d>:
__aeabi_i2d():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:80
   0:	2800      	cmp	r0, #0
   2:	bf02      	ittt	eq
   4:	2000      	moveq	r0, #0
   6:	2100      	moveq	r1, #0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
   8:	4770      	bxeq	lr
extract_sign():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:168
   a:	4602      	mov	r2, r0
   c:	bf48      	it	mi
   e:	4242      	negmi	r2, r0
  10:	b510      	push	{r4, lr}
leading_zeros():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2239
  12:	fab2 fe82 	clz	lr, r2
  16:	f240 441e 	movw	r4, #1054	; 0x41e
__aeabi_i2d():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:80
  1a:	f10e 0315 	add.w	r3, lr, #21
  1e:	eba4 040e 	sub.w	r4, r4, lr
  22:	f003 033f 	and.w	r3, r3, #63	; 0x3f
from_parts():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mod.rs:121
  26:	f000 4000 	and.w	r0, r0, #2147483648	; 0x80000000
__aeabi_i2d():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:80
  2a:	f1c3 0120 	rsb	r1, r3, #32
  2e:	f1a3 0c20 	sub.w	ip, r3, #32
  32:	f1bc 0f00 	cmp.w	ip, #0
from_parts():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mod.rs:121
  36:	ea40 5004 	orr.w	r0, r0, r4, lsl #20
__aeabi_i2d():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:80
  3a:	fa22 f101 	lsr.w	r1, r2, r1
  3e:	bfa8      	it	ge
  40:	fa02 f10c 	lslge.w	r1, r2, ip
  44:	f1bc 0f00 	cmp.w	ip, #0
from_parts():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mod.rs:123
  48:	f36f 511f 	bfc	r1, #20, #12
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mod.rs:121
  4c:	4401      	add	r1, r0
__aeabi_i2d():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:80
  4e:	fa02 f003 	lsl.w	r0, r2, r3
  52:	bfa8      	it	ge
  54:	2000      	movge	r0, #0
  56:	bd10      	pop	{r4, pc}

Disassembly of section .text.__floatdisf:

00000000 <__floatdisf>:
__floatdisf():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:94
   0:	ea50 0201 	orrs.w	r2, r0, r1
   4:	bf04      	itt	eq
   6:	2000      	moveq	r0, #0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:216
   8:	4770      	bxeq	lr
   a:	e92d 43f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, lr}
extract_sign():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:168
   e:	eb10 70e1 	adds.w	r0, r0, r1, asr #31
  12:	ea80 7ee1 	eor.w	lr, r0, r1, asr #31
  16:	eb41 72e1 	adc.w	r2, r1, r1, asr #31
leading_zeros():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2239
  1a:	fabe f08e 	clz	r0, lr
extract_sign():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:168
  1e:	ea82 73e1 	eor.w	r3, r2, r1, asr #31
leading_zeros():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2239
  22:	3020      	adds	r0, #32
  24:	2b00      	cmp	r3, #0
  26:	bf18      	it	ne
  28:	fab3 f083 	clzne	r0, r3
__floatdisf():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:94
  2c:	f1c0 0c3f 	rsb	ip, r0, #63	; 0x3f
  30:	f1c0 0040 	rsb	r0, r0, #64	; 0x40
  34:	2818      	cmp	r0, #24
  36:	d937      	bls.n	a8 <__floatdisf+0xa8>
  38:	2819      	cmp	r0, #25
  3a:	d042      	beq.n	c2 <__floatdisf+0xc2>
  3c:	281a      	cmp	r0, #26
  3e:	d045      	beq.n	cc <__floatdisf+0xcc>
  40:	f100 0226 	add.w	r2, r0, #38	; 0x26
  44:	f1c0 061a 	rsb	r6, r0, #26
  48:	f002 023f 	and.w	r2, r2, #63	; 0x3f
wrapping_shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:3032
  4c:	f006 063f 	and.w	r6, r6, #63	; 0x3f
__floatdisf():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:94
  50:	f1c2 0520 	rsb	r5, r2, #32
wrapping_shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:3032
  54:	f1c6 0720 	rsb	r7, r6, #32
__floatdisf():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:94
  58:	f1a2 0920 	sub.w	r9, r2, #32
  5c:	fa2e f402 	lsr.w	r4, lr, r2
  60:	fa03 f505 	lsl.w	r5, r3, r5
wrapping_shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:3032
  64:	fa2e f707 	lsr.w	r7, lr, r7
__floatdisf():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:94
  68:	432c      	orrs	r4, r5
  6a:	f1b9 0f00 	cmp.w	r9, #0
wrapping_shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:3032
  6e:	fa03 f806 	lsl.w	r8, r3, r6
  72:	f1a6 0520 	sub.w	r5, r6, #32
  76:	ea47 0708 	orr.w	r7, r7, r8
__floatdisf():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:94
  7a:	bfa8      	it	ge
  7c:	fa23 f409 	lsrge.w	r4, r3, r9
wrapping_shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:3032
  80:	2d00      	cmp	r5, #0
  82:	bfa8      	it	ge
  84:	fa0e f705 	lslge.w	r7, lr, r5
  88:	fa0e f606 	lsl.w	r6, lr, r6
__floatdisf():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:94
  8c:	fa23 f302 	lsr.w	r3, r3, r2
wrapping_shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:3032
  90:	bfa8      	it	ge
  92:	2600      	movge	r6, #0
__floatdisf():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:94
  94:	4337      	orrs	r7, r6
  96:	bf18      	it	ne
  98:	2701      	movne	r7, #1
  9a:	f1b9 0f00 	cmp.w	r9, #0
  9e:	ea44 0e07 	orr.w	lr, r4, r7
  a2:	bfa8      	it	ge
  a4:	2300      	movge	r3, #0
  a6:	e011      	b.n	cc <__floatdisf+0xcc>
  a8:	f1c0 0018 	rsb	r0, r0, #24
wrapping_shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:3032
  ac:	f000 003f 	and.w	r0, r0, #63	; 0x3f
  b0:	f1a0 0320 	sub.w	r3, r0, #32
  b4:	fa0e f200 	lsl.w	r2, lr, r0
  b8:	2b00      	cmp	r3, #0
  ba:	bfa8      	it	ge
  bc:	2200      	movge	r2, #0
__floatdisf():
  be:	4660      	mov	r0, ip
  c0:	e019      	b.n	f6 <__floatdisf+0xf6>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:94
  c2:	005b      	lsls	r3, r3, #1
  c4:	ea43 73de 	orr.w	r3, r3, lr, lsr #31
  c8:	ea4f 0e4e 	mov.w	lr, lr, lsl #1
  cc:	f3ce 0280 	ubfx	r2, lr, #2, #1
  d0:	2603      	movs	r6, #3
  d2:	ea42 020e 	orr.w	r2, r2, lr
  d6:	3201      	adds	r2, #1
  d8:	f143 0300 	adc.w	r3, r3, #0
  dc:	f012 6780 	ands.w	r7, r2, #67108864	; 0x4000000
  e0:	bf08      	it	eq
  e2:	2602      	moveq	r6, #2
  e4:	40f2      	lsrs	r2, r6
  e6:	f086 061f 	eor.w	r6, r6, #31
  ea:	005b      	lsls	r3, r3, #1
  ec:	2f00      	cmp	r7, #0
  ee:	bf08      	it	eq
  f0:	4660      	moveq	r0, ip
  f2:	40b3      	lsls	r3, r6
  f4:	431a      	orrs	r2, r3
from_parts():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mod.rs:123
  f6:	f36f 52df 	bfc	r2, #23, #9
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mod.rs:121
  fa:	f001 4100 	and.w	r1, r1, #2147483648	; 0x80000000
  fe:	4411      	add	r1, r2
 100:	f04f 527e 	mov.w	r2, #1065353216	; 0x3f800000
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mod.rs:122
 104:	eb02 50c0 	add.w	r0, r2, r0, lsl #23
 108:	f000 40ff 	and.w	r0, r0, #2139095040	; 0x7f800000
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mod.rs:121
 10c:	4408      	add	r0, r1
__floatdisf():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:91
 10e:	e8bd 83f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, pc}

Disassembly of section .text.__aeabi_l2f:

00000000 <__aeabi_l2f>:
__aeabi_l2f():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:94
   0:	ea50 0201 	orrs.w	r2, r0, r1
   4:	bf04      	itt	eq
   6:	2000      	moveq	r0, #0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
   8:	4770      	bxeq	lr
   a:	e92d 43f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, lr}
extract_sign():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:168
   e:	eb10 70e1 	adds.w	r0, r0, r1, asr #31
  12:	eb41 72e1 	adc.w	r2, r1, r1, asr #31
  16:	ea82 73e1 	eor.w	r3, r2, r1, asr #31
  1a:	ea80 72e1 	eor.w	r2, r0, r1, asr #31
leading_zeros():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2239
  1e:	fab2 f082 	clz	r0, r2
  22:	2b00      	cmp	r3, #0
  24:	f100 0020 	add.w	r0, r0, #32
  28:	bf18      	it	ne
  2a:	fab3 f083 	clzne	r0, r3
__aeabi_l2f():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:94
  2e:	f1c0 0e40 	rsb	lr, r0, #64	; 0x40
  32:	f1c0 0c3f 	rsb	ip, r0, #63	; 0x3f
  36:	f1be 0f19 	cmp.w	lr, #25
  3a:	d337      	bcc.n	ac <__aeabi_l2f+0xac>
  3c:	d042      	beq.n	c4 <__aeabi_l2f+0xc4>
  3e:	f1be 0f1a 	cmp.w	lr, #26
  42:	d043      	beq.n	cc <__aeabi_l2f+0xcc>
  44:	f10e 0026 	add.w	r0, lr, #38	; 0x26
  48:	f1ce 061a 	rsb	r6, lr, #26
  4c:	f000 003f 	and.w	r0, r0, #63	; 0x3f
wrapping_shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:3032
  50:	f006 063f 	and.w	r6, r6, #63	; 0x3f
__aeabi_l2f():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:94
  54:	f1c0 0520 	rsb	r5, r0, #32
wrapping_shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:3032
  58:	f1c6 0720 	rsb	r7, r6, #32
__aeabi_l2f():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:94
  5c:	f1a0 0920 	sub.w	r9, r0, #32
  60:	fa22 f400 	lsr.w	r4, r2, r0
  64:	fa03 f505 	lsl.w	r5, r3, r5
wrapping_shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:3032
  68:	fa22 f707 	lsr.w	r7, r2, r7
__aeabi_l2f():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:94
  6c:	432c      	orrs	r4, r5
  6e:	f1b9 0f00 	cmp.w	r9, #0
wrapping_shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:3032
  72:	fa03 f806 	lsl.w	r8, r3, r6
  76:	ea47 0708 	orr.w	r7, r7, r8
  7a:	f1a6 0520 	sub.w	r5, r6, #32
__aeabi_l2f():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:94
  7e:	bfa8      	it	ge
  80:	fa23 f409 	lsrge.w	r4, r3, r9
wrapping_shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:3032
  84:	2d00      	cmp	r5, #0
  86:	bfa8      	it	ge
  88:	fa02 f705 	lslge.w	r7, r2, r5
  8c:	fa02 f206 	lsl.w	r2, r2, r6
__aeabi_l2f():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:94
  90:	fa23 f300 	lsr.w	r3, r3, r0
wrapping_shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:3032
  94:	bfa8      	it	ge
  96:	2200      	movge	r2, #0
__aeabi_l2f():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:94
  98:	433a      	orrs	r2, r7
  9a:	bf18      	it	ne
  9c:	2201      	movne	r2, #1
  9e:	f1b9 0f00 	cmp.w	r9, #0
  a2:	ea42 0204 	orr.w	r2, r2, r4
  a6:	bfa8      	it	ge
  a8:	2300      	movge	r3, #0
  aa:	e00f      	b.n	cc <__aeabi_l2f+0xcc>
  ac:	f1ce 0018 	rsb	r0, lr, #24
  b0:	46e6      	mov	lr, ip
wrapping_shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:3032
  b2:	f000 003f 	and.w	r0, r0, #63	; 0x3f
  b6:	f1a0 0320 	sub.w	r3, r0, #32
  ba:	4082      	lsls	r2, r0
  bc:	2b00      	cmp	r3, #0
  be:	bfa8      	it	ge
  c0:	2200      	movge	r2, #0
  c2:	e017      	b.n	f4 <__aeabi_l2f+0xf4>
__aeabi_l2f():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:94
  c4:	005b      	lsls	r3, r3, #1
  c6:	ea43 73d2 	orr.w	r3, r3, r2, lsr #31
  ca:	0052      	lsls	r2, r2, #1
  cc:	f3c2 0080 	ubfx	r0, r2, #2, #1
  d0:	2403      	movs	r4, #3
  d2:	4310      	orrs	r0, r2
  d4:	3001      	adds	r0, #1
  d6:	f143 0200 	adc.w	r2, r3, #0
  da:	f010 6380 	ands.w	r3, r0, #67108864	; 0x4000000
  de:	bf08      	it	eq
  e0:	2402      	moveq	r4, #2
  e2:	40e0      	lsrs	r0, r4
  e4:	f084 041f 	eor.w	r4, r4, #31
  e8:	0052      	lsls	r2, r2, #1
  ea:	2b00      	cmp	r3, #0
  ec:	bf08      	it	eq
  ee:	46e6      	moveq	lr, ip
  f0:	40a2      	lsls	r2, r4
  f2:	4302      	orrs	r2, r0
from_parts():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mod.rs:121
  f4:	f001 4000 	and.w	r0, r1, #2147483648	; 0x80000000
  f8:	f04f 517e 	mov.w	r1, #1065353216	; 0x3f800000
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mod.rs:122
  fc:	eb01 51ce 	add.w	r1, r1, lr, lsl #23
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mod.rs:123
 100:	f36f 52df 	bfc	r2, #23, #9
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mod.rs:121
 104:	4410      	add	r0, r2
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mod.rs:122
 106:	f001 41ff 	and.w	r1, r1, #2139095040	; 0x7f800000
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mod.rs:121
 10a:	4408      	add	r0, r1
 10c:	e8bd 83f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, pc}

Disassembly of section .text.__floatdidf:

00000000 <__floatdidf>:
__floatdidf():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:106
   0:	ea50 0201 	orrs.w	r2, r0, r1
   4:	bf02      	ittt	eq
   6:	2000      	moveq	r0, #0
   8:	2100      	moveq	r1, #0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:216
   a:	4770      	bxeq	lr
   c:	e92d 43f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, lr}
extract_sign():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:168
  10:	eb10 72e1 	adds.w	r2, r0, r1, asr #31
  14:	ea82 72e1 	eor.w	r2, r2, r1, asr #31
  18:	eb41 70e1 	adc.w	r0, r1, r1, asr #31
leading_zeros():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2239
  1c:	fab2 f382 	clz	r3, r2
extract_sign():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:168
  20:	ea80 74e1 	eor.w	r4, r0, r1, asr #31
leading_zeros():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2239
  24:	3320      	adds	r3, #32
  26:	2c00      	cmp	r4, #0
  28:	bf18      	it	ne
  2a:	fab4 f384 	clzne	r3, r4
__floatdidf():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:106
  2e:	f1c3 0e40 	rsb	lr, r3, #64	; 0x40
  32:	f1c3 0c3f 	rsb	ip, r3, #63	; 0x3f
  36:	f1be 0f35 	cmp.w	lr, #53	; 0x35
  3a:	d939      	bls.n	b0 <__floatdidf+0xb0>
  3c:	f1be 0f36 	cmp.w	lr, #54	; 0x36
  40:	d04d      	beq.n	de <__floatdidf+0xde>
  42:	f1be 0f37 	cmp.w	lr, #55	; 0x37
  46:	d04e      	beq.n	e6 <__floatdidf+0xe6>
  48:	f10e 0009 	add.w	r0, lr, #9
  4c:	f1ce 0637 	rsb	r6, lr, #55	; 0x37
  50:	f000 003f 	and.w	r0, r0, #63	; 0x3f
wrapping_shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:3032
  54:	f006 063f 	and.w	r6, r6, #63	; 0x3f
__floatdidf():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:106
  58:	f1c0 0520 	rsb	r5, r0, #32
wrapping_shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:3032
  5c:	f1c6 0720 	rsb	r7, r6, #32
__floatdidf():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:106
  60:	f1a0 0920 	sub.w	r9, r0, #32
  64:	fa22 f300 	lsr.w	r3, r2, r0
  68:	fa04 f505 	lsl.w	r5, r4, r5
wrapping_shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:3032
  6c:	fa22 f707 	lsr.w	r7, r2, r7
__floatdidf():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:106
  70:	432b      	orrs	r3, r5
  72:	f1b9 0f00 	cmp.w	r9, #0
wrapping_shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:3032
  76:	fa04 f806 	lsl.w	r8, r4, r6
  7a:	ea47 0708 	orr.w	r7, r7, r8
  7e:	f1a6 0520 	sub.w	r5, r6, #32
__floatdidf():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:106
  82:	bfa8      	it	ge
  84:	fa24 f309 	lsrge.w	r3, r4, r9
wrapping_shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:3032
  88:	2d00      	cmp	r5, #0
  8a:	bfa8      	it	ge
  8c:	fa02 f705 	lslge.w	r7, r2, r5
  90:	fa02 f206 	lsl.w	r2, r2, r6
__floatdidf():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:106
  94:	fa24 f400 	lsr.w	r4, r4, r0
wrapping_shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:3032
  98:	bfa8      	it	ge
  9a:	2200      	movge	r2, #0
__floatdidf():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:106
  9c:	433a      	orrs	r2, r7
  9e:	bf18      	it	ne
  a0:	2201      	movne	r2, #1
  a2:	f1b9 0f00 	cmp.w	r9, #0
  a6:	ea42 0203 	orr.w	r2, r2, r3
  aa:	bfa8      	it	ge
  ac:	2400      	movge	r4, #0
  ae:	e01a      	b.n	e6 <__floatdidf+0xe6>
  b0:	f1ce 0335 	rsb	r3, lr, #53	; 0x35
  b4:	46e6      	mov	lr, ip
wrapping_shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:3032
  b6:	f003 003f 	and.w	r0, r3, #63	; 0x3f
  ba:	fa04 f300 	lsl.w	r3, r4, r0
  be:	f1c0 0420 	rsb	r4, r0, #32
  c2:	fa22 f404 	lsr.w	r4, r2, r4
  c6:	4323      	orrs	r3, r4
  c8:	f1a0 0420 	sub.w	r4, r0, #32
  cc:	fa02 f000 	lsl.w	r0, r2, r0
  d0:	2c00      	cmp	r4, #0
  d2:	bfa8      	it	ge
  d4:	fa02 f304 	lslge.w	r3, r2, r4
  d8:	bfa8      	it	ge
  da:	2000      	movge	r0, #0
  dc:	e019      	b.n	112 <__floatdidf+0x112>
__floatdidf():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:106
  de:	0060      	lsls	r0, r4, #1
  e0:	ea40 74d2 	orr.w	r4, r0, r2, lsr #31
  e4:	0052      	lsls	r2, r2, #1
  e6:	f3c2 0080 	ubfx	r0, r2, #2, #1
  ea:	2303      	movs	r3, #3
  ec:	4310      	orrs	r0, r2
  ee:	3001      	adds	r0, #1
  f0:	f144 0200 	adc.w	r2, r4, #0
  f4:	f412 0400 	ands.w	r4, r2, #8388608	; 0x800000
  f8:	bf08      	it	eq
  fa:	2302      	moveq	r3, #2
  fc:	f083 061f 	eor.w	r6, r3, #31
 100:	0055      	lsls	r5, r2, #1
 102:	40d8      	lsrs	r0, r3
 104:	fa22 f303 	lsr.w	r3, r2, r3
 108:	40b5      	lsls	r5, r6
 10a:	4328      	orrs	r0, r5
 10c:	2c00      	cmp	r4, #0
 10e:	bf08      	it	eq
 110:	46e6      	moveq	lr, ip
 112:	f20e 32ff 	addw	r2, lr, #1023	; 0x3ff
 116:	2700      	movs	r7, #0
from_parts():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mod.rs:121
 118:	f001 4100 	and.w	r1, r1, #2147483648	; 0x80000000
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mod.rs:123
 11c:	f36f 531f 	bfc	r3, #20, #12
 120:	f6c7 77f0 	movt	r7, #32752	; 0x7ff0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mod.rs:122
 124:	ea07 5202 	and.w	r2, r7, r2, lsl #20
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mod.rs:121
 128:	4419      	add	r1, r3
 12a:	4411      	add	r1, r2
__floatdidf():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:103
 12c:	e8bd 83f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, pc}

Disassembly of section .text.__aeabi_l2d:

00000000 <__aeabi_l2d>:
__aeabi_l2d():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:106
   0:	ea50 0201 	orrs.w	r2, r0, r1
   4:	bf02      	ittt	eq
   6:	2000      	moveq	r0, #0
   8:	2100      	moveq	r1, #0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
   a:	4770      	bxeq	lr
   c:	e92d 43f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, lr}
extract_sign():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:168
  10:	eb10 70e1 	adds.w	r0, r0, r1, asr #31
  14:	ea80 70e1 	eor.w	r0, r0, r1, asr #31
  18:	eb41 72e1 	adc.w	r2, r1, r1, asr #31
leading_zeros():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2239
  1c:	fab0 f380 	clz	r3, r0
extract_sign():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:168
  20:	ea82 72e1 	eor.w	r2, r2, r1, asr #31
leading_zeros():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2239
  24:	3320      	adds	r3, #32
  26:	2a00      	cmp	r2, #0
  28:	bf18      	it	ne
  2a:	fab2 f382 	clzne	r3, r2
__aeabi_l2d():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:106
  2e:	f1c3 0e40 	rsb	lr, r3, #64	; 0x40
  32:	f1c3 0c3f 	rsb	ip, r3, #63	; 0x3f
  36:	f1be 0f36 	cmp.w	lr, #54	; 0x36
  3a:	d337      	bcc.n	ac <__aeabi_l2d+0xac>
  3c:	d04f      	beq.n	de <__aeabi_l2d+0xde>
  3e:	f1be 0f37 	cmp.w	lr, #55	; 0x37
  42:	d050      	beq.n	e6 <__aeabi_l2d+0xe6>
  44:	f10e 0309 	add.w	r3, lr, #9
  48:	f1ce 0637 	rsb	r6, lr, #55	; 0x37
  4c:	f003 033f 	and.w	r3, r3, #63	; 0x3f
wrapping_shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:3032
  50:	f006 063f 	and.w	r6, r6, #63	; 0x3f
__aeabi_l2d():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:106
  54:	f1c3 0520 	rsb	r5, r3, #32
wrapping_shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:3032
  58:	f1c6 0720 	rsb	r7, r6, #32
__aeabi_l2d():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:106
  5c:	f1a3 0920 	sub.w	r9, r3, #32
  60:	fa20 f403 	lsr.w	r4, r0, r3
  64:	fa02 f505 	lsl.w	r5, r2, r5
wrapping_shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:3032
  68:	fa20 f707 	lsr.w	r7, r0, r7
__aeabi_l2d():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:106
  6c:	432c      	orrs	r4, r5
  6e:	f1b9 0f00 	cmp.w	r9, #0
wrapping_shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:3032
  72:	fa02 f806 	lsl.w	r8, r2, r6
  76:	ea47 0708 	orr.w	r7, r7, r8
  7a:	f1a6 0520 	sub.w	r5, r6, #32
__aeabi_l2d():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:106
  7e:	bfa8      	it	ge
  80:	fa22 f409 	lsrge.w	r4, r2, r9
wrapping_shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:3032
  84:	2d00      	cmp	r5, #0
  86:	bfa8      	it	ge
  88:	fa00 f705 	lslge.w	r7, r0, r5
  8c:	fa00 f006 	lsl.w	r0, r0, r6
__aeabi_l2d():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:106
  90:	fa22 f203 	lsr.w	r2, r2, r3
wrapping_shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:3032
  94:	bfa8      	it	ge
  96:	2000      	movge	r0, #0
__aeabi_l2d():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:106
  98:	4338      	orrs	r0, r7
  9a:	bf18      	it	ne
  9c:	2001      	movne	r0, #1
  9e:	f1b9 0f00 	cmp.w	r9, #0
  a2:	ea40 0004 	orr.w	r0, r0, r4
  a6:	bfa8      	it	ge
  a8:	2200      	movge	r2, #0
  aa:	e01c      	b.n	e6 <__aeabi_l2d+0xe6>
  ac:	f1ce 0335 	rsb	r3, lr, #53	; 0x35
wrapping_shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:3032
  b0:	f003 033f 	and.w	r3, r3, #63	; 0x3f
  b4:	fa02 fe03 	lsl.w	lr, r2, r3
  b8:	f1c3 0220 	rsb	r2, r3, #32
  bc:	fa20 f202 	lsr.w	r2, r0, r2
  c0:	ea42 020e 	orr.w	r2, r2, lr
  c4:	f1a3 0e20 	sub.w	lr, r3, #32
  c8:	f1be 0f00 	cmp.w	lr, #0
  cc:	bfa8      	it	ge
  ce:	fa00 f20e 	lslge.w	r2, r0, lr
  d2:	fa00 f003 	lsl.w	r0, r0, r3
__aeabi_l2d():
  d6:	46e6      	mov	lr, ip
wrapping_shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:3032
  d8:	bfa8      	it	ge
  da:	2000      	movge	r0, #0
  dc:	e018      	b.n	110 <__aeabi_l2d+0x110>
__aeabi_l2d():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:106
  de:	0052      	lsls	r2, r2, #1
  e0:	ea42 72d0 	orr.w	r2, r2, r0, lsr #31
  e4:	0040      	lsls	r0, r0, #1
  e6:	f3c0 0380 	ubfx	r3, r0, #2, #1
  ea:	2403      	movs	r4, #3
  ec:	4318      	orrs	r0, r3
  ee:	3001      	adds	r0, #1
  f0:	f142 0200 	adc.w	r2, r2, #0
  f4:	f412 0300 	ands.w	r3, r2, #8388608	; 0x800000
  f8:	bf08      	it	eq
  fa:	2402      	moveq	r4, #2
  fc:	f084 061f 	eor.w	r6, r4, #31
 100:	0055      	lsls	r5, r2, #1
 102:	40e0      	lsrs	r0, r4
 104:	40e2      	lsrs	r2, r4
 106:	40b5      	lsls	r5, r6
 108:	4328      	orrs	r0, r5
 10a:	2b00      	cmp	r3, #0
 10c:	bf08      	it	eq
 10e:	46e6      	moveq	lr, ip
 110:	f20e 33ff 	addw	r3, lr, #1023	; 0x3ff
 114:	2700      	movs	r7, #0
from_parts():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mod.rs:121
 116:	f001 4100 	and.w	r1, r1, #2147483648	; 0x80000000
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mod.rs:123
 11a:	f36f 521f 	bfc	r2, #20, #12
 11e:	f6c7 77f0 	movt	r7, #32752	; 0x7ff0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mod.rs:122
 122:	ea07 5303 	and.w	r3, r7, r3, lsl #20
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mod.rs:121
 126:	4411      	add	r1, r2
 128:	4419      	add	r1, r3
 12a:	e8bd 83f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, pc}

Disassembly of section .text.__floattisf:

00000000 <__floattisf>:
__floattisf():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:254
   0:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
   4:	b083      	sub	sp, #12
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:112
   6:	ea41 0703 	orr.w	r7, r1, r3
   a:	ea40 0602 	orr.w	r6, r0, r2
   e:	4337      	orrs	r7, r6
  10:	f000 8103 	beq.w	21a <__floattisf+0x21a>
extract_sign():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:168
  14:	eb10 70e3 	adds.w	r0, r0, r3, asr #31
  18:	eb51 77e3 	adcs.w	r7, r1, r3, asr #31
  1c:	eb52 72e3 	adcs.w	r2, r2, r3, asr #31
  20:	ea87 7ee3 	eor.w	lr, r7, r3, asr #31
  24:	ea82 74e3 	eor.w	r4, r2, r3, asr #31
  28:	eb43 71e3 	adc.w	r1, r3, r3, asr #31
leading_zeros():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2239
  2c:	fab4 f284 	clz	r2, r4
extract_sign():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:168
  30:	ea81 71e3 	eor.w	r1, r1, r3, asr #31
leading_zeros():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2239
  34:	f102 0520 	add.w	r5, r2, #32
extract_sign():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:168
  38:	ea80 72e3 	eor.w	r2, r0, r3, asr #31
leading_zeros():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2239
  3c:	fab2 f082 	clz	r0, r2
  40:	2900      	cmp	r1, #0
  42:	f100 0020 	add.w	r0, r0, #32
  46:	bf18      	it	ne
  48:	fab1 f581 	clzne	r5, r1
  4c:	f1be 0f00 	cmp.w	lr, #0
  50:	bf18      	it	ne
  52:	fabe f08e 	clzne	r0, lr
  56:	ea54 0701 	orrs.w	r7, r4, r1
  5a:	bf08      	it	eq
  5c:	f100 0540 	addeq.w	r5, r0, #64	; 0x40
__floattisf():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:112
  60:	f1c5 0080 	rsb	r0, r5, #128	; 0x80
  64:	f1c5 0c7f 	rsb	ip, r5, #127	; 0x7f
  68:	2818      	cmp	r0, #24
  6a:	f240 80da 	bls.w	222 <__floattisf+0x222>
  6e:	2819      	cmp	r0, #25
  70:	f000 80e7 	beq.w	242 <__floattisf+0x242>
  74:	281a      	cmp	r0, #26
  76:	f000 80e9 	beq.w	24c <__floattisf+0x24c>
  7a:	f1c0 051a 	rsb	r5, r0, #26
wrapping_shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:3032
  7e:	f005 057f 	and.w	r5, r5, #127	; 0x7f
  82:	f1c5 0760 	rsb	r7, r5, #96	; 0x60
  86:	f1a5 0640 	sub.w	r6, r5, #64	; 0x40
  8a:	f1c5 0b20 	rsb	fp, r5, #32
  8e:	9601      	str	r6, [sp, #4]
  90:	fa0e f606 	lsl.w	r6, lr, r6
  94:	fa22 f707 	lsr.w	r7, r2, r7
  98:	433e      	orrs	r6, r7
  9a:	f1a5 0960 	sub.w	r9, r5, #96	; 0x60
  9e:	fa01 fa05 	lsl.w	sl, r1, r5
  a2:	fa24 f70b 	lsr.w	r7, r4, fp
  a6:	f1b9 0f00 	cmp.w	r9, #0
  aa:	ea47 070a 	orr.w	r7, r7, sl
  ae:	f1a5 0a20 	sub.w	sl, r5, #32
  b2:	bfa8      	it	ge
  b4:	fa02 f609 	lslge.w	r6, r2, r9
  b8:	f1ba 0f00 	cmp.w	sl, #0
  bc:	bfa8      	it	ge
  be:	fa04 f70a 	lslge.w	r7, r4, sl
  c2:	f8cd c008 	str.w	ip, [sp, #8]
  c6:	f1c5 0c40 	rsb	ip, r5, #64	; 0x40
  ca:	f1bb 0f00 	cmp.w	fp, #0
  ce:	fa2e f80c 	lsr.w	r8, lr, ip
  d2:	bfa8      	it	ge
  d4:	f04f 0800 	movge.w	r8, #0
  d8:	2d40      	cmp	r5, #64	; 0x40
  da:	bf38      	it	cc
  dc:	ea47 0608 	orrcc.w	r6, r7, r8
  e0:	fa22 f70b 	lsr.w	r7, r2, fp
  e4:	2d00      	cmp	r5, #0
  e6:	fa0e f805 	lsl.w	r8, lr, r5
  ea:	ea47 0708 	orr.w	r7, r7, r8
  ee:	bf08      	it	eq
  f0:	460e      	moveq	r6, r1
  f2:	f1ba 0f00 	cmp.w	sl, #0
  f6:	bfa8      	it	ge
  f8:	fa02 f70a 	lslge.w	r7, r2, sl
__floattisf():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:112
  fc:	2d40      	cmp	r5, #64	; 0x40
  fe:	bf38      	it	cc
 100:	433e      	orrcc	r6, r7
wrapping_shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:3032
 102:	f1cc 0720 	rsb	r7, ip, #32
 106:	fa22 f80c 	lsr.w	r8, r2, ip
 10a:	f1bb 0f00 	cmp.w	fp, #0
 10e:	fa0e f707 	lsl.w	r7, lr, r7
 112:	ea48 0c07 	orr.w	ip, r8, r7
 116:	fa04 f805 	lsl.w	r8, r4, r5
 11a:	bfa8      	it	ge
 11c:	fa2e fc0b 	lsrge.w	ip, lr, fp
 120:	f1ba 0f00 	cmp.w	sl, #0
 124:	bfa8      	it	ge
 126:	f04f 0800 	movge.w	r8, #0
 12a:	9f01      	ldr	r7, [sp, #4]
 12c:	f1b9 0f00 	cmp.w	r9, #0
 130:	fa02 f707 	lsl.w	r7, r2, r7
 134:	bfa8      	it	ge
 136:	2700      	movge	r7, #0
 138:	2d40      	cmp	r5, #64	; 0x40
 13a:	bf38      	it	cc
 13c:	ea48 070c 	orrcc.w	r7, r8, ip
 140:	2d00      	cmp	r5, #0
 142:	bf08      	it	eq
 144:	4627      	moveq	r7, r4
 146:	fa02 fc05 	lsl.w	ip, r2, r5
 14a:	f1ba 0f00 	cmp.w	sl, #0
 14e:	bfa8      	it	ge
 150:	f04f 0c00 	movge.w	ip, #0
__floattisf():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:112
 154:	2d40      	cmp	r5, #64	; 0x40
 156:	bf38      	it	cc
 158:	ea47 070c 	orrcc.w	r7, r7, ip
 15c:	ea57 0906 	orrs.w	r9, r7, r6
 160:	f100 0766 	add.w	r7, r0, #102	; 0x66
 164:	f007 057f 	and.w	r5, r7, #127	; 0x7f
 168:	bf18      	it	ne
 16a:	f04f 0901 	movne.w	r9, #1
 16e:	f1a5 0640 	sub.w	r6, r5, #64	; 0x40
 172:	f1c5 0760 	rsb	r7, r5, #96	; 0x60
 176:	9601      	str	r6, [sp, #4]
 178:	f1c5 0b20 	rsb	fp, r5, #32
 17c:	fa24 f606 	lsr.w	r6, r4, r6
 180:	fa01 fc07 	lsl.w	ip, r1, r7
 184:	f1a5 0760 	sub.w	r7, r5, #96	; 0x60
 188:	ea46 060c 	orr.w	r6, r6, ip
 18c:	9700      	str	r7, [sp, #0]
 18e:	2f00      	cmp	r7, #0
 190:	bfa8      	it	ge
 192:	fa21 f607 	lsrge.w	r6, r1, r7
 196:	fa22 fa05 	lsr.w	sl, r2, r5
 19a:	fa0e f70b 	lsl.w	r7, lr, fp
 19e:	f1c5 0840 	rsb	r8, r5, #64	; 0x40
 1a2:	ea47 070a 	orr.w	r7, r7, sl
 1a6:	f1a5 0a20 	sub.w	sl, r5, #32
 1aa:	f1ba 0f00 	cmp.w	sl, #0
 1ae:	bfa8      	it	ge
 1b0:	fa2e f70a 	lsrge.w	r7, lr, sl
 1b4:	fa04 fc08 	lsl.w	ip, r4, r8
 1b8:	f1bb 0f00 	cmp.w	fp, #0
 1bc:	bfa8      	it	ge
 1be:	f04f 0c00 	movge.w	ip, #0
 1c2:	2d40      	cmp	r5, #64	; 0x40
 1c4:	bf38      	it	cc
 1c6:	ea47 060c 	orrcc.w	r6, r7, ip
 1ca:	f8dd c008 	ldr.w	ip, [sp, #8]
 1ce:	2d00      	cmp	r5, #0
 1d0:	bf08      	it	eq
 1d2:	4616      	moveq	r6, r2
 1d4:	ea46 0209 	orr.w	r2, r6, r9
 1d8:	f1c8 0620 	rsb	r6, r8, #32
 1dc:	fa01 f708 	lsl.w	r7, r1, r8
 1e0:	f1bb 0f00 	cmp.w	fp, #0
 1e4:	fa24 f606 	lsr.w	r6, r4, r6
 1e8:	ea47 0706 	orr.w	r7, r7, r6
 1ec:	fa2e f605 	lsr.w	r6, lr, r5
 1f0:	bfa8      	it	ge
 1f2:	fa04 f70b 	lslge.w	r7, r4, fp
 1f6:	f1ba 0f00 	cmp.w	sl, #0
 1fa:	bfa8      	it	ge
 1fc:	2600      	movge	r6, #0
 1fe:	9c01      	ldr	r4, [sp, #4]
 200:	40e1      	lsrs	r1, r4
 202:	9c00      	ldr	r4, [sp, #0]
 204:	2c00      	cmp	r4, #0
 206:	bfa8      	it	ge
 208:	2100      	movge	r1, #0
 20a:	2d40      	cmp	r5, #64	; 0x40
 20c:	bf38      	it	cc
 20e:	ea46 0107 	orrcc.w	r1, r6, r7
 212:	2d00      	cmp	r5, #0
 214:	bf18      	it	ne
 216:	468e      	movne	lr, r1
 218:	e018      	b.n	24c <__floattisf+0x24c>
 21a:	2000      	movs	r0, #0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
 21c:	b003      	add	sp, #12
 21e:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:112
 222:	f1c0 0018 	rsb	r0, r0, #24
wrapping_shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:3032
 226:	f000 007f 	and.w	r0, r0, #127	; 0x7f
 22a:	f1a0 0720 	sub.w	r7, r0, #32
 22e:	fa02 f100 	lsl.w	r1, r2, r0
 232:	2f00      	cmp	r7, #0
 234:	bfa8      	it	ge
 236:	2100      	movge	r1, #0
 238:	2840      	cmp	r0, #64	; 0x40
 23a:	bf28      	it	cs
 23c:	2100      	movcs	r1, #0
__floattisf():
 23e:	4660      	mov	r0, ip
 240:	e01a      	b.n	278 <__floattisf+0x278>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:112
 242:	ea4f 014e 	mov.w	r1, lr, lsl #1
 246:	ea41 7ed2 	orr.w	lr, r1, r2, lsr #31
 24a:	0052      	lsls	r2, r2, #1
 24c:	f3c2 0180 	ubfx	r1, r2, #2, #1
 250:	2603      	movs	r6, #3
 252:	4311      	orrs	r1, r2
 254:	3101      	adds	r1, #1
 256:	f15e 0200 	adcs.w	r2, lr, #0
 25a:	f011 6780 	ands.w	r7, r1, #67108864	; 0x4000000
 25e:	bf08      	it	eq
 260:	2602      	moveq	r6, #2
 262:	40f1      	lsrs	r1, r6
 264:	f086 061f 	eor.w	r6, r6, #31
 268:	0052      	lsls	r2, r2, #1
 26a:	2f00      	cmp	r7, #0
 26c:	fa02 f206 	lsl.w	r2, r2, r6
 270:	ea41 0102 	orr.w	r1, r1, r2
 274:	bf08      	it	eq
 276:	4660      	moveq	r0, ip
from_parts():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mod.rs:123
 278:	f36f 51df 	bfc	r1, #23, #9
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mod.rs:121
 27c:	f003 4200 	and.w	r2, r3, #2147483648	; 0x80000000
 280:	4411      	add	r1, r2
 282:	f04f 527e 	mov.w	r2, #1065353216	; 0x3f800000
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mod.rs:122
 286:	eb02 50c0 	add.w	r0, r2, r0, lsl #23
 28a:	f000 40ff 	and.w	r0, r0, #2139095040	; 0x7f800000
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mod.rs:121
 28e:	4408      	add	r0, r1
__floattisf():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
 290:	b003      	add	sp, #12
 292:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}

Disassembly of section .text.__floattidf:

00000000 <__floattidf>:
__floattidf():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:254
   0:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
   4:	b083      	sub	sp, #12
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:117
   6:	ea41 0703 	orr.w	r7, r1, r3
   a:	ea40 0602 	orr.w	r6, r0, r2
   e:	4337      	orrs	r7, r6
  10:	f000 8112 	beq.w	238 <__floattidf+0x238>
extract_sign():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:168
  14:	eb10 70e3 	adds.w	r0, r0, r3, asr #31
  18:	eb51 71e3 	adcs.w	r1, r1, r3, asr #31
  1c:	ea80 70e3 	eor.w	r0, r0, r3, asr #31
  20:	eb52 72e3 	adcs.w	r2, r2, r3, asr #31
leading_zeros():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2239
  24:	fab0 f680 	clz	r6, r0
extract_sign():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:168
  28:	eb43 77e3 	adc.w	r7, r3, r3, asr #31
  2c:	ea82 72e3 	eor.w	r2, r2, r3, asr #31
  30:	ea87 74e3 	eor.w	r4, r7, r3, asr #31
leading_zeros():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2239
  34:	fab2 f782 	clz	r7, r2
  38:	3720      	adds	r7, #32
  3a:	2c00      	cmp	r4, #0
extract_sign():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:168
  3c:	ea81 71e3 	eor.w	r1, r1, r3, asr #31
leading_zeros():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2239
  40:	bf18      	it	ne
  42:	fab4 f784 	clzne	r7, r4
  46:	3620      	adds	r6, #32
  48:	2900      	cmp	r1, #0
  4a:	bf18      	it	ne
  4c:	fab1 f681 	clzne	r6, r1
  50:	ea52 0504 	orrs.w	r5, r2, r4
  54:	bf08      	it	eq
  56:	f106 0740 	addeq.w	r7, r6, #64	; 0x40
__floattidf():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:117
  5a:	f1c7 0e80 	rsb	lr, r7, #128	; 0x80
  5e:	f1c7 087f 	rsb	r8, r7, #127	; 0x7f
  62:	f1be 0f35 	cmp.w	lr, #53	; 0x35
  66:	f240 80ec 	bls.w	242 <__floattidf+0x242>
  6a:	f1be 0f36 	cmp.w	lr, #54	; 0x36
  6e:	f000 8108 	beq.w	282 <__floattidf+0x282>
  72:	f1be 0f37 	cmp.w	lr, #55	; 0x37
  76:	f000 810c 	beq.w	292 <__floattidf+0x292>
  7a:	f1ce 0537 	rsb	r5, lr, #55	; 0x37
wrapping_shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:3032
  7e:	f005 057f 	and.w	r5, r5, #127	; 0x7f
  82:	f1a5 0740 	sub.w	r7, r5, #64	; 0x40
  86:	9701      	str	r7, [sp, #4]
  88:	f1c5 0b20 	rsb	fp, r5, #32
  8c:	f1a5 0960 	sub.w	r9, r5, #96	; 0x60
  90:	fa01 f607 	lsl.w	r6, r1, r7
  94:	f1c5 0760 	rsb	r7, r5, #96	; 0x60
  98:	fa04 fa05 	lsl.w	sl, r4, r5
  9c:	f1b9 0f00 	cmp.w	r9, #0
  a0:	fa20 f707 	lsr.w	r7, r0, r7
  a4:	ea46 0607 	orr.w	r6, r6, r7
  a8:	fa22 f70b 	lsr.w	r7, r2, fp
  ac:	f1c5 0c40 	rsb	ip, r5, #64	; 0x40
  b0:	ea47 070a 	orr.w	r7, r7, sl
  b4:	f1a5 0a20 	sub.w	sl, r5, #32
  b8:	bfa8      	it	ge
  ba:	fa00 f609 	lslge.w	r6, r0, r9
  be:	f1ba 0f00 	cmp.w	sl, #0
  c2:	bfa8      	it	ge
  c4:	fa02 f70a 	lslge.w	r7, r2, sl
  c8:	f8cd 8008 	str.w	r8, [sp, #8]
  cc:	fa21 f80c 	lsr.w	r8, r1, ip
  d0:	f1bb 0f00 	cmp.w	fp, #0
  d4:	bfa8      	it	ge
  d6:	f04f 0800 	movge.w	r8, #0
  da:	2d40      	cmp	r5, #64	; 0x40
  dc:	bf38      	it	cc
  de:	ea47 0608 	orrcc.w	r6, r7, r8
  e2:	fa20 f70b 	lsr.w	r7, r0, fp
  e6:	2d00      	cmp	r5, #0
  e8:	fa01 f805 	lsl.w	r8, r1, r5
  ec:	ea47 0708 	orr.w	r7, r7, r8
  f0:	bf08      	it	eq
  f2:	4626      	moveq	r6, r4
  f4:	f1ba 0f00 	cmp.w	sl, #0
  f8:	bfa8      	it	ge
  fa:	fa00 f70a 	lslge.w	r7, r0, sl
__floattidf():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:117
  fe:	2d40      	cmp	r5, #64	; 0x40
 100:	bf38      	it	cc
 102:	433e      	orrcc	r6, r7
wrapping_shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:3032
 104:	f1cc 0720 	rsb	r7, ip, #32
 108:	fa20 f80c 	lsr.w	r8, r0, ip
 10c:	f1bb 0f00 	cmp.w	fp, #0
 110:	fa01 f707 	lsl.w	r7, r1, r7
 114:	ea48 0c07 	orr.w	ip, r8, r7
 118:	fa02 f805 	lsl.w	r8, r2, r5
 11c:	bfa8      	it	ge
 11e:	fa21 fc0b 	lsrge.w	ip, r1, fp
 122:	f1ba 0f00 	cmp.w	sl, #0
 126:	bfa8      	it	ge
 128:	f04f 0800 	movge.w	r8, #0
 12c:	9f01      	ldr	r7, [sp, #4]
 12e:	f1b9 0f00 	cmp.w	r9, #0
 132:	fa00 f707 	lsl.w	r7, r0, r7
 136:	bfa8      	it	ge
 138:	2700      	movge	r7, #0
 13a:	2d40      	cmp	r5, #64	; 0x40
 13c:	bf38      	it	cc
 13e:	ea48 070c 	orrcc.w	r7, r8, ip
 142:	2d00      	cmp	r5, #0
 144:	bf08      	it	eq
 146:	4617      	moveq	r7, r2
 148:	fa00 fc05 	lsl.w	ip, r0, r5
 14c:	f1ba 0f00 	cmp.w	sl, #0
 150:	bfa8      	it	ge
 152:	f04f 0c00 	movge.w	ip, #0
__floattidf():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:117
 156:	2d40      	cmp	r5, #64	; 0x40
 158:	bf38      	it	cc
 15a:	ea47 070c 	orrcc.w	r7, r7, ip
 15e:	ea57 0a06 	orrs.w	sl, r7, r6
 162:	f10e 0749 	add.w	r7, lr, #73	; 0x49
 166:	f007 057f 	and.w	r5, r7, #127	; 0x7f
 16a:	bf18      	it	ne
 16c:	f04f 0a01 	movne.w	sl, #1
 170:	f1c5 0760 	rsb	r7, r5, #96	; 0x60
 174:	f1a5 0640 	sub.w	r6, r5, #64	; 0x40
 178:	f1c5 0b20 	rsb	fp, r5, #32
 17c:	9601      	str	r6, [sp, #4]
 17e:	fa04 fc07 	lsl.w	ip, r4, r7
 182:	fa22 f706 	lsr.w	r7, r2, r6
 186:	ea47 060c 	orr.w	r6, r7, ip
 18a:	f1a5 0760 	sub.w	r7, r5, #96	; 0x60
 18e:	9700      	str	r7, [sp, #0]
 190:	2f00      	cmp	r7, #0
 192:	bfa8      	it	ge
 194:	fa24 f607 	lsrge.w	r6, r4, r7
 198:	fa20 f805 	lsr.w	r8, r0, r5
 19c:	fa01 f70b 	lsl.w	r7, r1, fp
 1a0:	f1c5 0940 	rsb	r9, r5, #64	; 0x40
 1a4:	ea47 0708 	orr.w	r7, r7, r8
 1a8:	f1a5 0820 	sub.w	r8, r5, #32
 1ac:	f1b8 0f00 	cmp.w	r8, #0
 1b0:	bfa8      	it	ge
 1b2:	fa21 f708 	lsrge.w	r7, r1, r8
 1b6:	fa02 fc09 	lsl.w	ip, r2, r9
 1ba:	f1bb 0f00 	cmp.w	fp, #0
 1be:	bfa8      	it	ge
 1c0:	f04f 0c00 	movge.w	ip, #0
 1c4:	2d40      	cmp	r5, #64	; 0x40
 1c6:	bf38      	it	cc
 1c8:	ea47 060c 	orrcc.w	r6, r7, ip
 1cc:	2d00      	cmp	r5, #0
 1ce:	bf08      	it	eq
 1d0:	4606      	moveq	r6, r0
 1d2:	ea46 000a 	orr.w	r0, r6, sl
 1d6:	fa22 f705 	lsr.w	r7, r2, r5
 1da:	fa04 f60b 	lsl.w	r6, r4, fp
 1de:	433e      	orrs	r6, r7
 1e0:	f1c9 0720 	rsb	r7, r9, #32
 1e4:	f1b8 0f00 	cmp.w	r8, #0
 1e8:	fa04 fc09 	lsl.w	ip, r4, r9
 1ec:	bfa8      	it	ge
 1ee:	fa24 f608 	lsrge.w	r6, r4, r8
 1f2:	2d40      	cmp	r5, #64	; 0x40
 1f4:	fa22 f707 	lsr.w	r7, r2, r7
 1f8:	ea4c 0c07 	orr.w	ip, ip, r7
 1fc:	bf28      	it	cs
 1fe:	2600      	movcs	r6, #0
 200:	f1bb 0f00 	cmp.w	fp, #0
 204:	bfa8      	it	ge
 206:	fa02 fc0b 	lslge.w	ip, r2, fp
 20a:	fa21 f205 	lsr.w	r2, r1, r5
 20e:	f1b8 0f00 	cmp.w	r8, #0
 212:	f8dd 8008 	ldr.w	r8, [sp, #8]
 216:	bfa8      	it	ge
 218:	2200      	movge	r2, #0
 21a:	9f01      	ldr	r7, [sp, #4]
 21c:	40fc      	lsrs	r4, r7
 21e:	9f00      	ldr	r7, [sp, #0]
 220:	2f00      	cmp	r7, #0
 222:	bfa8      	it	ge
 224:	2400      	movge	r4, #0
 226:	2d40      	cmp	r5, #64	; 0x40
 228:	bf38      	it	cc
 22a:	ea42 040c 	orrcc.w	r4, r2, ip
 22e:	2d00      	cmp	r5, #0
 230:	bf18      	it	ne
 232:	4621      	movne	r1, r4
 234:	4632      	mov	r2, r6
 236:	e02c      	b.n	292 <__floattidf+0x292>
 238:	2000      	movs	r0, #0
 23a:	2100      	movs	r1, #0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
 23c:	b003      	add	sp, #12
 23e:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:117
 242:	f1ce 0235 	rsb	r2, lr, #53	; 0x35
 246:	46c6      	mov	lr, r8
wrapping_shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:3032
 248:	f002 027f 	and.w	r2, r2, #127	; 0x7f
 24c:	f1c2 0720 	rsb	r7, r2, #32
 250:	f1a2 0620 	sub.w	r6, r2, #32
 254:	4091      	lsls	r1, r2
 256:	2e00      	cmp	r6, #0
 258:	fa20 f707 	lsr.w	r7, r0, r7
 25c:	ea41 0107 	orr.w	r1, r1, r7
 260:	bfa8      	it	ge
 262:	fa00 f106 	lslge.w	r1, r0, r6
 266:	2a40      	cmp	r2, #64	; 0x40
 268:	fa00 f002 	lsl.w	r0, r0, r2
 26c:	f04f 0700 	mov.w	r7, #0
 270:	bf28      	it	cs
 272:	4639      	movcs	r1, r7
 274:	2e00      	cmp	r6, #0
 276:	bfa8      	it	ge
 278:	2000      	movge	r0, #0
 27a:	2a40      	cmp	r2, #64	; 0x40
 27c:	bf28      	it	cs
 27e:	4638      	movcs	r0, r7
 280:	e025      	b.n	2ce <__floattidf+0x2ce>
__floattidf():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:117
 282:	004c      	lsls	r4, r1, #1
 284:	0052      	lsls	r2, r2, #1
 286:	ea44 74d0 	orr.w	r4, r4, r0, lsr #31
 28a:	ea42 72d1 	orr.w	r2, r2, r1, lsr #31
 28e:	0040      	lsls	r0, r0, #1
 290:	4621      	mov	r1, r4
 292:	f3c0 0780 	ubfx	r7, r0, #2, #1
 296:	2603      	movs	r6, #3
 298:	4338      	orrs	r0, r7
 29a:	3001      	adds	r0, #1
 29c:	f151 0700 	adcs.w	r7, r1, #0
 2a0:	f152 0100 	adcs.w	r1, r2, #0
 2a4:	221d      	movs	r2, #29
 2a6:	f417 0c00 	ands.w	ip, r7, #8388608	; 0x800000
 2aa:	bf08      	it	eq
 2ac:	2602      	moveq	r6, #2
 2ae:	43b2      	bics	r2, r6
 2b0:	0049      	lsls	r1, r1, #1
 2b2:	f086 051f 	eor.w	r5, r6, #31
 2b6:	40f0      	lsrs	r0, r6
 2b8:	4091      	lsls	r1, r2
 2ba:	007a      	lsls	r2, r7, #1
 2bc:	fa27 f406 	lsr.w	r4, r7, r6
 2c0:	40aa      	lsls	r2, r5
 2c2:	4321      	orrs	r1, r4
 2c4:	4310      	orrs	r0, r2
 2c6:	f1bc 0f00 	cmp.w	ip, #0
 2ca:	bf08      	it	eq
 2cc:	46c6      	moveq	lr, r8
 2ce:	f20e 32ff 	addw	r2, lr, #1023	; 0x3ff
 2d2:	2700      	movs	r7, #0
from_parts():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mod.rs:123
 2d4:	f36f 511f 	bfc	r1, #20, #12
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mod.rs:121
 2d8:	f003 4300 	and.w	r3, r3, #2147483648	; 0x80000000
 2dc:	f6c7 77f0 	movt	r7, #32752	; 0x7ff0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mod.rs:122
 2e0:	ea07 5202 	and.w	r2, r7, r2, lsl #20
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mod.rs:121
 2e4:	4419      	add	r1, r3
 2e6:	4411      	add	r1, r2
__floattidf():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
 2e8:	b003      	add	sp, #12
 2ea:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}

Disassembly of section .text.__floatunsisf:

00000000 <__floatunsisf>:
__floatunsisf():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:122
   0:	2800      	cmp	r0, #0
   2:	bf04      	itt	eq
   4:	2000      	moveq	r0, #0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:216
   6:	4770      	bxeq	lr
leading_zeros():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2239
   8:	fab0 f180 	clz	r1, r0
__floatunsisf():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:122
   c:	f1c1 021f 	rsb	r2, r1, #31
  10:	f1c1 0120 	rsb	r1, r1, #32
  14:	2918      	cmp	r1, #24
  16:	d913      	bls.n	40 <__floatunsisf+0x40>
  18:	2919      	cmp	r1, #25
  1a:	d018      	beq.n	4e <__floatunsisf+0x4e>
  1c:	291a      	cmp	r1, #26
  1e:	d017      	beq.n	50 <__floatunsisf+0x50>
  20:	f1c1 031a 	rsb	r3, r1, #26
wrapping_shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:3032
  24:	f003 031f 	and.w	r3, r3, #31
  28:	fa10 f303 	lsls.w	r3, r0, r3
__floatunsisf():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:122
  2c:	f101 0306 	add.w	r3, r1, #6
  30:	f003 031f 	and.w	r3, r3, #31
  34:	fa20 f003 	lsr.w	r0, r0, r3
  38:	bf18      	it	ne
  3a:	f040 0001 	orrne.w	r0, r0, #1
  3e:	e007      	b.n	50 <__floatunsisf+0x50>
  40:	f1c1 0118 	rsb	r1, r1, #24
wrapping_shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:3032
  44:	f001 011f 	and.w	r1, r1, #31
  48:	4088      	lsls	r0, r1
__floatunsisf():
  4a:	4611      	mov	r1, r2
  4c:	e00e      	b.n	6c <__floatunsisf+0x6c>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:122
  4e:	0040      	lsls	r0, r0, #1
  50:	f3c0 0380 	ubfx	r3, r0, #2, #1
  54:	4318      	orrs	r0, r3
  56:	3001      	adds	r0, #1
  58:	f010 6380 	ands.w	r3, r0, #67108864	; 0x4000000
  5c:	f04f 0303 	mov.w	r3, #3
  60:	bf08      	it	eq
  62:	2302      	moveq	r3, #2
  64:	fa20 f003 	lsr.w	r0, r0, r3
  68:	bf08      	it	eq
  6a:	4611      	moveq	r1, r2
  6c:	f04f 527e 	mov.w	r2, #1065353216	; 0x3f800000
from_parts():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mod.rs:122
  70:	eb02 51c1 	add.w	r1, r2, r1, lsl #23
  74:	f001 41ff 	and.w	r1, r1, #2139095040	; 0x7f800000
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mod.rs:123
  78:	f36f 50df 	bfc	r0, #23, #9
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mod.rs:121
  7c:	4408      	add	r0, r1
__floatunsisf():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:216
  7e:	4770      	bx	lr

Disassembly of section .text.__aeabi_ui2f:

00000000 <__aeabi_ui2f>:
__aeabi_ui2f():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:122
   0:	2800      	cmp	r0, #0
   2:	bf04      	itt	eq
   4:	2000      	moveq	r0, #0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
   6:	4770      	bxeq	lr
leading_zeros():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2239
   8:	fab0 f180 	clz	r1, r0
__aeabi_ui2f():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:122
   c:	f1c1 021f 	rsb	r2, r1, #31
  10:	f1c1 0120 	rsb	r1, r1, #32
  14:	2919      	cmp	r1, #25
  16:	d312      	bcc.n	3e <__aeabi_ui2f+0x3e>
  18:	d018      	beq.n	4c <__aeabi_ui2f+0x4c>
  1a:	291a      	cmp	r1, #26
  1c:	d017      	beq.n	4e <__aeabi_ui2f+0x4e>
  1e:	f1c1 031a 	rsb	r3, r1, #26
wrapping_shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:3032
  22:	f003 031f 	and.w	r3, r3, #31
  26:	fa10 f303 	lsls.w	r3, r0, r3
__aeabi_ui2f():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:122
  2a:	f101 0306 	add.w	r3, r1, #6
  2e:	f003 031f 	and.w	r3, r3, #31
  32:	fa20 f003 	lsr.w	r0, r0, r3
  36:	bf18      	it	ne
  38:	f040 0001 	orrne.w	r0, r0, #1
  3c:	e007      	b.n	4e <__aeabi_ui2f+0x4e>
  3e:	f1c1 0118 	rsb	r1, r1, #24
wrapping_shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:3032
  42:	f001 011f 	and.w	r1, r1, #31
  46:	4088      	lsls	r0, r1
__aeabi_ui2f():
  48:	4611      	mov	r1, r2
  4a:	e00e      	b.n	6a <__aeabi_ui2f+0x6a>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:122
  4c:	0040      	lsls	r0, r0, #1
  4e:	f3c0 0380 	ubfx	r3, r0, #2, #1
  52:	4318      	orrs	r0, r3
  54:	3001      	adds	r0, #1
  56:	f010 6380 	ands.w	r3, r0, #67108864	; 0x4000000
  5a:	f04f 0303 	mov.w	r3, #3
  5e:	bf08      	it	eq
  60:	2302      	moveq	r3, #2
  62:	fa20 f003 	lsr.w	r0, r0, r3
  66:	bf08      	it	eq
  68:	4611      	moveq	r1, r2
  6a:	f04f 527e 	mov.w	r2, #1065353216	; 0x3f800000
from_parts():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mod.rs:122
  6e:	eb02 51c1 	add.w	r1, r2, r1, lsl #23
  72:	f001 41ff 	and.w	r1, r1, #2139095040	; 0x7f800000
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mod.rs:123
  76:	f36f 50df 	bfc	r0, #23, #9
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mod.rs:121
  7a:	4408      	add	r0, r1
__aeabi_ui2f():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
  7c:	4770      	bx	lr

Disassembly of section .text.__floatunsidf:

00000000 <__floatunsidf>:
__floatunsidf():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:127
   0:	2800      	cmp	r0, #0
   2:	bf02      	ittt	eq
   4:	2000      	moveq	r0, #0
   6:	2100      	moveq	r1, #0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:216
   8:	4770      	bxeq	lr
   a:	b580      	push	{r7, lr}
leading_zeros():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2239
   c:	fab0 fc80 	clz	ip, r0
__floatunsidf():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:127
  10:	f10c 0215 	add.w	r2, ip, #21
  14:	f002 0e3f 	and.w	lr, r2, #63	; 0x3f
  18:	f240 421e 	movw	r2, #1054	; 0x41e
  1c:	f1ce 0120 	rsb	r1, lr, #32
  20:	f1ae 0320 	sub.w	r3, lr, #32
  24:	2b00      	cmp	r3, #0
  26:	eba2 020c 	sub.w	r2, r2, ip
  2a:	fa20 f101 	lsr.w	r1, r0, r1
  2e:	bfa8      	it	ge
  30:	fa00 f103 	lslge.w	r1, r0, r3
  34:	fa00 f00e 	lsl.w	r0, r0, lr
from_parts():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mod.rs:123
  38:	f36f 511f 	bfc	r1, #20, #12
__floatunsidf():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:127
  3c:	2b00      	cmp	r3, #0
from_parts():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mod.rs:121
  3e:	ea41 5102 	orr.w	r1, r1, r2, lsl #20
__floatunsidf():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:127
  42:	bfa8      	it	ge
  44:	2000      	movge	r0, #0
  46:	bd80      	pop	{r7, pc}

Disassembly of section .text.__aeabi_ui2d:

00000000 <__aeabi_ui2d>:
__aeabi_ui2d():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:127
   0:	2800      	cmp	r0, #0
   2:	bf02      	ittt	eq
   4:	2000      	moveq	r0, #0
   6:	2100      	moveq	r1, #0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
   8:	4770      	bxeq	lr
   a:	b580      	push	{r7, lr}
leading_zeros():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2239
   c:	fab0 fc80 	clz	ip, r0
__aeabi_ui2d():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:127
  10:	f10c 0215 	add.w	r2, ip, #21
  14:	f002 0e3f 	and.w	lr, r2, #63	; 0x3f
  18:	f240 421e 	movw	r2, #1054	; 0x41e
  1c:	f1ce 0120 	rsb	r1, lr, #32
  20:	f1ae 0320 	sub.w	r3, lr, #32
  24:	2b00      	cmp	r3, #0
  26:	eba2 020c 	sub.w	r2, r2, ip
  2a:	fa20 f101 	lsr.w	r1, r0, r1
  2e:	bfa8      	it	ge
  30:	fa00 f103 	lslge.w	r1, r0, r3
  34:	fa00 f00e 	lsl.w	r0, r0, lr
from_parts():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mod.rs:123
  38:	f36f 511f 	bfc	r1, #20, #12
__aeabi_ui2d():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:127
  3c:	2b00      	cmp	r3, #0
from_parts():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mod.rs:121
  3e:	ea41 5102 	orr.w	r1, r1, r2, lsl #20
__aeabi_ui2d():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:127
  42:	bfa8      	it	ge
  44:	2000      	movge	r0, #0
  46:	bd80      	pop	{r7, pc}

Disassembly of section .text.__floatundisf:

00000000 <__floatundisf>:
__floatundisf():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:136
   0:	ea50 0201 	orrs.w	r2, r0, r1
   4:	bf04      	itt	eq
   6:	2000      	moveq	r0, #0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:216
   8:	4770      	bxeq	lr
leading_zeros():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2239
   a:	fab0 f280 	clz	r2, r0
   e:	2900      	cmp	r1, #0
  10:	f102 0220 	add.w	r2, r2, #32
  14:	bf18      	it	ne
  16:	fab1 f281 	clzne	r2, r1
__floatundisf():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:136
  1a:	f1c2 0c3f 	rsb	ip, r2, #63	; 0x3f
  1e:	f1c2 0240 	rsb	r2, r2, #64	; 0x40
  22:	2a18      	cmp	r2, #24
  24:	d939      	bls.n	9a <__floatundisf+0x9a>
  26:	b5f0      	push	{r4, r5, r6, r7, lr}
  28:	2a19      	cmp	r2, #25
  2a:	d042      	beq.n	b2 <__floatundisf+0xb2>
  2c:	2a1a      	cmp	r2, #26
  2e:	d044      	beq.n	ba <__floatundisf+0xba>
  30:	f102 0326 	add.w	r3, r2, #38	; 0x26
  34:	f1c2 051a 	rsb	r5, r2, #26
  38:	f003 033f 	and.w	r3, r3, #63	; 0x3f
wrapping_shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:3032
  3c:	f005 053f 	and.w	r5, r5, #63	; 0x3f
__floatundisf():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:136
  40:	f1c3 0420 	rsb	r4, r3, #32
wrapping_shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:3032
  44:	f1c5 0720 	rsb	r7, r5, #32
__floatundisf():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:136
  48:	fa20 fe03 	lsr.w	lr, r0, r3
wrapping_shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:3032
  4c:	fa01 f605 	lsl.w	r6, r1, r5
__floatundisf():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:136
  50:	fa01 f404 	lsl.w	r4, r1, r4
wrapping_shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:3032
  54:	fa20 f707 	lsr.w	r7, r0, r7
__floatundisf():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:136
  58:	ea44 040e 	orr.w	r4, r4, lr
  5c:	f1a3 0e20 	sub.w	lr, r3, #32
  60:	f1be 0f00 	cmp.w	lr, #0
wrapping_shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:3032
  64:	ea46 0607 	orr.w	r6, r6, r7
  68:	f1a5 0720 	sub.w	r7, r5, #32
__floatundisf():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:136
  6c:	bfa8      	it	ge
  6e:	fa21 f40e 	lsrge.w	r4, r1, lr
wrapping_shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:3032
  72:	2f00      	cmp	r7, #0
  74:	bfa8      	it	ge
  76:	fa00 f607 	lslge.w	r6, r0, r7
  7a:	fa00 f005 	lsl.w	r0, r0, r5
__floatundisf():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:136
  7e:	fa21 f103 	lsr.w	r1, r1, r3
wrapping_shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:3032
  82:	bfa8      	it	ge
  84:	2000      	movge	r0, #0
__floatundisf():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:136
  86:	4330      	orrs	r0, r6
  88:	bf18      	it	ne
  8a:	2001      	movne	r0, #1
  8c:	f1be 0f00 	cmp.w	lr, #0
  90:	ea40 0004 	orr.w	r0, r0, r4
  94:	bfa8      	it	ge
  96:	2100      	movge	r1, #0
  98:	e00f      	b.n	ba <__floatundisf+0xba>
  9a:	f1c2 0118 	rsb	r1, r2, #24
wrapping_shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:3032
  9e:	f001 013f 	and.w	r1, r1, #63	; 0x3f
  a2:	f1a1 0220 	sub.w	r2, r1, #32
  a6:	4088      	lsls	r0, r1
  a8:	2a00      	cmp	r2, #0
  aa:	bfa8      	it	ge
  ac:	2000      	movge	r0, #0
__floatundisf():
  ae:	4662      	mov	r2, ip
  b0:	e019      	b.n	e6 <__floatundisf+0xe6>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:136
  b2:	0049      	lsls	r1, r1, #1
  b4:	ea41 71d0 	orr.w	r1, r1, r0, lsr #31
  b8:	0040      	lsls	r0, r0, #1
  ba:	f3c0 0380 	ubfx	r3, r0, #2, #1
  be:	2703      	movs	r7, #3
  c0:	4318      	orrs	r0, r3
  c2:	3001      	adds	r0, #1
  c4:	f141 0100 	adc.w	r1, r1, #0
  c8:	f010 6380 	ands.w	r3, r0, #67108864	; 0x4000000
  cc:	bf08      	it	eq
  ce:	2702      	moveq	r7, #2
  d0:	40f8      	lsrs	r0, r7
  d2:	f087 071f 	eor.w	r7, r7, #31
  d6:	0049      	lsls	r1, r1, #1
  d8:	2b00      	cmp	r3, #0
  da:	bf08      	it	eq
  dc:	4662      	moveq	r2, ip
  de:	40b9      	lsls	r1, r7
  e0:	4308      	orrs	r0, r1
  e2:	e8bd 40f0 	ldmia.w	sp!, {r4, r5, r6, r7, lr}
  e6:	f04f 517e 	mov.w	r1, #1065353216	; 0x3f800000
from_parts():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mod.rs:123
  ea:	f36f 50df 	bfc	r0, #23, #9
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mod.rs:122
  ee:	eb01 51c2 	add.w	r1, r1, r2, lsl #23
  f2:	f001 41ff 	and.w	r1, r1, #2139095040	; 0x7f800000
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mod.rs:121
  f6:	4408      	add	r0, r1
__floatundisf():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:216
  f8:	4770      	bx	lr

Disassembly of section .text.__aeabi_ul2f:

00000000 <__aeabi_ul2f>:
__aeabi_ul2f():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:136
   0:	ea50 0201 	orrs.w	r2, r0, r1
   4:	bf04      	itt	eq
   6:	2000      	moveq	r0, #0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
   8:	4770      	bxeq	lr
leading_zeros():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2239
   a:	fab0 f280 	clz	r2, r0
   e:	2900      	cmp	r1, #0
  10:	f102 0220 	add.w	r2, r2, #32
  14:	bf18      	it	ne
  16:	fab1 f281 	clzne	r2, r1
__aeabi_ul2f():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:136
  1a:	f1c2 0c3f 	rsb	ip, r2, #63	; 0x3f
  1e:	f1c2 0240 	rsb	r2, r2, #64	; 0x40
  22:	2a19      	cmp	r2, #25
  24:	d338      	bcc.n	98 <__aeabi_ul2f+0x98>
  26:	b5f0      	push	{r4, r5, r6, r7, lr}
  28:	d042      	beq.n	b0 <__aeabi_ul2f+0xb0>
  2a:	2a1a      	cmp	r2, #26
  2c:	d044      	beq.n	b8 <__aeabi_ul2f+0xb8>
  2e:	f102 0326 	add.w	r3, r2, #38	; 0x26
  32:	f1c2 051a 	rsb	r5, r2, #26
  36:	f003 033f 	and.w	r3, r3, #63	; 0x3f
wrapping_shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:3032
  3a:	f005 053f 	and.w	r5, r5, #63	; 0x3f
__aeabi_ul2f():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:136
  3e:	f1c3 0420 	rsb	r4, r3, #32
wrapping_shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:3032
  42:	f1c5 0720 	rsb	r7, r5, #32
__aeabi_ul2f():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:136
  46:	fa20 fe03 	lsr.w	lr, r0, r3
wrapping_shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:3032
  4a:	fa01 f605 	lsl.w	r6, r1, r5
__aeabi_ul2f():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:136
  4e:	fa01 f404 	lsl.w	r4, r1, r4
wrapping_shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:3032
  52:	fa20 f707 	lsr.w	r7, r0, r7
__aeabi_ul2f():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:136
  56:	ea44 040e 	orr.w	r4, r4, lr
  5a:	f1a3 0e20 	sub.w	lr, r3, #32
  5e:	f1be 0f00 	cmp.w	lr, #0
wrapping_shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:3032
  62:	ea46 0607 	orr.w	r6, r6, r7
  66:	f1a5 0720 	sub.w	r7, r5, #32
__aeabi_ul2f():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:136
  6a:	bfa8      	it	ge
  6c:	fa21 f40e 	lsrge.w	r4, r1, lr
wrapping_shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:3032
  70:	2f00      	cmp	r7, #0
  72:	bfa8      	it	ge
  74:	fa00 f607 	lslge.w	r6, r0, r7
  78:	fa00 f005 	lsl.w	r0, r0, r5
__aeabi_ul2f():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:136
  7c:	fa21 f103 	lsr.w	r1, r1, r3
wrapping_shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:3032
  80:	bfa8      	it	ge
  82:	2000      	movge	r0, #0
__aeabi_ul2f():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:136
  84:	4330      	orrs	r0, r6
  86:	bf18      	it	ne
  88:	2001      	movne	r0, #1
  8a:	f1be 0f00 	cmp.w	lr, #0
  8e:	ea40 0004 	orr.w	r0, r0, r4
  92:	bfa8      	it	ge
  94:	2100      	movge	r1, #0
  96:	e00f      	b.n	b8 <__aeabi_ul2f+0xb8>
  98:	f1c2 0118 	rsb	r1, r2, #24
wrapping_shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:3032
  9c:	f001 013f 	and.w	r1, r1, #63	; 0x3f
  a0:	f1a1 0220 	sub.w	r2, r1, #32
  a4:	4088      	lsls	r0, r1
  a6:	2a00      	cmp	r2, #0
  a8:	bfa8      	it	ge
  aa:	2000      	movge	r0, #0
__aeabi_ul2f():
  ac:	4662      	mov	r2, ip
  ae:	e019      	b.n	e4 <__aeabi_ul2f+0xe4>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:136
  b0:	0049      	lsls	r1, r1, #1
  b2:	ea41 71d0 	orr.w	r1, r1, r0, lsr #31
  b6:	0040      	lsls	r0, r0, #1
  b8:	f3c0 0380 	ubfx	r3, r0, #2, #1
  bc:	2703      	movs	r7, #3
  be:	4318      	orrs	r0, r3
  c0:	3001      	adds	r0, #1
  c2:	f141 0100 	adc.w	r1, r1, #0
  c6:	f010 6380 	ands.w	r3, r0, #67108864	; 0x4000000
  ca:	bf08      	it	eq
  cc:	2702      	moveq	r7, #2
  ce:	40f8      	lsrs	r0, r7
  d0:	f087 071f 	eor.w	r7, r7, #31
  d4:	0049      	lsls	r1, r1, #1
  d6:	2b00      	cmp	r3, #0
  d8:	bf08      	it	eq
  da:	4662      	moveq	r2, ip
  dc:	40b9      	lsls	r1, r7
  de:	4308      	orrs	r0, r1
  e0:	e8bd 40f0 	ldmia.w	sp!, {r4, r5, r6, r7, lr}
  e4:	f04f 517e 	mov.w	r1, #1065353216	; 0x3f800000
from_parts():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mod.rs:123
  e8:	f36f 50df 	bfc	r0, #23, #9
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mod.rs:122
  ec:	eb01 51c2 	add.w	r1, r1, r2, lsl #23
  f0:	f001 41ff 	and.w	r1, r1, #2139095040	; 0x7f800000
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mod.rs:121
  f4:	4408      	add	r0, r1
__aeabi_ul2f():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
  f6:	4770      	bx	lr

Disassembly of section .text.__floatundidf:

00000000 <__floatundidf>:
__floatundidf():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:145
   0:	ea50 0201 	orrs.w	r2, r0, r1
   4:	bf02      	ittt	eq
   6:	2000      	moveq	r0, #0
   8:	2100      	moveq	r1, #0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:216
   a:	4770      	bxeq	lr
leading_zeros():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2239
   c:	fab0 f280 	clz	r2, r0
  10:	2900      	cmp	r1, #0
  12:	f102 0320 	add.w	r3, r2, #32
  16:	bf18      	it	ne
  18:	fab1 f381 	clzne	r3, r1
__floatundidf():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:145
  1c:	f1c3 0c3f 	rsb	ip, r3, #63	; 0x3f
  20:	f1c3 0340 	rsb	r3, r3, #64	; 0x40
  24:	2b35      	cmp	r3, #53	; 0x35
  26:	d939      	bls.n	9c <__floatundidf+0x9c>
  28:	b5f0      	push	{r4, r5, r6, r7, lr}
  2a:	2b36      	cmp	r3, #54	; 0x36
  2c:	d04c      	beq.n	c8 <__floatundidf+0xc8>
  2e:	2b37      	cmp	r3, #55	; 0x37
  30:	d04e      	beq.n	d0 <__floatundidf+0xd0>
  32:	f103 0209 	add.w	r2, r3, #9
  36:	f1c3 0537 	rsb	r5, r3, #55	; 0x37
  3a:	f002 023f 	and.w	r2, r2, #63	; 0x3f
wrapping_shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:3032
  3e:	f005 053f 	and.w	r5, r5, #63	; 0x3f
__floatundidf():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:145
  42:	f1c2 0420 	rsb	r4, r2, #32
wrapping_shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:3032
  46:	f1c5 0720 	rsb	r7, r5, #32
__floatundidf():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:145
  4a:	fa20 fe02 	lsr.w	lr, r0, r2
wrapping_shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:3032
  4e:	fa01 f605 	lsl.w	r6, r1, r5
__floatundidf():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:145
  52:	fa01 f404 	lsl.w	r4, r1, r4
wrapping_shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:3032
  56:	fa20 f707 	lsr.w	r7, r0, r7
__floatundidf():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:145
  5a:	ea44 040e 	orr.w	r4, r4, lr
  5e:	f1a2 0e20 	sub.w	lr, r2, #32
  62:	f1be 0f00 	cmp.w	lr, #0
wrapping_shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:3032
  66:	ea46 0607 	orr.w	r6, r6, r7
  6a:	f1a5 0720 	sub.w	r7, r5, #32
__floatundidf():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:145
  6e:	bfa8      	it	ge
  70:	fa21 f40e 	lsrge.w	r4, r1, lr
wrapping_shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:3032
  74:	2f00      	cmp	r7, #0
  76:	bfa8      	it	ge
  78:	fa00 f607 	lslge.w	r6, r0, r7
  7c:	fa00 f005 	lsl.w	r0, r0, r5
__floatundidf():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:145
  80:	fa21 f102 	lsr.w	r1, r1, r2
wrapping_shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:3032
  84:	bfa8      	it	ge
  86:	2000      	movge	r0, #0
__floatundidf():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:145
  88:	4330      	orrs	r0, r6
  8a:	bf18      	it	ne
  8c:	2001      	movne	r0, #1
  8e:	f1be 0f00 	cmp.w	lr, #0
  92:	ea40 0004 	orr.w	r0, r0, r4
  96:	bfa8      	it	ge
  98:	2100      	movge	r1, #0
  9a:	e019      	b.n	d0 <__floatundidf+0xd0>
  9c:	f1c3 0335 	rsb	r3, r3, #53	; 0x35
wrapping_shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:3032
  a0:	f003 033f 	and.w	r3, r3, #63	; 0x3f
  a4:	f1c3 0220 	rsb	r2, r3, #32
  a8:	4099      	lsls	r1, r3
  aa:	fa20 f202 	lsr.w	r2, r0, r2
  ae:	4311      	orrs	r1, r2
  b0:	f1a3 0220 	sub.w	r2, r3, #32
  b4:	2a00      	cmp	r2, #0
  b6:	bfa8      	it	ge
  b8:	fa00 f102 	lslge.w	r1, r0, r2
  bc:	fa00 f003 	lsl.w	r0, r0, r3
__floatundidf():
  c0:	4663      	mov	r3, ip
wrapping_shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:3032
  c2:	bfa8      	it	ge
  c4:	2000      	movge	r0, #0
  c6:	e01a      	b.n	fe <__floatundidf+0xfe>
__floatundidf():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:145
  c8:	0049      	lsls	r1, r1, #1
  ca:	ea41 71d0 	orr.w	r1, r1, r0, lsr #31
  ce:	0040      	lsls	r0, r0, #1
  d0:	f3c0 0280 	ubfx	r2, r0, #2, #1
  d4:	2703      	movs	r7, #3
  d6:	4310      	orrs	r0, r2
  d8:	3001      	adds	r0, #1
  da:	f141 0100 	adc.w	r1, r1, #0
  de:	f411 0200 	ands.w	r2, r1, #8388608	; 0x800000
  e2:	bf08      	it	eq
  e4:	2702      	moveq	r7, #2
  e6:	f087 051f 	eor.w	r5, r7, #31
  ea:	004e      	lsls	r6, r1, #1
  ec:	40f8      	lsrs	r0, r7
  ee:	40f9      	lsrs	r1, r7
  f0:	40ae      	lsls	r6, r5
  f2:	4330      	orrs	r0, r6
  f4:	2a00      	cmp	r2, #0
  f6:	bf08      	it	eq
  f8:	4663      	moveq	r3, ip
  fa:	e8bd 40f0 	ldmia.w	sp!, {r4, r5, r6, r7, lr}
  fe:	f203 32ff 	addw	r2, r3, #1023	; 0x3ff
from_parts():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mod.rs:123
 102:	f36f 511f 	bfc	r1, #20, #12
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mod.rs:121
 106:	f362 511e 	bfi	r1, r2, #20, #11
__floatundidf():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:216
 10a:	4770      	bx	lr

Disassembly of section .text.__aeabi_ul2d:

00000000 <__aeabi_ul2d>:
__aeabi_ul2d():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:145
   0:	ea50 0201 	orrs.w	r2, r0, r1
   4:	bf02      	ittt	eq
   6:	2000      	moveq	r0, #0
   8:	2100      	moveq	r1, #0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
   a:	4770      	bxeq	lr
leading_zeros():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2239
   c:	fab0 f280 	clz	r2, r0
  10:	2900      	cmp	r1, #0
  12:	f102 0320 	add.w	r3, r2, #32
  16:	bf18      	it	ne
  18:	fab1 f381 	clzne	r3, r1
__aeabi_ul2d():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:145
  1c:	f1c3 0c3f 	rsb	ip, r3, #63	; 0x3f
  20:	f1c3 0340 	rsb	r3, r3, #64	; 0x40
  24:	2b36      	cmp	r3, #54	; 0x36
  26:	d338      	bcc.n	9a <__aeabi_ul2d+0x9a>
  28:	b5f0      	push	{r4, r5, r6, r7, lr}
  2a:	d04c      	beq.n	c6 <__aeabi_ul2d+0xc6>
  2c:	2b37      	cmp	r3, #55	; 0x37
  2e:	d04e      	beq.n	ce <__aeabi_ul2d+0xce>
  30:	f103 0209 	add.w	r2, r3, #9
  34:	f1c3 0537 	rsb	r5, r3, #55	; 0x37
  38:	f002 023f 	and.w	r2, r2, #63	; 0x3f
wrapping_shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:3032
  3c:	f005 053f 	and.w	r5, r5, #63	; 0x3f
__aeabi_ul2d():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:145
  40:	f1c2 0420 	rsb	r4, r2, #32
wrapping_shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:3032
  44:	f1c5 0720 	rsb	r7, r5, #32
__aeabi_ul2d():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:145
  48:	fa20 fe02 	lsr.w	lr, r0, r2
wrapping_shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:3032
  4c:	fa01 f605 	lsl.w	r6, r1, r5
__aeabi_ul2d():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:145
  50:	fa01 f404 	lsl.w	r4, r1, r4
wrapping_shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:3032
  54:	fa20 f707 	lsr.w	r7, r0, r7
__aeabi_ul2d():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:145
  58:	ea44 040e 	orr.w	r4, r4, lr
  5c:	f1a2 0e20 	sub.w	lr, r2, #32
  60:	f1be 0f00 	cmp.w	lr, #0
wrapping_shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:3032
  64:	ea46 0607 	orr.w	r6, r6, r7
  68:	f1a5 0720 	sub.w	r7, r5, #32
__aeabi_ul2d():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:145
  6c:	bfa8      	it	ge
  6e:	fa21 f40e 	lsrge.w	r4, r1, lr
wrapping_shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:3032
  72:	2f00      	cmp	r7, #0
  74:	bfa8      	it	ge
  76:	fa00 f607 	lslge.w	r6, r0, r7
  7a:	fa00 f005 	lsl.w	r0, r0, r5
__aeabi_ul2d():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:145
  7e:	fa21 f102 	lsr.w	r1, r1, r2
wrapping_shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:3032
  82:	bfa8      	it	ge
  84:	2000      	movge	r0, #0
__aeabi_ul2d():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:145
  86:	4330      	orrs	r0, r6
  88:	bf18      	it	ne
  8a:	2001      	movne	r0, #1
  8c:	f1be 0f00 	cmp.w	lr, #0
  90:	ea40 0004 	orr.w	r0, r0, r4
  94:	bfa8      	it	ge
  96:	2100      	movge	r1, #0
  98:	e019      	b.n	ce <__aeabi_ul2d+0xce>
  9a:	f1c3 0335 	rsb	r3, r3, #53	; 0x35
wrapping_shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:3032
  9e:	f003 033f 	and.w	r3, r3, #63	; 0x3f
  a2:	f1c3 0220 	rsb	r2, r3, #32
  a6:	4099      	lsls	r1, r3
  a8:	fa20 f202 	lsr.w	r2, r0, r2
  ac:	4311      	orrs	r1, r2
  ae:	f1a3 0220 	sub.w	r2, r3, #32
  b2:	2a00      	cmp	r2, #0
  b4:	bfa8      	it	ge
  b6:	fa00 f102 	lslge.w	r1, r0, r2
  ba:	fa00 f003 	lsl.w	r0, r0, r3
__aeabi_ul2d():
  be:	4663      	mov	r3, ip
wrapping_shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:3032
  c0:	bfa8      	it	ge
  c2:	2000      	movge	r0, #0
  c4:	e01a      	b.n	fc <__aeabi_ul2d+0xfc>
__aeabi_ul2d():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:145
  c6:	0049      	lsls	r1, r1, #1
  c8:	ea41 71d0 	orr.w	r1, r1, r0, lsr #31
  cc:	0040      	lsls	r0, r0, #1
  ce:	f3c0 0280 	ubfx	r2, r0, #2, #1
  d2:	2703      	movs	r7, #3
  d4:	4310      	orrs	r0, r2
  d6:	3001      	adds	r0, #1
  d8:	f141 0100 	adc.w	r1, r1, #0
  dc:	f411 0200 	ands.w	r2, r1, #8388608	; 0x800000
  e0:	bf08      	it	eq
  e2:	2702      	moveq	r7, #2
  e4:	f087 051f 	eor.w	r5, r7, #31
  e8:	004e      	lsls	r6, r1, #1
  ea:	40f8      	lsrs	r0, r7
  ec:	40f9      	lsrs	r1, r7
  ee:	40ae      	lsls	r6, r5
  f0:	4330      	orrs	r0, r6
  f2:	2a00      	cmp	r2, #0
  f4:	bf08      	it	eq
  f6:	4663      	moveq	r3, ip
  f8:	e8bd 40f0 	ldmia.w	sp!, {r4, r5, r6, r7, lr}
  fc:	f203 32ff 	addw	r2, r3, #1023	; 0x3ff
from_parts():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mod.rs:123
 100:	f36f 511f 	bfc	r1, #20, #12
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mod.rs:121
 104:	f362 511e 	bfi	r1, r2, #20, #11
__aeabi_ul2d():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
 108:	4770      	bx	lr

Disassembly of section .text.__floatuntisf:

00000000 <__floatuntisf>:
__floatuntisf():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:254
   0:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
   4:	b082      	sub	sp, #8
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:150
   6:	ea41 0703 	orr.w	r7, r1, r3
   a:	ea40 0602 	orr.w	r6, r0, r2
   e:	4337      	orrs	r7, r6
  10:	f000 80e9 	beq.w	1e6 <__floatuntisf+0x1e6>
leading_zeros():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2239
  14:	fab2 f782 	clz	r7, r2
  18:	fab0 f680 	clz	r6, r0
  1c:	3720      	adds	r7, #32
  1e:	2b00      	cmp	r3, #0
  20:	bf18      	it	ne
  22:	fab3 f783 	clzne	r7, r3
  26:	3620      	adds	r6, #32
  28:	2900      	cmp	r1, #0
  2a:	bf18      	it	ne
  2c:	fab1 f681 	clzne	r6, r1
  30:	ea52 0503 	orrs.w	r5, r2, r3
  34:	bf08      	it	eq
  36:	f106 0740 	addeq.w	r7, r6, #64	; 0x40
__floatuntisf():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:150
  3a:	f1c7 0e80 	rsb	lr, r7, #128	; 0x80
  3e:	f1c7 0c7f 	rsb	ip, r7, #127	; 0x7f
  42:	f1be 0f18 	cmp.w	lr, #24
  46:	f240 80d2 	bls.w	1ee <__floatuntisf+0x1ee>
  4a:	f1be 0f19 	cmp.w	lr, #25
  4e:	f000 80dd 	beq.w	20c <__floatuntisf+0x20c>
  52:	f1be 0f1a 	cmp.w	lr, #26
  56:	f000 80dd 	beq.w	214 <__floatuntisf+0x214>
  5a:	f1ce 041a 	rsb	r4, lr, #26
wrapping_shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:3032
  5e:	f004 047f 	and.w	r4, r4, #127	; 0x7f
  62:	f1c4 0660 	rsb	r6, r4, #96	; 0x60
  66:	f1a4 0840 	sub.w	r8, r4, #64	; 0x40
  6a:	f1a4 0960 	sub.w	r9, r4, #96	; 0x60
  6e:	fa03 fa04 	lsl.w	sl, r3, r4
  72:	fa01 f508 	lsl.w	r5, r1, r8
  76:	fa20 f606 	lsr.w	r6, r0, r6
  7a:	4335      	orrs	r5, r6
  7c:	f1c4 0620 	rsb	r6, r4, #32
  80:	f1b9 0f00 	cmp.w	r9, #0
  84:	f1c4 0b40 	rsb	fp, r4, #64	; 0x40
  88:	fa22 f706 	lsr.w	r7, r2, r6
  8c:	bfa8      	it	ge
  8e:	fa00 f509 	lslge.w	r5, r0, r9
  92:	ea47 070a 	orr.w	r7, r7, sl
  96:	f1a4 0a20 	sub.w	sl, r4, #32
  9a:	f1ba 0f00 	cmp.w	sl, #0
  9e:	bfa8      	it	ge
  a0:	fa02 f70a 	lslge.w	r7, r2, sl
  a4:	f8cd c004 	str.w	ip, [sp, #4]
  a8:	fa21 fc0b 	lsr.w	ip, r1, fp
  ac:	2e00      	cmp	r6, #0
  ae:	bfa8      	it	ge
  b0:	f04f 0c00 	movge.w	ip, #0
  b4:	2c40      	cmp	r4, #64	; 0x40
  b6:	bf38      	it	cc
  b8:	ea47 050c 	orrcc.w	r5, r7, ip
  bc:	fa20 f706 	lsr.w	r7, r0, r6
  c0:	2c00      	cmp	r4, #0
  c2:	fa01 fc04 	lsl.w	ip, r1, r4
  c6:	ea47 070c 	orr.w	r7, r7, ip
  ca:	bf08      	it	eq
  cc:	461d      	moveq	r5, r3
  ce:	f1ba 0f00 	cmp.w	sl, #0
  d2:	bfa8      	it	ge
  d4:	fa00 f70a 	lslge.w	r7, r0, sl
__floatuntisf():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:150
  d8:	2c40      	cmp	r4, #64	; 0x40
  da:	bf38      	it	cc
  dc:	433d      	orrcc	r5, r7
wrapping_shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:3032
  de:	f1cb 0720 	rsb	r7, fp, #32
  e2:	fa20 fc0b 	lsr.w	ip, r0, fp
  e6:	2e00      	cmp	r6, #0
  e8:	fa01 f707 	lsl.w	r7, r1, r7
  ec:	ea4c 0c07 	orr.w	ip, ip, r7
  f0:	bfa8      	it	ge
  f2:	fa21 fc06 	lsrge.w	ip, r1, r6
  f6:	fa02 f604 	lsl.w	r6, r2, r4
  fa:	f1ba 0f00 	cmp.w	sl, #0
  fe:	bfa8      	it	ge
 100:	2600      	movge	r6, #0
 102:	fa00 f708 	lsl.w	r7, r0, r8
 106:	f1b9 0f00 	cmp.w	r9, #0
 10a:	bfa8      	it	ge
 10c:	2700      	movge	r7, #0
 10e:	2c40      	cmp	r4, #64	; 0x40
 110:	bf38      	it	cc
 112:	ea46 070c 	orrcc.w	r7, r6, ip
 116:	2c00      	cmp	r4, #0
 118:	fa00 f604 	lsl.w	r6, r0, r4
 11c:	bf08      	it	eq
 11e:	4617      	moveq	r7, r2
 120:	f1ba 0f00 	cmp.w	sl, #0
 124:	bfa8      	it	ge
 126:	2600      	movge	r6, #0
__floatuntisf():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:150
 128:	2c40      	cmp	r4, #64	; 0x40
 12a:	bf38      	it	cc
 12c:	4337      	orrcc	r7, r6
 12e:	f10e 0666 	add.w	r6, lr, #102	; 0x66
 132:	ea57 0a05 	orrs.w	sl, r7, r5
 136:	f006 047f 	and.w	r4, r6, #127	; 0x7f
 13a:	bf18      	it	ne
 13c:	f04f 0a01 	movne.w	sl, #1
 140:	f1a4 0740 	sub.w	r7, r4, #64	; 0x40
 144:	f1c4 0660 	rsb	r6, r4, #96	; 0x60
 148:	9700      	str	r7, [sp, #0]
 14a:	f1a4 0960 	sub.w	r9, r4, #96	; 0x60
 14e:	fa22 f507 	lsr.w	r5, r2, r7
 152:	f1c4 0720 	rsb	r7, r4, #32
 156:	fa03 f606 	lsl.w	r6, r3, r6
 15a:	4335      	orrs	r5, r6
 15c:	fa20 fb04 	lsr.w	fp, r0, r4
 160:	fa01 f607 	lsl.w	r6, r1, r7
 164:	f1b9 0f00 	cmp.w	r9, #0
 168:	ea46 060b 	orr.w	r6, r6, fp
 16c:	f1c4 0c40 	rsb	ip, r4, #64	; 0x40
 170:	f1a4 0b20 	sub.w	fp, r4, #32
 174:	bfa8      	it	ge
 176:	fa23 f509 	lsrge.w	r5, r3, r9
 17a:	f1bb 0f00 	cmp.w	fp, #0
 17e:	bfa8      	it	ge
 180:	fa21 f60b 	lsrge.w	r6, r1, fp
 184:	fa02 f80c 	lsl.w	r8, r2, ip
 188:	2f00      	cmp	r7, #0
 18a:	bfa8      	it	ge
 18c:	f04f 0800 	movge.w	r8, #0
 190:	2c40      	cmp	r4, #64	; 0x40
 192:	bf38      	it	cc
 194:	ea46 0508 	orrcc.w	r5, r6, r8
 198:	f1cc 0620 	rsb	r6, ip, #32
 19c:	2c00      	cmp	r4, #0
 19e:	bf08      	it	eq
 1a0:	4605      	moveq	r5, r0
 1a2:	ea45 000a 	orr.w	r0, r5, sl
 1a6:	fa22 f606 	lsr.w	r6, r2, r6
 1aa:	fa03 f50c 	lsl.w	r5, r3, ip
 1ae:	432e      	orrs	r6, r5
 1b0:	f8dd c004 	ldr.w	ip, [sp, #4]
 1b4:	2f00      	cmp	r7, #0
 1b6:	bfa8      	it	ge
 1b8:	fa02 f607 	lslge.w	r6, r2, r7
 1bc:	fa21 f204 	lsr.w	r2, r1, r4
 1c0:	f1bb 0f00 	cmp.w	fp, #0
 1c4:	bfa8      	it	ge
 1c6:	2200      	movge	r2, #0
 1c8:	9d00      	ldr	r5, [sp, #0]
 1ca:	f1b9 0f00 	cmp.w	r9, #0
 1ce:	fa23 f305 	lsr.w	r3, r3, r5
 1d2:	bfa8      	it	ge
 1d4:	2300      	movge	r3, #0
 1d6:	2c40      	cmp	r4, #64	; 0x40
 1d8:	bf38      	it	cc
 1da:	ea42 0306 	orrcc.w	r3, r2, r6
 1de:	2c00      	cmp	r4, #0
 1e0:	bf18      	it	ne
 1e2:	4619      	movne	r1, r3
 1e4:	e016      	b.n	214 <__floatuntisf+0x214>
 1e6:	2000      	movs	r0, #0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
 1e8:	b002      	add	sp, #8
 1ea:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:150
 1ee:	f1ce 0118 	rsb	r1, lr, #24
 1f2:	46e6      	mov	lr, ip
wrapping_shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:3032
 1f4:	f001 017f 	and.w	r1, r1, #127	; 0x7f
 1f8:	f1a1 0220 	sub.w	r2, r1, #32
 1fc:	4088      	lsls	r0, r1
 1fe:	2a00      	cmp	r2, #0
 200:	bfa8      	it	ge
 202:	2000      	movge	r0, #0
 204:	2940      	cmp	r1, #64	; 0x40
 206:	bf28      	it	cs
 208:	2000      	movcs	r0, #0
 20a:	e019      	b.n	240 <__floatuntisf+0x240>
__floatuntisf():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:150
 20c:	0049      	lsls	r1, r1, #1
 20e:	ea41 71d0 	orr.w	r1, r1, r0, lsr #31
 212:	0040      	lsls	r0, r0, #1
 214:	f3c0 0280 	ubfx	r2, r0, #2, #1
 218:	2303      	movs	r3, #3
 21a:	4310      	orrs	r0, r2
 21c:	3001      	adds	r0, #1
 21e:	f151 0100 	adcs.w	r1, r1, #0
 222:	f010 6280 	ands.w	r2, r0, #67108864	; 0x4000000
 226:	bf08      	it	eq
 228:	2302      	moveq	r3, #2
 22a:	40d8      	lsrs	r0, r3
 22c:	f083 031f 	eor.w	r3, r3, #31
 230:	0049      	lsls	r1, r1, #1
 232:	2a00      	cmp	r2, #0
 234:	fa01 f103 	lsl.w	r1, r1, r3
 238:	ea40 0001 	orr.w	r0, r0, r1
 23c:	bf08      	it	eq
 23e:	46e6      	moveq	lr, ip
 240:	f04f 517e 	mov.w	r1, #1065353216	; 0x3f800000
from_parts():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mod.rs:123
 244:	f36f 50df 	bfc	r0, #23, #9
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mod.rs:122
 248:	eb01 51ce 	add.w	r1, r1, lr, lsl #23
 24c:	f001 41ff 	and.w	r1, r1, #2139095040	; 0x7f800000
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mod.rs:121
 250:	4408      	add	r0, r1
__floatuntisf():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
 252:	b002      	add	sp, #8
 254:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}

Disassembly of section .text.__floatuntidf:

00000000 <__floatuntidf>:
__floatuntidf():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:254
   0:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
   4:	b082      	sub	sp, #8
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:155
   6:	ea41 0703 	orr.w	r7, r1, r3
   a:	ea40 0602 	orr.w	r6, r0, r2
   e:	4337      	orrs	r7, r6
  10:	f000 80f9 	beq.w	206 <__floatuntidf+0x206>
leading_zeros():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2239
  14:	fab2 f782 	clz	r7, r2
  18:	fab0 f680 	clz	r6, r0
  1c:	3720      	adds	r7, #32
  1e:	2b00      	cmp	r3, #0
  20:	bf18      	it	ne
  22:	fab3 f783 	clzne	r7, r3
  26:	3620      	adds	r6, #32
  28:	2900      	cmp	r1, #0
  2a:	bf18      	it	ne
  2c:	fab1 f681 	clzne	r6, r1
  30:	ea52 0503 	orrs.w	r5, r2, r3
  34:	bf08      	it	eq
  36:	f106 0740 	addeq.w	r7, r6, #64	; 0x40
__floatuntidf():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:155
  3a:	f1c7 0e80 	rsb	lr, r7, #128	; 0x80
  3e:	f1c7 0c7f 	rsb	ip, r7, #127	; 0x7f
  42:	f1be 0f35 	cmp.w	lr, #53	; 0x35
  46:	f240 80e3 	bls.w	210 <__floatuntidf+0x210>
  4a:	f1be 0f36 	cmp.w	lr, #54	; 0x36
  4e:	f000 80ff 	beq.w	250 <__floatuntidf+0x250>
  52:	f1be 0f37 	cmp.w	lr, #55	; 0x37
  56:	f000 8103 	beq.w	260 <__floatuntidf+0x260>
  5a:	f1ce 0437 	rsb	r4, lr, #55	; 0x37
wrapping_shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:3032
  5e:	f004 047f 	and.w	r4, r4, #127	; 0x7f
  62:	f1c4 0660 	rsb	r6, r4, #96	; 0x60
  66:	f1a4 0840 	sub.w	r8, r4, #64	; 0x40
  6a:	f1a4 0960 	sub.w	r9, r4, #96	; 0x60
  6e:	fa03 fa04 	lsl.w	sl, r3, r4
  72:	fa01 f508 	lsl.w	r5, r1, r8
  76:	fa20 f606 	lsr.w	r6, r0, r6
  7a:	4335      	orrs	r5, r6
  7c:	f1c4 0620 	rsb	r6, r4, #32
  80:	f1b9 0f00 	cmp.w	r9, #0
  84:	f1c4 0b40 	rsb	fp, r4, #64	; 0x40
  88:	fa22 f706 	lsr.w	r7, r2, r6
  8c:	bfa8      	it	ge
  8e:	fa00 f509 	lslge.w	r5, r0, r9
  92:	ea47 070a 	orr.w	r7, r7, sl
  96:	f1a4 0a20 	sub.w	sl, r4, #32
  9a:	f1ba 0f00 	cmp.w	sl, #0
  9e:	bfa8      	it	ge
  a0:	fa02 f70a 	lslge.w	r7, r2, sl
  a4:	f8cd c004 	str.w	ip, [sp, #4]
  a8:	fa21 fc0b 	lsr.w	ip, r1, fp
  ac:	2e00      	cmp	r6, #0
  ae:	bfa8      	it	ge
  b0:	f04f 0c00 	movge.w	ip, #0
  b4:	2c40      	cmp	r4, #64	; 0x40
  b6:	bf38      	it	cc
  b8:	ea47 050c 	orrcc.w	r5, r7, ip
  bc:	fa20 f706 	lsr.w	r7, r0, r6
  c0:	2c00      	cmp	r4, #0
  c2:	fa01 fc04 	lsl.w	ip, r1, r4
  c6:	ea47 070c 	orr.w	r7, r7, ip
  ca:	bf08      	it	eq
  cc:	461d      	moveq	r5, r3
  ce:	f1ba 0f00 	cmp.w	sl, #0
  d2:	bfa8      	it	ge
  d4:	fa00 f70a 	lslge.w	r7, r0, sl
__floatuntidf():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:155
  d8:	2c40      	cmp	r4, #64	; 0x40
  da:	bf38      	it	cc
  dc:	433d      	orrcc	r5, r7
wrapping_shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:3032
  de:	f1cb 0720 	rsb	r7, fp, #32
  e2:	fa20 fc0b 	lsr.w	ip, r0, fp
  e6:	2e00      	cmp	r6, #0
  e8:	fa01 f707 	lsl.w	r7, r1, r7
  ec:	ea4c 0c07 	orr.w	ip, ip, r7
  f0:	bfa8      	it	ge
  f2:	fa21 fc06 	lsrge.w	ip, r1, r6
  f6:	fa02 f604 	lsl.w	r6, r2, r4
  fa:	f1ba 0f00 	cmp.w	sl, #0
  fe:	bfa8      	it	ge
 100:	2600      	movge	r6, #0
 102:	fa00 f708 	lsl.w	r7, r0, r8
 106:	f1b9 0f00 	cmp.w	r9, #0
 10a:	bfa8      	it	ge
 10c:	2700      	movge	r7, #0
 10e:	2c40      	cmp	r4, #64	; 0x40
 110:	bf38      	it	cc
 112:	ea46 070c 	orrcc.w	r7, r6, ip
 116:	2c00      	cmp	r4, #0
 118:	bf08      	it	eq
 11a:	4617      	moveq	r7, r2
 11c:	fa00 f604 	lsl.w	r6, r0, r4
 120:	f1ba 0f00 	cmp.w	sl, #0
 124:	bfa8      	it	ge
 126:	2600      	movge	r6, #0
__floatuntidf():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:155
 128:	2c40      	cmp	r4, #64	; 0x40
 12a:	bf38      	it	cc
 12c:	4337      	orrcc	r7, r6
 12e:	ea57 0a05 	orrs.w	sl, r7, r5
 132:	f10e 0749 	add.w	r7, lr, #73	; 0x49
 136:	f007 047f 	and.w	r4, r7, #127	; 0x7f
 13a:	bf18      	it	ne
 13c:	f04f 0a01 	movne.w	sl, #1
 140:	f1c4 0760 	rsb	r7, r4, #96	; 0x60
 144:	f1a4 0960 	sub.w	r9, r4, #96	; 0x60
 148:	fa20 fb04 	lsr.w	fp, r0, r4
 14c:	f1c4 0c40 	rsb	ip, r4, #64	; 0x40
 150:	fa03 f607 	lsl.w	r6, r3, r7
 154:	f1a4 0740 	sub.w	r7, r4, #64	; 0x40
 158:	9700      	str	r7, [sp, #0]
 15a:	f1b9 0f00 	cmp.w	r9, #0
 15e:	fa22 f707 	lsr.w	r7, r2, r7
 162:	ea47 0506 	orr.w	r5, r7, r6
 166:	f1c4 0720 	rsb	r7, r4, #32
 16a:	bfa8      	it	ge
 16c:	fa23 f509 	lsrge.w	r5, r3, r9
 170:	fa02 f80c 	lsl.w	r8, r2, ip
 174:	fa01 f607 	lsl.w	r6, r1, r7
 178:	ea46 060b 	orr.w	r6, r6, fp
 17c:	f1a4 0b20 	sub.w	fp, r4, #32
 180:	f1bb 0f00 	cmp.w	fp, #0
 184:	bfa8      	it	ge
 186:	fa21 f60b 	lsrge.w	r6, r1, fp
 18a:	2f00      	cmp	r7, #0
 18c:	bfa8      	it	ge
 18e:	f04f 0800 	movge.w	r8, #0
 192:	2c40      	cmp	r4, #64	; 0x40
 194:	bf38      	it	cc
 196:	ea46 0508 	orrcc.w	r5, r6, r8
 19a:	2c00      	cmp	r4, #0
 19c:	bf08      	it	eq
 19e:	4605      	moveq	r5, r0
 1a0:	ea45 000a 	orr.w	r0, r5, sl
 1a4:	fa22 f504 	lsr.w	r5, r2, r4
 1a8:	fa03 f607 	lsl.w	r6, r3, r7
 1ac:	4335      	orrs	r5, r6
 1ae:	f1cc 0620 	rsb	r6, ip, #32
 1b2:	f1bb 0f00 	cmp.w	fp, #0
 1b6:	bfa8      	it	ge
 1b8:	fa23 f50b 	lsrge.w	r5, r3, fp
 1bc:	2c40      	cmp	r4, #64	; 0x40
 1be:	fa22 f606 	lsr.w	r6, r2, r6
 1c2:	fa03 f80c 	lsl.w	r8, r3, ip
 1c6:	ea46 0608 	orr.w	r6, r6, r8
 1ca:	bf28      	it	cs
 1cc:	2500      	movcs	r5, #0
 1ce:	f8dd c004 	ldr.w	ip, [sp, #4]
 1d2:	2f00      	cmp	r7, #0
 1d4:	bfa8      	it	ge
 1d6:	fa02 f607 	lslge.w	r6, r2, r7
 1da:	fa21 f204 	lsr.w	r2, r1, r4
 1de:	f1bb 0f00 	cmp.w	fp, #0
 1e2:	bfa8      	it	ge
 1e4:	2200      	movge	r2, #0
 1e6:	9f00      	ldr	r7, [sp, #0]
 1e8:	f1b9 0f00 	cmp.w	r9, #0
 1ec:	fa23 f307 	lsr.w	r3, r3, r7
 1f0:	bfa8      	it	ge
 1f2:	2300      	movge	r3, #0
 1f4:	2c40      	cmp	r4, #64	; 0x40
 1f6:	bf38      	it	cc
 1f8:	ea42 0306 	orrcc.w	r3, r2, r6
 1fc:	2c00      	cmp	r4, #0
 1fe:	bf18      	it	ne
 200:	4619      	movne	r1, r3
 202:	462a      	mov	r2, r5
 204:	e02c      	b.n	260 <__floatuntidf+0x260>
 206:	2000      	movs	r0, #0
 208:	2100      	movs	r1, #0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
 20a:	b002      	add	sp, #8
 20c:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:155
 210:	f1ce 0235 	rsb	r2, lr, #53	; 0x35
 214:	46e6      	mov	lr, ip
wrapping_shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:3032
 216:	f002 027f 	and.w	r2, r2, #127	; 0x7f
 21a:	f1c2 0320 	rsb	r3, r2, #32
 21e:	f1a2 0720 	sub.w	r7, r2, #32
 222:	4091      	lsls	r1, r2
 224:	2f00      	cmp	r7, #0
 226:	fa20 f303 	lsr.w	r3, r0, r3
 22a:	ea41 0103 	orr.w	r1, r1, r3
 22e:	bfa8      	it	ge
 230:	fa00 f107 	lslge.w	r1, r0, r7
 234:	2a40      	cmp	r2, #64	; 0x40
 236:	fa00 f002 	lsl.w	r0, r0, r2
 23a:	f04f 0300 	mov.w	r3, #0
 23e:	bf28      	it	cs
 240:	4619      	movcs	r1, r3
 242:	2f00      	cmp	r7, #0
 244:	bfa8      	it	ge
 246:	2000      	movge	r0, #0
 248:	2a40      	cmp	r2, #64	; 0x40
 24a:	bf28      	it	cs
 24c:	4618      	movcs	r0, r3
 24e:	e024      	b.n	29a <__floatuntidf+0x29a>
__floatuntidf():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:155
 250:	004b      	lsls	r3, r1, #1
 252:	0052      	lsls	r2, r2, #1
 254:	ea43 73d0 	orr.w	r3, r3, r0, lsr #31
 258:	ea42 72d1 	orr.w	r2, r2, r1, lsr #31
 25c:	0040      	lsls	r0, r0, #1
 25e:	4619      	mov	r1, r3
 260:	f3c0 0380 	ubfx	r3, r0, #2, #1
 264:	2703      	movs	r7, #3
 266:	4318      	orrs	r0, r3
 268:	241d      	movs	r4, #29
 26a:	3001      	adds	r0, #1
 26c:	f151 0300 	adcs.w	r3, r1, #0
 270:	f152 0100 	adcs.w	r1, r2, #0
 274:	f413 0200 	ands.w	r2, r3, #8388608	; 0x800000
 278:	bf08      	it	eq
 27a:	2702      	moveq	r7, #2
 27c:	43bc      	bics	r4, r7
 27e:	0049      	lsls	r1, r1, #1
 280:	f087 061f 	eor.w	r6, r7, #31
 284:	fa23 f507 	lsr.w	r5, r3, r7
 288:	40a1      	lsls	r1, r4
 28a:	005b      	lsls	r3, r3, #1
 28c:	40f8      	lsrs	r0, r7
 28e:	40b3      	lsls	r3, r6
 290:	4329      	orrs	r1, r5
 292:	4318      	orrs	r0, r3
 294:	2a00      	cmp	r2, #0
 296:	bf08      	it	eq
 298:	46e6      	moveq	lr, ip
 29a:	f20e 32ff 	addw	r2, lr, #1023	; 0x3ff
from_parts():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mod.rs:123
 29e:	f36f 511f 	bfc	r1, #20, #12
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mod.rs:121
 2a2:	f362 511e 	bfi	r1, r2, #20, #11
__floatuntidf():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
 2a6:	b002      	add	sp, #8
 2a8:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}

Disassembly of section .text.__fixsfsi:

00000000 <__fixsfsi>:
__fixsfsi():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:219
   0:	f000 42ff 	and.w	r2, r0, #2139095040	; 0x7f800000
   4:	f3c0 51c7 	ubfx	r1, r0, #23, #8
   8:	f1b2 5f7e 	cmp.w	r2, #1065353216	; 0x3f800000
   c:	bf3e      	ittt	cc
   e:	2100      	movcc	r1, #0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:216
  10:	4608      	movcc	r0, r1
  12:	4770      	bxcc	lr
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:219
  14:	f1a1 037f 	sub.w	r3, r1, #127	; 0x7f
  18:	2b1e      	cmp	r3, #30
  1a:	d908      	bls.n	2e <__fixsfsi+0x2e>
  1c:	f04f 4100 	mov.w	r1, #2147483648	; 0x80000000
  20:	f1b0 3fff 	cmp.w	r0, #4294967295	; 0xffffffff
  24:	bfc8      	it	gt
  26:	f06f 4100 	mvngt.w	r1, #2147483648	; 0x80000000
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:216
  2a:	4608      	mov	r0, r1
  2c:	4770      	bx	lr
  2e:	f04f 0c01 	mov.w	ip, #1
  32:	4602      	mov	r2, r0
  34:	f36c 52df 	bfi	r2, ip, #23, #9
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:219
  38:	2b16      	cmp	r3, #22
  3a:	d806      	bhi.n	4a <__fixsfsi+0x4a>
  3c:	f1c1 0116 	rsb	r1, r1, #22
  40:	f001 011f 	and.w	r1, r1, #31
  44:	fa22 f101 	lsr.w	r1, r2, r1
  48:	e004      	b.n	54 <__fixsfsi+0x54>
  4a:	310a      	adds	r1, #10
  4c:	f001 011f 	and.w	r1, r1, #31
  50:	fa02 f101 	lsl.w	r1, r2, r1
  54:	f1b0 3fff 	cmp.w	r0, #4294967295	; 0xffffffff
  58:	bfd8      	it	le
  5a:	4249      	negle	r1, r1
  5c:	4608      	mov	r0, r1
  5e:	4770      	bx	lr

Disassembly of section .text.__aeabi_f2iz:

00000000 <__aeabi_f2iz>:
__aeabi_f2iz():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:219
   0:	f000 42ff 	and.w	r2, r0, #2139095040	; 0x7f800000
   4:	f3c0 51c7 	ubfx	r1, r0, #23, #8
   8:	f1b2 5f7e 	cmp.w	r2, #1065353216	; 0x3f800000
   c:	bf3e      	ittt	cc
   e:	2100      	movcc	r1, #0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
  10:	4608      	movcc	r0, r1
  12:	4770      	bxcc	lr
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:219
  14:	f1a1 037f 	sub.w	r3, r1, #127	; 0x7f
  18:	2b1f      	cmp	r3, #31
  1a:	d308      	bcc.n	2e <__aeabi_f2iz+0x2e>
  1c:	f04f 4100 	mov.w	r1, #2147483648	; 0x80000000
  20:	f1b0 3fff 	cmp.w	r0, #4294967295	; 0xffffffff
  24:	bfc8      	it	gt
  26:	f06f 4100 	mvngt.w	r1, #2147483648	; 0x80000000
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
  2a:	4608      	mov	r0, r1
  2c:	4770      	bx	lr
  2e:	f04f 0c01 	mov.w	ip, #1
  32:	4602      	mov	r2, r0
  34:	f36c 52df 	bfi	r2, ip, #23, #9
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:219
  38:	2b16      	cmp	r3, #22
  3a:	d806      	bhi.n	4a <__aeabi_f2iz+0x4a>
  3c:	f1c1 0116 	rsb	r1, r1, #22
  40:	f001 011f 	and.w	r1, r1, #31
  44:	fa22 f101 	lsr.w	r1, r2, r1
  48:	e004      	b.n	54 <__aeabi_f2iz+0x54>
  4a:	310a      	adds	r1, #10
  4c:	f001 011f 	and.w	r1, r1, #31
  50:	fa02 f101 	lsl.w	r1, r2, r1
  54:	f1b0 3fff 	cmp.w	r0, #4294967295	; 0xffffffff
  58:	bfd8      	it	le
  5a:	4249      	negle	r1, r1
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
  5c:	4608      	mov	r0, r1
  5e:	4770      	bx	lr

Disassembly of section .text.__fixsfdi:

00000000 <__fixsfdi>:
__fixsfdi():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:224
   0:	f000 42ff 	and.w	r2, r0, #2139095040	; 0x7f800000
   4:	f3c0 51c7 	ubfx	r1, r0, #23, #8
   8:	f1b2 5f7e 	cmp.w	r2, #1065353216	; 0x3f800000
   c:	bf3e      	ittt	cc
   e:	2000      	movcc	r0, #0
  10:	2100      	movcc	r1, #0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:216
  12:	4770      	bxcc	lr
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:224
  14:	f1a1 037f 	sub.w	r3, r1, #127	; 0x7f
  18:	2b3e      	cmp	r3, #62	; 0x3e
  1a:	d90c      	bls.n	36 <__fixsfdi+0x36>
  1c:	f1b0 3fff 	cmp.w	r0, #4294967295	; 0xffffffff
  20:	f04f 4100 	mov.w	r1, #2147483648	; 0x80000000
  24:	f04f 0000 	mov.w	r0, #0
  28:	bfc8      	it	gt
  2a:	f06f 4100 	mvngt.w	r1, #2147483648	; 0x80000000
  2e:	bfc8      	it	gt
  30:	f04f 30ff 	movgt.w	r0, #4294967295	; 0xffffffff
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:216
  34:	4770      	bx	lr
  36:	f04f 0c01 	mov.w	ip, #1
  3a:	4602      	mov	r2, r0
  3c:	f36c 52df 	bfi	r2, ip, #23, #9
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:224
  40:	2b16      	cmp	r3, #22
  42:	d808      	bhi.n	56 <__fixsfdi+0x56>
  44:	f1c1 0116 	rsb	r1, r1, #22
  48:	f04f 0c00 	mov.w	ip, #0
  4c:	f001 011f 	and.w	r1, r1, #31
  50:	fa22 f301 	lsr.w	r3, r2, r1
  54:	e014      	b.n	80 <__fixsfdi+0x80>
  56:	b580      	push	{r7, lr}
  58:	312a      	adds	r1, #42	; 0x2a
  5a:	f001 013f 	and.w	r1, r1, #63	; 0x3f
  5e:	f1c1 0320 	rsb	r3, r1, #32
  62:	f1a1 0e20 	sub.w	lr, r1, #32
  66:	f1be 0f00 	cmp.w	lr, #0
  6a:	fa22 fc03 	lsr.w	ip, r2, r3
  6e:	fa02 f301 	lsl.w	r3, r2, r1
  72:	bfa8      	it	ge
  74:	fa02 fc0e 	lslge.w	ip, r2, lr
  78:	bfa8      	it	ge
  7a:	2300      	movge	r3, #0
  7c:	e8bd 4080 	ldmia.w	sp!, {r7, lr}
  80:	2100      	movs	r1, #0
wrapping_add():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:1006
  82:	425a      	negs	r2, r3
  84:	eb61 010c 	sbc.w	r1, r1, ip
__fixsfdi():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:224
  88:	f1b0 3fff 	cmp.w	r0, #4294967295	; 0xffffffff
  8c:	bfc4      	itt	gt
  8e:	461a      	movgt	r2, r3
  90:	4661      	movgt	r1, ip
  92:	4610      	mov	r0, r2
  94:	4770      	bx	lr

Disassembly of section .text.__aeabi_f2lz:

00000000 <__aeabi_f2lz>:
__aeabi_f2lz():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:224
   0:	f000 42ff 	and.w	r2, r0, #2139095040	; 0x7f800000
   4:	f3c0 51c7 	ubfx	r1, r0, #23, #8
   8:	f1b2 5f7e 	cmp.w	r2, #1065353216	; 0x3f800000
   c:	bf3f      	itttt	cc
   e:	2200      	movcc	r2, #0
  10:	2100      	movcc	r1, #0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
  12:	4610      	movcc	r0, r2
  14:	4770      	bxcc	lr
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:224
  16:	f1a1 037f 	sub.w	r3, r1, #127	; 0x7f
  1a:	2b3f      	cmp	r3, #63	; 0x3f
  1c:	d30c      	bcc.n	38 <__aeabi_f2lz+0x38>
  1e:	f04f 4100 	mov.w	r1, #2147483648	; 0x80000000
  22:	2200      	movs	r2, #0
  24:	f1b0 3fff 	cmp.w	r0, #4294967295	; 0xffffffff
  28:	bfc8      	it	gt
  2a:	f06f 4100 	mvngt.w	r1, #2147483648	; 0x80000000
  2e:	bfc8      	it	gt
  30:	f04f 32ff 	movgt.w	r2, #4294967295	; 0xffffffff
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
  34:	4610      	mov	r0, r2
  36:	4770      	bx	lr
  38:	f04f 0c01 	mov.w	ip, #1
  3c:	4602      	mov	r2, r0
  3e:	f36c 52df 	bfi	r2, ip, #23, #9
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:224
  42:	2b16      	cmp	r3, #22
  44:	d808      	bhi.n	58 <__aeabi_f2lz+0x58>
  46:	f1c1 0116 	rsb	r1, r1, #22
  4a:	f04f 0c00 	mov.w	ip, #0
  4e:	f001 011f 	and.w	r1, r1, #31
  52:	fa22 f301 	lsr.w	r3, r2, r1
  56:	e014      	b.n	82 <__aeabi_f2lz+0x82>
  58:	b580      	push	{r7, lr}
  5a:	312a      	adds	r1, #42	; 0x2a
  5c:	f001 013f 	and.w	r1, r1, #63	; 0x3f
  60:	f1c1 0320 	rsb	r3, r1, #32
  64:	f1a1 0e20 	sub.w	lr, r1, #32
  68:	f1be 0f00 	cmp.w	lr, #0
  6c:	fa22 fc03 	lsr.w	ip, r2, r3
  70:	fa02 f301 	lsl.w	r3, r2, r1
  74:	bfa8      	it	ge
  76:	fa02 fc0e 	lslge.w	ip, r2, lr
  7a:	bfa8      	it	ge
  7c:	2300      	movge	r3, #0
  7e:	e8bd 4080 	ldmia.w	sp!, {r7, lr}
  82:	2100      	movs	r1, #0
wrapping_add():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:1006
  84:	425a      	negs	r2, r3
  86:	eb61 010c 	sbc.w	r1, r1, ip
__aeabi_f2lz():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:224
  8a:	f1b0 3fff 	cmp.w	r0, #4294967295	; 0xffffffff
  8e:	bfc4      	itt	gt
  90:	461a      	movgt	r2, r3
  92:	4661      	movgt	r1, ip
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
  94:	4610      	mov	r0, r2
  96:	4770      	bx	lr

Disassembly of section .text.__fixsfti:

00000000 <__fixsfti>:
__fixsfti():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:229
   0:	f000 41ff 	and.w	r1, r0, #2139095040	; 0x7f800000
   4:	f3c0 52c7 	ubfx	r2, r0, #23, #8
   8:	f1b1 5f7e 	cmp.w	r1, #1065353216	; 0x3f800000
   c:	d202      	bcs.n	14 <__fixsfti+0x14>
   e:	2000      	movs	r0, #0
  10:	2300      	movs	r3, #0
  12:	e00f      	b.n	34 <__fixsfti+0x34>
  14:	f1a2 037f 	sub.w	r3, r2, #127	; 0x7f
  18:	2b7e      	cmp	r3, #126	; 0x7e
  1a:	d90e      	bls.n	3a <__fixsfti+0x3a>
  1c:	f1b0 3fff 	cmp.w	r0, #4294967295	; 0xffffffff
  20:	f04f 4300 	mov.w	r3, #2147483648	; 0x80000000
  24:	f04f 0000 	mov.w	r0, #0
  28:	bfc8      	it	gt
  2a:	f06f 4300 	mvngt.w	r3, #2147483648	; 0x80000000
  2e:	bfc8      	it	gt
  30:	f04f 30ff 	movgt.w	r0, #4294967295	; 0xffffffff
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
  34:	4601      	mov	r1, r0
  36:	4602      	mov	r2, r0
  38:	4770      	bx	lr
  3a:	b5f0      	push	{r4, r5, r6, r7, lr}
  3c:	2601      	movs	r6, #1
  3e:	4601      	mov	r1, r0
  40:	f366 51df 	bfi	r1, r6, #23, #9
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:229
  44:	2b16      	cmp	r3, #22
  46:	d80a      	bhi.n	5e <__fixsfti+0x5e>
  48:	f1c2 0216 	rsb	r2, r2, #22
  4c:	f04f 0e00 	mov.w	lr, #0
  50:	f002 021f 	and.w	r2, r2, #31
  54:	2500      	movs	r5, #0
  56:	2400      	movs	r4, #0
  58:	fa21 f602 	lsr.w	r6, r1, r2
  5c:	e042      	b.n	e4 <__fixsfti+0xe4>
  5e:	326a      	adds	r2, #106	; 0x6a
  60:	f04f 0c00 	mov.w	ip, #0
  64:	f002 027f 	and.w	r2, r2, #127	; 0x7f
  68:	f1c2 0520 	rsb	r5, r2, #32
  6c:	f1a2 0320 	sub.w	r3, r2, #32
  70:	f1c2 0460 	rsb	r4, r2, #96	; 0x60
  74:	2b00      	cmp	r3, #0
  76:	fa21 fe05 	lsr.w	lr, r1, r5
  7a:	f1a2 0660 	sub.w	r6, r2, #96	; 0x60
  7e:	bfa8      	it	ge
  80:	fa01 fe03 	lslge.w	lr, r1, r3
  84:	2a40      	cmp	r2, #64	; 0x40
  86:	bf28      	it	cs
  88:	46e6      	movcs	lr, ip
  8a:	fa21 f704 	lsr.w	r7, r1, r4
  8e:	2e00      	cmp	r6, #0
  90:	bfa8      	it	ge
  92:	fa01 f706 	lslge.w	r7, r1, r6
  96:	2d00      	cmp	r5, #0
  98:	f04f 0400 	mov.w	r4, #0
  9c:	bfa8      	it	ge
  9e:	2400      	movge	r4, #0
  a0:	2a40      	cmp	r2, #64	; 0x40
  a2:	bf28      	it	cs
  a4:	463c      	movcs	r4, r7
  a6:	f1c2 0740 	rsb	r7, r2, #64	; 0x40
  aa:	2a00      	cmp	r2, #0
  ac:	bf08      	it	eq
  ae:	4614      	moveq	r4, r2
  b0:	2d00      	cmp	r5, #0
  b2:	f1a2 0540 	sub.w	r5, r2, #64	; 0x40
  b6:	fa21 f707 	lsr.w	r7, r1, r7
  ba:	bfa8      	it	ge
  bc:	2700      	movge	r7, #0
  be:	2e00      	cmp	r6, #0
  c0:	fa01 f505 	lsl.w	r5, r1, r5
  c4:	fa01 f602 	lsl.w	r6, r1, r2
  c8:	bfa8      	it	ge
  ca:	2500      	movge	r5, #0
  cc:	2a40      	cmp	r2, #64	; 0x40
  ce:	bf38      	it	cc
  d0:	463d      	movcc	r5, r7
  d2:	2a00      	cmp	r2, #0
  d4:	bf08      	it	eq
  d6:	4615      	moveq	r5, r2
  d8:	2b00      	cmp	r3, #0
  da:	bfa8      	it	ge
  dc:	2600      	movge	r6, #0
  de:	2a40      	cmp	r2, #64	; 0x40
  e0:	bf28      	it	cs
  e2:	4666      	movcs	r6, ip
wrapping_add():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:1006
  e4:	f1d6 0c00 	rsbs	ip, r6, #0
  e8:	f04f 0300 	mov.w	r3, #0
  ec:	eb73 010e 	sbcs.w	r1, r3, lr
  f0:	eb73 0205 	sbcs.w	r2, r3, r5
  f4:	41a3      	sbcs	r3, r4
__fixsfti():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:229
  f6:	f1b0 3fff 	cmp.w	r0, #4294967295	; 0xffffffff
  fa:	bfc1      	itttt	gt
  fc:	46b4      	movgt	ip, r6
  fe:	4671      	movgt	r1, lr
 100:	462a      	movgt	r2, r5
 102:	4623      	movgt	r3, r4
 104:	4660      	mov	r0, ip
 106:	bdf0      	pop	{r4, r5, r6, r7, pc}

Disassembly of section .text.__fixdfsi:

00000000 <__fixdfsi>:
__fixdfsi():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:234
   0:	f3c1 520a 	ubfx	r2, r1, #20, #11
   4:	f240 33ff 	movw	r3, #1023	; 0x3ff
   8:	429a      	cmp	r2, r3
   a:	bf3c      	itt	cc
   c:	2000      	movcc	r0, #0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:216
   e:	4770      	bxcc	lr
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:234
  10:	f2a2 32ff 	subw	r2, r2, #1023	; 0x3ff
  14:	2a1e      	cmp	r2, #30
  16:	d907      	bls.n	28 <__fixdfsi+0x28>
  18:	f04f 4000 	mov.w	r0, #2147483648	; 0x80000000
  1c:	f1b1 3fff 	cmp.w	r1, #4294967295	; 0xffffffff
  20:	bfc8      	it	gt
  22:	f06f 4000 	mvngt.w	r0, #2147483648	; 0x80000000
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:216
  26:	4770      	bx	lr
  28:	2201      	movs	r2, #1
  2a:	460b      	mov	r3, r1
  2c:	f362 531f 	bfi	r3, r2, #20, #12
  30:	0d0a      	lsrs	r2, r1, #20
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:234
  32:	f1c2 0233 	rsb	r2, r2, #51	; 0x33
  36:	f002 023f 	and.w	r2, r2, #63	; 0x3f
  3a:	fa20 fc02 	lsr.w	ip, r0, r2
  3e:	f1c2 0020 	rsb	r0, r2, #32
  42:	3a20      	subs	r2, #32
  44:	fa03 f000 	lsl.w	r0, r3, r0
  48:	2a00      	cmp	r2, #0
  4a:	ea40 000c 	orr.w	r0, r0, ip
  4e:	bfa8      	it	ge
  50:	fa23 f002 	lsrge.w	r0, r3, r2
  54:	f1b1 3fff 	cmp.w	r1, #4294967295	; 0xffffffff
  58:	bfd8      	it	le
  5a:	4240      	negle	r0, r0
  5c:	4770      	bx	lr

Disassembly of section .text.__aeabi_d2iz:

00000000 <__aeabi_d2iz>:
__aeabi_d2iz():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:234
   0:	f3c1 520a 	ubfx	r2, r1, #20, #11
   4:	f240 33ff 	movw	r3, #1023	; 0x3ff
   8:	429a      	cmp	r2, r3
   a:	bf3c      	itt	cc
   c:	2000      	movcc	r0, #0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
   e:	4770      	bxcc	lr
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:234
  10:	f2a2 32ff 	subw	r2, r2, #1023	; 0x3ff
  14:	2a1f      	cmp	r2, #31
  16:	d307      	bcc.n	28 <__aeabi_d2iz+0x28>
  18:	f04f 4000 	mov.w	r0, #2147483648	; 0x80000000
  1c:	f1b1 3fff 	cmp.w	r1, #4294967295	; 0xffffffff
  20:	bfc8      	it	gt
  22:	f06f 4000 	mvngt.w	r0, #2147483648	; 0x80000000
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
  26:	4770      	bx	lr
  28:	2201      	movs	r2, #1
  2a:	460b      	mov	r3, r1
  2c:	f362 531f 	bfi	r3, r2, #20, #12
  30:	0d0a      	lsrs	r2, r1, #20
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:234
  32:	f1c2 0233 	rsb	r2, r2, #51	; 0x33
  36:	f002 023f 	and.w	r2, r2, #63	; 0x3f
  3a:	fa20 fc02 	lsr.w	ip, r0, r2
  3e:	f1c2 0020 	rsb	r0, r2, #32
  42:	3a20      	subs	r2, #32
  44:	fa03 f000 	lsl.w	r0, r3, r0
  48:	2a00      	cmp	r2, #0
  4a:	ea40 000c 	orr.w	r0, r0, ip
  4e:	bfa8      	it	ge
  50:	fa23 f002 	lsrge.w	r0, r3, r2
  54:	f1b1 3fff 	cmp.w	r1, #4294967295	; 0xffffffff
  58:	bfd8      	it	le
  5a:	4240      	negle	r0, r0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
  5c:	4770      	bx	lr

Disassembly of section .text.__fixdfdi:

00000000 <__fixdfdi>:
__fixdfdi():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:214
   0:	b570      	push	{r4, r5, r6, lr}
   2:	2300      	movs	r3, #0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:239
   4:	f1b3 0e01 	subs.w	lr, r3, #1
   8:	f04f 4200 	mov.w	r2, #2147483648	; 0x80000000
   c:	f162 4c00 	sbc.w	ip, r2, #2147483648	; 0x80000000
  10:	f3c1 540a 	ubfx	r4, r1, #20, #11
  14:	f240 35ff 	movw	r5, #1023	; 0x3ff
  18:	42ac      	cmp	r4, r5
  1a:	d201      	bcs.n	20 <__fixdfdi+0x20>
  1c:	2200      	movs	r2, #0
  1e:	e011      	b.n	44 <__fixdfdi+0x44>
  20:	f2a4 33ff 	subw	r3, r4, #1023	; 0x3ff
  24:	2b3e      	cmp	r3, #62	; 0x3e
  26:	d910      	bls.n	4a <__fixdfdi+0x4a>
  28:	ebbe 0000 	subs.w	r0, lr, r0
  2c:	f04f 0300 	mov.w	r3, #0
  30:	eb7c 0001 	sbcs.w	r0, ip, r1
  34:	bfb8      	it	lt
  36:	2301      	movlt	r3, #1
  38:	2b00      	cmp	r3, #0
  3a:	bf1c      	itt	ne
  3c:	f06f 4200 	mvnne.w	r2, #2147483648	; 0x80000000
  40:	f04f 33ff 	movne.w	r3, #4294967295	; 0xffffffff
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:216
  44:	4618      	mov	r0, r3
  46:	4611      	mov	r1, r2
  48:	bd70      	pop	{r4, r5, r6, pc}
  4a:	2401      	movs	r4, #1
  4c:	460a      	mov	r2, r1
  4e:	f364 521f 	bfi	r2, r4, #20, #12
  52:	0d0c      	lsrs	r4, r1, #20
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:239
  54:	2b33      	cmp	r3, #51	; 0x33
  56:	d815      	bhi.n	84 <__fixdfdi+0x84>
  58:	f1c4 0333 	rsb	r3, r4, #51	; 0x33
  5c:	f003 033f 	and.w	r3, r3, #63	; 0x3f
  60:	f1c3 0520 	rsb	r5, r3, #32
  64:	fa20 f403 	lsr.w	r4, r0, r3
  68:	fa02 f505 	lsl.w	r5, r2, r5
  6c:	432c      	orrs	r4, r5
  6e:	f1a3 0520 	sub.w	r5, r3, #32
  72:	2d00      	cmp	r5, #0
  74:	bfa8      	it	ge
  76:	fa22 f405 	lsrge.w	r4, r2, r5
  7a:	fa22 f503 	lsr.w	r5, r2, r3
  7e:	bfa8      	it	ge
  80:	2500      	movge	r5, #0
  82:	e014      	b.n	ae <__fixdfdi+0xae>
  84:	f104 030d 	add.w	r3, r4, #13
  88:	f003 033f 	and.w	r3, r3, #63	; 0x3f
  8c:	f1c3 0420 	rsb	r4, r3, #32
  90:	409a      	lsls	r2, r3
  92:	fa20 f404 	lsr.w	r4, r0, r4
  96:	ea44 0502 	orr.w	r5, r4, r2
  9a:	f1a3 0220 	sub.w	r2, r3, #32
  9e:	fa00 f403 	lsl.w	r4, r0, r3
  a2:	2a00      	cmp	r2, #0
  a4:	bfa8      	it	ge
  a6:	fa00 f502 	lslge.w	r5, r0, r2
  aa:	bfa8      	it	ge
  ac:	2400      	movge	r4, #0
wrapping_add():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:1006
  ae:	4262      	negs	r2, r4
  b0:	f04f 0600 	mov.w	r6, #0
  b4:	eb66 0305 	sbc.w	r3, r6, r5
__fixdfdi():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:239
  b8:	ebbe 0000 	subs.w	r0, lr, r0
  bc:	eb7c 0001 	sbcs.w	r0, ip, r1
  c0:	bfb8      	it	lt
  c2:	2601      	movlt	r6, #1
  c4:	2e00      	cmp	r6, #0
  c6:	bf1c      	itt	ne
  c8:	462b      	movne	r3, r5
  ca:	4622      	movne	r2, r4
  cc:	4610      	mov	r0, r2
  ce:	4619      	mov	r1, r3
  d0:	bd70      	pop	{r4, r5, r6, pc}

Disassembly of section .text.__aeabi_d2lz:

00000000 <__aeabi_d2lz>:
__aeabi_d2lz():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:254
   0:	b570      	push	{r4, r5, r6, lr}
   2:	2300      	movs	r3, #0
__fixdfdi():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:239
   4:	f1b3 0e01 	subs.w	lr, r3, #1
   8:	f04f 4200 	mov.w	r2, #2147483648	; 0x80000000
   c:	f162 4c00 	sbc.w	ip, r2, #2147483648	; 0x80000000
  10:	f3c1 540a 	ubfx	r4, r1, #20, #11
  14:	f240 35ff 	movw	r5, #1023	; 0x3ff
  18:	42ac      	cmp	r4, r5
  1a:	d201      	bcs.n	20 <__aeabi_d2lz+0x20>
  1c:	2200      	movs	r2, #0
  1e:	e053      	b.n	c8 <__aeabi_d2lz+0xc8>
  20:	f2a4 33ff 	subw	r3, r4, #1023	; 0x3ff
  24:	2b3f      	cmp	r3, #63	; 0x3f
  26:	d30e      	bcc.n	46 <__aeabi_d2lz+0x46>
  28:	ebbe 0000 	subs.w	r0, lr, r0
  2c:	f04f 0300 	mov.w	r3, #0
  30:	eb7c 0001 	sbcs.w	r0, ip, r1
  34:	bfb8      	it	lt
  36:	2301      	movlt	r3, #1
  38:	2b00      	cmp	r3, #0
  3a:	bf1c      	itt	ne
  3c:	f06f 4200 	mvnne.w	r2, #2147483648	; 0x80000000
  40:	f04f 33ff 	movne.w	r3, #4294967295	; 0xffffffff
  44:	e040      	b.n	c8 <__aeabi_d2lz+0xc8>
  46:	2401      	movs	r4, #1
  48:	460a      	mov	r2, r1
  4a:	f364 521f 	bfi	r2, r4, #20, #12
  4e:	0d0c      	lsrs	r4, r1, #20
  50:	2b33      	cmp	r3, #51	; 0x33
  52:	d815      	bhi.n	80 <__aeabi_d2lz+0x80>
  54:	f1c4 0333 	rsb	r3, r4, #51	; 0x33
  58:	f003 033f 	and.w	r3, r3, #63	; 0x3f
  5c:	f1c3 0520 	rsb	r5, r3, #32
  60:	fa20 f403 	lsr.w	r4, r0, r3
  64:	fa02 f505 	lsl.w	r5, r2, r5
  68:	432c      	orrs	r4, r5
  6a:	f1a3 0520 	sub.w	r5, r3, #32
  6e:	2d00      	cmp	r5, #0
  70:	bfa8      	it	ge
  72:	fa22 f405 	lsrge.w	r4, r2, r5
  76:	fa22 f503 	lsr.w	r5, r2, r3
  7a:	bfa8      	it	ge
  7c:	2500      	movge	r5, #0
  7e:	e014      	b.n	aa <__aeabi_d2lz+0xaa>
  80:	f104 030d 	add.w	r3, r4, #13
  84:	f003 033f 	and.w	r3, r3, #63	; 0x3f
  88:	f1c3 0420 	rsb	r4, r3, #32
  8c:	409a      	lsls	r2, r3
  8e:	fa20 f404 	lsr.w	r4, r0, r4
  92:	ea44 0502 	orr.w	r5, r4, r2
  96:	f1a3 0220 	sub.w	r2, r3, #32
  9a:	fa00 f403 	lsl.w	r4, r0, r3
  9e:	2a00      	cmp	r2, #0
  a0:	bfa8      	it	ge
  a2:	fa00 f502 	lslge.w	r5, r0, r2
  a6:	bfa8      	it	ge
  a8:	2400      	movge	r4, #0
wrapping_add():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:1006
  aa:	4263      	negs	r3, r4
  ac:	f04f 0600 	mov.w	r6, #0
  b0:	eb66 0205 	sbc.w	r2, r6, r5
__fixdfdi():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:239
  b4:	ebbe 0000 	subs.w	r0, lr, r0
  b8:	eb7c 0001 	sbcs.w	r0, ip, r1
  bc:	bfb8      	it	lt
  be:	2601      	movlt	r6, #1
  c0:	2e00      	cmp	r6, #0
  c2:	bf1c      	itt	ne
  c4:	462a      	movne	r2, r5
  c6:	4623      	movne	r3, r4
__aeabi_d2lz():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
  c8:	4618      	mov	r0, r3
  ca:	4611      	mov	r1, r2
  cc:	bd70      	pop	{r4, r5, r6, pc}

Disassembly of section .text.__fixdfti:

00000000 <__fixdfti>:
__fixdfti():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:244
   0:	f3c1 520a 	ubfx	r2, r1, #20, #11
   4:	f240 33ff 	movw	r3, #1023	; 0x3ff
   8:	429a      	cmp	r2, r3
   a:	d202      	bcs.n	12 <__fixdfti+0x12>
   c:	2000      	movs	r0, #0
   e:	2300      	movs	r3, #0
  10:	e00e      	b.n	30 <__fixdfti+0x30>
  12:	f2a2 33ff 	subw	r3, r2, #1023	; 0x3ff
  16:	2b7e      	cmp	r3, #126	; 0x7e
  18:	d90d      	bls.n	36 <__fixdfti+0x36>
  1a:	f04f 4300 	mov.w	r3, #2147483648	; 0x80000000
  1e:	2000      	movs	r0, #0
  20:	f1b1 3fff 	cmp.w	r1, #4294967295	; 0xffffffff
  24:	bfc8      	it	gt
  26:	f06f 4300 	mvngt.w	r3, #2147483648	; 0x80000000
  2a:	bfc8      	it	gt
  2c:	f04f 30ff 	movgt.w	r0, #4294967295	; 0xffffffff
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
  30:	4601      	mov	r1, r0
  32:	4602      	mov	r2, r0
  34:	4770      	bx	lr
  36:	e92d 47f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
  3a:	2701      	movs	r7, #1
  3c:	460a      	mov	r2, r1
  3e:	f367 521f 	bfi	r2, r7, #20, #12
  42:	0d0f      	lsrs	r7, r1, #20
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:244
  44:	2b33      	cmp	r3, #51	; 0x33
  46:	d817      	bhi.n	78 <__fixdfti+0x78>
  48:	f1c7 0333 	rsb	r3, r7, #51	; 0x33
  4c:	2500      	movs	r5, #0
  4e:	f003 033f 	and.w	r3, r3, #63	; 0x3f
  52:	2400      	movs	r4, #0
  54:	f1c3 0720 	rsb	r7, r3, #32
  58:	40d8      	lsrs	r0, r3
  5a:	fa22 fe03 	lsr.w	lr, r2, r3
  5e:	fa02 f707 	lsl.w	r7, r2, r7
  62:	4307      	orrs	r7, r0
  64:	f1a3 0020 	sub.w	r0, r3, #32
  68:	2800      	cmp	r0, #0
  6a:	bfa8      	it	ge
  6c:	fa22 f700 	lsrge.w	r7, r2, r0
  70:	bfa8      	it	ge
  72:	f04f 0e00 	movge.w	lr, #0
  76:	e055      	b.n	124 <__fixdfti+0x124>
  78:	f107 034d 	add.w	r3, r7, #77	; 0x4d
  7c:	f04f 0c00 	mov.w	ip, #0
  80:	f003 037f 	and.w	r3, r3, #127	; 0x7f
  84:	f1c3 0a20 	rsb	sl, r3, #32
  88:	f1a3 0820 	sub.w	r8, r3, #32
  8c:	f1a3 0940 	sub.w	r9, r3, #64	; 0x40
  90:	fa02 f703 	lsl.w	r7, r2, r3
  94:	fa20 f60a 	lsr.w	r6, r0, sl
  98:	ea46 0e07 	orr.w	lr, r6, r7
  9c:	f1c3 0660 	rsb	r6, r3, #96	; 0x60
  a0:	f1b8 0f00 	cmp.w	r8, #0
  a4:	f1c3 0540 	rsb	r5, r3, #64	; 0x40
  a8:	bfa8      	it	ge
  aa:	fa00 fe08 	lslge.w	lr, r0, r8
  ae:	2b40      	cmp	r3, #64	; 0x40
  b0:	fa02 f409 	lsl.w	r4, r2, r9
  b4:	fa20 f606 	lsr.w	r6, r0, r6
  b8:	f1a3 0760 	sub.w	r7, r3, #96	; 0x60
  bc:	bf28      	it	cs
  be:	46e6      	movcs	lr, ip
  c0:	4326      	orrs	r6, r4
  c2:	2f00      	cmp	r7, #0
  c4:	fa22 f405 	lsr.w	r4, r2, r5
  c8:	bfa8      	it	ge
  ca:	fa00 f607 	lslge.w	r6, r0, r7
  ce:	f1ba 0f00 	cmp.w	sl, #0
  d2:	bfa8      	it	ge
  d4:	2400      	movge	r4, #0
  d6:	2b40      	cmp	r3, #64	; 0x40
  d8:	bf28      	it	cs
  da:	4634      	movcs	r4, r6
  dc:	fa20 f605 	lsr.w	r6, r0, r5
  e0:	f1c5 0520 	rsb	r5, r5, #32
  e4:	2b00      	cmp	r3, #0
  e6:	bf08      	it	eq
  e8:	461c      	moveq	r4, r3
  ea:	f1ba 0f00 	cmp.w	sl, #0
  ee:	fa02 f505 	lsl.w	r5, r2, r5
  f2:	ea46 0605 	orr.w	r6, r6, r5
  f6:	bfa8      	it	ge
  f8:	fa22 f60a 	lsrge.w	r6, r2, sl
  fc:	2f00      	cmp	r7, #0
  fe:	fa00 f509 	lsl.w	r5, r0, r9
 102:	fa00 f703 	lsl.w	r7, r0, r3
 106:	bfa8      	it	ge
 108:	2500      	movge	r5, #0
 10a:	2b40      	cmp	r3, #64	; 0x40
 10c:	bf38      	it	cc
 10e:	4635      	movcc	r5, r6
 110:	2b00      	cmp	r3, #0
 112:	bf08      	it	eq
 114:	461d      	moveq	r5, r3
 116:	f1b8 0f00 	cmp.w	r8, #0
 11a:	bfa8      	it	ge
 11c:	2700      	movge	r7, #0
 11e:	2b40      	cmp	r3, #64	; 0x40
 120:	bf28      	it	cs
 122:	4667      	movcs	r7, ip
wrapping_add():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:1006
 124:	4278      	negs	r0, r7
 126:	f04f 0300 	mov.w	r3, #0
 12a:	eb73 0c0e 	sbcs.w	ip, r3, lr
 12e:	eb73 0205 	sbcs.w	r2, r3, r5
 132:	41a3      	sbcs	r3, r4
__fixdfti():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:244
 134:	f1b1 3fff 	cmp.w	r1, #4294967295	; 0xffffffff
 138:	bfc1      	itttt	gt
 13a:	4638      	movgt	r0, r7
 13c:	46f4      	movgt	ip, lr
 13e:	462a      	movgt	r2, r5
 140:	4623      	movgt	r3, r4
 142:	4661      	mov	r1, ip
 144:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}

Disassembly of section .text.__fixunssfsi:

00000000 <__fixunssfsi>:
__fixunssfsi():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:249
   0:	f3c0 52c7 	ubfx	r2, r0, #23, #8
   4:	2100      	movs	r1, #0
   6:	2800      	cmp	r0, #0
   8:	db1f      	blt.n	4a <__fixunssfsi+0x4a>
   a:	f000 43ff 	and.w	r3, r0, #2139095040	; 0x7f800000
   e:	f1b3 5f7e 	cmp.w	r3, #1065353216	; 0x3f800000
  12:	d31a      	bcc.n	4a <__fixunssfsi+0x4a>
  14:	f1a2 017f 	sub.w	r1, r2, #127	; 0x7f
  18:	291f      	cmp	r1, #31
  1a:	bf82      	ittt	hi
  1c:	ea6f 71d0 	mvnhi.w	r1, r0, lsr #31
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:216
  20:	4608      	movhi	r0, r1
  22:	4770      	bxhi	lr
  24:	2301      	movs	r3, #1
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:249
  26:	2916      	cmp	r1, #22
  28:	f363 50df 	bfi	r0, r3, #23, #9
  2c:	d807      	bhi.n	3e <__fixunssfsi+0x3e>
  2e:	f1c2 0116 	rsb	r1, r2, #22
  32:	f001 011f 	and.w	r1, r1, #31
  36:	fa20 f101 	lsr.w	r1, r0, r1
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:216
  3a:	4608      	mov	r0, r1
  3c:	4770      	bx	lr
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:249
  3e:	f102 010a 	add.w	r1, r2, #10
  42:	f001 011f 	and.w	r1, r1, #31
  46:	fa00 f101 	lsl.w	r1, r0, r1
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:216
  4a:	4608      	mov	r0, r1
  4c:	4770      	bx	lr

Disassembly of section .text.__aeabi_f2uiz:

00000000 <__aeabi_f2uiz>:
__aeabi_f2uiz():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:249
   0:	f3c0 52c7 	ubfx	r2, r0, #23, #8
   4:	2100      	movs	r1, #0
   6:	2800      	cmp	r0, #0
   8:	db1f      	blt.n	4a <__aeabi_f2uiz+0x4a>
   a:	f000 43ff 	and.w	r3, r0, #2139095040	; 0x7f800000
   e:	f1b3 5f7e 	cmp.w	r3, #1065353216	; 0x3f800000
  12:	d31a      	bcc.n	4a <__aeabi_f2uiz+0x4a>
  14:	f1a2 017f 	sub.w	r1, r2, #127	; 0x7f
  18:	2920      	cmp	r1, #32
  1a:	bf22      	ittt	cs
  1c:	ea6f 71d0 	mvncs.w	r1, r0, lsr #31
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
  20:	4608      	movcs	r0, r1
  22:	4770      	bxcs	lr
  24:	2301      	movs	r3, #1
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:249
  26:	2916      	cmp	r1, #22
  28:	f363 50df 	bfi	r0, r3, #23, #9
  2c:	d807      	bhi.n	3e <__aeabi_f2uiz+0x3e>
  2e:	f1c2 0116 	rsb	r1, r2, #22
  32:	f001 011f 	and.w	r1, r1, #31
  36:	fa20 f101 	lsr.w	r1, r0, r1
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
  3a:	4608      	mov	r0, r1
  3c:	4770      	bx	lr
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:249
  3e:	f102 010a 	add.w	r1, r2, #10
  42:	f001 011f 	and.w	r1, r1, #31
  46:	fa00 f101 	lsl.w	r1, r0, r1
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
  4a:	4608      	mov	r0, r1
  4c:	4770      	bx	lr

Disassembly of section .text.__fixunssfdi:

00000000 <__fixunssfdi>:
__fixunssfdi():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:214
   0:	4602      	mov	r2, r0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:254
   2:	f3c0 53c7 	ubfx	r3, r0, #23, #8
   6:	2000      	movs	r0, #0
   8:	2a00      	cmp	r2, #0
   a:	bfbc      	itt	lt
   c:	2100      	movlt	r1, #0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:216
   e:	4770      	bxlt	lr
  10:	f002 41ff 	and.w	r1, r2, #2139095040	; 0x7f800000
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:254
  14:	f1b1 5f7e 	cmp.w	r1, #1065353216	; 0x3f800000
  18:	f04f 0100 	mov.w	r1, #0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:216
  1c:	bf38      	it	cc
  1e:	4770      	bxcc	lr
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:254
  20:	f1a3 007f 	sub.w	r0, r3, #127	; 0x7f
  24:	283f      	cmp	r0, #63	; 0x3f
  26:	bf82      	ittt	hi
  28:	ea6f 70d2 	mvnhi.w	r0, r2, lsr #31
  2c:	f04f 31ff 	movhi.w	r1, #4294967295	; 0xffffffff
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:216
  30:	4770      	bxhi	lr
  32:	2101      	movs	r1, #1
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:254
  34:	2816      	cmp	r0, #22
  36:	f361 52df 	bfi	r2, r1, #23, #9
  3a:	d807      	bhi.n	4c <__fixunssfdi+0x4c>
  3c:	f1c3 0016 	rsb	r0, r3, #22
  40:	2100      	movs	r1, #0
  42:	f000 001f 	and.w	r0, r0, #31
  46:	fa22 f000 	lsr.w	r0, r2, r0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:216
  4a:	4770      	bx	lr
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:254
  4c:	f103 002a 	add.w	r0, r3, #42	; 0x2a
  50:	f000 003f 	and.w	r0, r0, #63	; 0x3f
  54:	f1c0 0120 	rsb	r1, r0, #32
  58:	f1a0 0320 	sub.w	r3, r0, #32
  5c:	fa02 f000 	lsl.w	r0, r2, r0
  60:	2b00      	cmp	r3, #0
  62:	fa22 f101 	lsr.w	r1, r2, r1
  66:	bfa8      	it	ge
  68:	fa02 f103 	lslge.w	r1, r2, r3
  6c:	bfa8      	it	ge
  6e:	2000      	movge	r0, #0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:216
  70:	4770      	bx	lr

Disassembly of section .text.__aeabi_f2ulz:

00000000 <__aeabi_f2ulz>:
__aeabi_f2ulz():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:254
   0:	4602      	mov	r2, r0
__fixunssfdi():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:254
   2:	f3c0 53c7 	ubfx	r3, r0, #23, #8
   6:	2000      	movs	r0, #0
   8:	2a00      	cmp	r2, #0
   a:	bfbc      	itt	lt
   c:	2100      	movlt	r1, #0
__aeabi_f2ulz():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
   e:	4770      	bxlt	lr
__fixunssfdi():
  10:	f002 41ff 	and.w	r1, r2, #2139095040	; 0x7f800000
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:254
  14:	f1b1 5f7e 	cmp.w	r1, #1065353216	; 0x3f800000
  18:	f04f 0100 	mov.w	r1, #0
__aeabi_f2ulz():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
  1c:	bf38      	it	cc
  1e:	4770      	bxcc	lr
__fixunssfdi():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:254
  20:	f1a3 007f 	sub.w	r0, r3, #127	; 0x7f
  24:	2840      	cmp	r0, #64	; 0x40
  26:	bf22      	ittt	cs
  28:	ea6f 70d2 	mvncs.w	r0, r2, lsr #31
  2c:	f04f 31ff 	movcs.w	r1, #4294967295	; 0xffffffff
__aeabi_f2ulz():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
  30:	4770      	bxcs	lr
  32:	2101      	movs	r1, #1
__fixunssfdi():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:254
  34:	2816      	cmp	r0, #22
  36:	f361 52df 	bfi	r2, r1, #23, #9
  3a:	d807      	bhi.n	4c <__aeabi_f2ulz+0x4c>
  3c:	f1c3 0016 	rsb	r0, r3, #22
  40:	2100      	movs	r1, #0
  42:	f000 001f 	and.w	r0, r0, #31
  46:	fa22 f000 	lsr.w	r0, r2, r0
__aeabi_f2ulz():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
  4a:	4770      	bx	lr
__fixunssfdi():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:254
  4c:	f103 002a 	add.w	r0, r3, #42	; 0x2a
  50:	f000 003f 	and.w	r0, r0, #63	; 0x3f
  54:	f1c0 0120 	rsb	r1, r0, #32
  58:	f1a0 0320 	sub.w	r3, r0, #32
  5c:	fa02 f000 	lsl.w	r0, r2, r0
  60:	2b00      	cmp	r3, #0
  62:	fa22 f101 	lsr.w	r1, r2, r1
  66:	bfa8      	it	ge
  68:	fa02 f103 	lslge.w	r1, r2, r3
  6c:	bfa8      	it	ge
  6e:	2000      	movge	r0, #0
__aeabi_f2ulz():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
  70:	4770      	bx	lr

Disassembly of section .text.__fixunssfti:

00000000 <__fixunssfti>:
__fixunssfti():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:254
   0:	b5f0      	push	{r4, r5, r6, r7, lr}
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:259
   2:	f3c0 55c7 	ubfx	r5, r0, #23, #8
   6:	f04f 0c00 	mov.w	ip, #0
   a:	2800      	cmp	r0, #0
   c:	db22      	blt.n	54 <__fixunssfti+0x54>
   e:	f000 41ff 	and.w	r1, r0, #2139095040	; 0x7f800000
  12:	2200      	movs	r2, #0
  14:	f1b1 5f7e 	cmp.w	r1, #1065353216	; 0x3f800000
  18:	f04f 0100 	mov.w	r1, #0
  1c:	f04f 0300 	mov.w	r3, #0
  20:	d367      	bcc.n	f2 <__fixunssfti+0xf2>
  22:	f1a5 017f 	sub.w	r1, r5, #127	; 0x7f
  26:	297f      	cmp	r1, #127	; 0x7f
  28:	d909      	bls.n	3e <__fixunssfti+0x3e>
  2a:	ea6f 7cd0 	mvn.w	ip, r0, lsr #31
  2e:	f04f 31ff 	mov.w	r1, #4294967295	; 0xffffffff
  32:	f04f 32ff 	mov.w	r2, #4294967295	; 0xffffffff
  36:	f04f 33ff 	mov.w	r3, #4294967295	; 0xffffffff
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
  3a:	4660      	mov	r0, ip
  3c:	bdf0      	pop	{r4, r5, r6, r7, pc}
  3e:	2201      	movs	r2, #1
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:259
  40:	2916      	cmp	r1, #22
  42:	f362 50df 	bfi	r0, r2, #23, #9
  46:	d80a      	bhi.n	5e <__fixunssfti+0x5e>
  48:	f1c5 0116 	rsb	r1, r5, #22
  4c:	f001 011f 	and.w	r1, r1, #31
  50:	fa20 fc01 	lsr.w	ip, r0, r1
  54:	2100      	movs	r1, #0
  56:	2200      	movs	r2, #0
  58:	2300      	movs	r3, #0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
  5a:	4660      	mov	r0, ip
  5c:	bdf0      	pop	{r4, r5, r6, r7, pc}
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:259
  5e:	f105 016a 	add.w	r1, r5, #106	; 0x6a
  62:	2700      	movs	r7, #0
  64:	f001 0e7f 	and.w	lr, r1, #127	; 0x7f
  68:	f1ce 0220 	rsb	r2, lr, #32
  6c:	f1ae 0420 	sub.w	r4, lr, #32
  70:	f1ce 0360 	rsb	r3, lr, #96	; 0x60
  74:	2c00      	cmp	r4, #0
  76:	fa20 f102 	lsr.w	r1, r0, r2
  7a:	f1ae 0560 	sub.w	r5, lr, #96	; 0x60
  7e:	bfa8      	it	ge
  80:	fa00 f104 	lslge.w	r1, r0, r4
  84:	f1be 0f40 	cmp.w	lr, #64	; 0x40
  88:	bf28      	it	cs
  8a:	4639      	movcs	r1, r7
  8c:	fa20 f603 	lsr.w	r6, r0, r3
  90:	2d00      	cmp	r5, #0
  92:	bfa8      	it	ge
  94:	fa00 f605 	lslge.w	r6, r0, r5
  98:	2a00      	cmp	r2, #0
  9a:	f04f 0300 	mov.w	r3, #0
  9e:	bfa8      	it	ge
  a0:	2300      	movge	r3, #0
  a2:	f1be 0f40 	cmp.w	lr, #64	; 0x40
  a6:	bf28      	it	cs
  a8:	4633      	movcs	r3, r6
  aa:	f1ce 0640 	rsb	r6, lr, #64	; 0x40
  ae:	f1be 0f00 	cmp.w	lr, #0
  b2:	bf08      	it	eq
  b4:	4673      	moveq	r3, lr
  b6:	2a00      	cmp	r2, #0
  b8:	f1ae 0240 	sub.w	r2, lr, #64	; 0x40
  bc:	fa20 f606 	lsr.w	r6, r0, r6
  c0:	fa00 fc0e 	lsl.w	ip, r0, lr
  c4:	bfa8      	it	ge
  c6:	2600      	movge	r6, #0
  c8:	fa00 f202 	lsl.w	r2, r0, r2
  cc:	2d00      	cmp	r5, #0
  ce:	bfa8      	it	ge
  d0:	2200      	movge	r2, #0
  d2:	f1be 0f40 	cmp.w	lr, #64	; 0x40
  d6:	bf38      	it	cc
  d8:	4632      	movcc	r2, r6
  da:	f1be 0f00 	cmp.w	lr, #0
  de:	bf08      	it	eq
  e0:	4672      	moveq	r2, lr
  e2:	2c00      	cmp	r4, #0
  e4:	bfa8      	it	ge
  e6:	f04f 0c00 	movge.w	ip, #0
  ea:	f1be 0f40 	cmp.w	lr, #64	; 0x40
  ee:	bf28      	it	cs
  f0:	46bc      	movcs	ip, r7
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
  f2:	4660      	mov	r0, ip
  f4:	bdf0      	pop	{r4, r5, r6, r7, pc}

Disassembly of section .text.__fixunsdfsi:

00000000 <__fixunsdfsi>:
__fixunsdfsi():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:214
   0:	4684      	mov	ip, r0
   2:	2000      	movs	r0, #0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:264
   4:	2900      	cmp	r1, #0
   6:	f3c1 530a 	ubfx	r3, r1, #20, #11
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:216
   a:	bfb8      	it	lt
   c:	4770      	bxlt	lr
   e:	f240 32ff 	movw	r2, #1023	; 0x3ff
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:264
  12:	4293      	cmp	r3, r2
  14:	d31a      	bcc.n	4c <__fixunsdfsi+0x4c>
  16:	f2a3 30ff 	subw	r0, r3, #1023	; 0x3ff
  1a:	281f      	cmp	r0, #31
  1c:	bf84      	itt	hi
  1e:	ea6f 70d1 	mvnhi.w	r0, r1, lsr #31
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:216
  22:	4770      	bxhi	lr
  24:	2001      	movs	r0, #1
  26:	0d0a      	lsrs	r2, r1, #20
  28:	f360 511f 	bfi	r1, r0, #20, #12
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:264
  2c:	f1c2 0033 	rsb	r0, r2, #51	; 0x33
  30:	f000 023f 	and.w	r2, r0, #63	; 0x3f
  34:	f1c2 0320 	rsb	r3, r2, #32
  38:	fa2c f002 	lsr.w	r0, ip, r2
  3c:	3a20      	subs	r2, #32
  3e:	fa01 f303 	lsl.w	r3, r1, r3
  42:	4318      	orrs	r0, r3
  44:	2a00      	cmp	r2, #0
  46:	bfa8      	it	ge
  48:	fa21 f002 	lsrge.w	r0, r1, r2
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:216
  4c:	4770      	bx	lr

Disassembly of section .text.__aeabi_d2uiz:

00000000 <__aeabi_d2uiz>:
__aeabi_d2uiz():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:254
   0:	4684      	mov	ip, r0
   2:	2000      	movs	r0, #0
__fixunsdfsi():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:264
   4:	2900      	cmp	r1, #0
   6:	f3c1 530a 	ubfx	r3, r1, #20, #11
__aeabi_d2uiz():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
   a:	bfb8      	it	lt
   c:	4770      	bxlt	lr
   e:	f240 32ff 	movw	r2, #1023	; 0x3ff
__fixunsdfsi():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:264
  12:	4293      	cmp	r3, r2
  14:	d31a      	bcc.n	4c <__aeabi_d2uiz+0x4c>
  16:	f2a3 30ff 	subw	r0, r3, #1023	; 0x3ff
  1a:	2820      	cmp	r0, #32
  1c:	bf24      	itt	cs
  1e:	ea6f 70d1 	mvncs.w	r0, r1, lsr #31
__aeabi_d2uiz():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
  22:	4770      	bxcs	lr
  24:	2001      	movs	r0, #1
  26:	0d0a      	lsrs	r2, r1, #20
  28:	f360 511f 	bfi	r1, r0, #20, #12
__fixunsdfsi():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:264
  2c:	f1c2 0033 	rsb	r0, r2, #51	; 0x33
  30:	f000 023f 	and.w	r2, r0, #63	; 0x3f
  34:	f1c2 0320 	rsb	r3, r2, #32
  38:	fa2c f002 	lsr.w	r0, ip, r2
  3c:	3a20      	subs	r2, #32
  3e:	fa01 f303 	lsl.w	r3, r1, r3
  42:	4318      	orrs	r0, r3
  44:	2a00      	cmp	r2, #0
  46:	bfa8      	it	ge
  48:	fa21 f002 	lsrge.w	r0, r1, r2
__aeabi_d2uiz():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
  4c:	4770      	bx	lr

Disassembly of section .text.__fixunsdfdi:

00000000 <__fixunsdfdi>:
__fixunsdfdi():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:214
   0:	4684      	mov	ip, r0
   2:	2000      	movs	r0, #0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:269
   4:	2900      	cmp	r1, #0
   6:	f3c1 520a 	ubfx	r2, r1, #20, #11
   a:	bfbe      	ittt	lt
   c:	2300      	movlt	r3, #0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:216
   e:	4619      	movlt	r1, r3
  10:	4770      	bxlt	lr
  12:	f240 33ff 	movw	r3, #1023	; 0x3ff
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:269
  16:	429a      	cmp	r2, r3
  18:	f04f 0300 	mov.w	r3, #0
  1c:	d33b      	bcc.n	96 <__fixunsdfdi+0x96>
  1e:	f2a2 30ff 	subw	r0, r2, #1023	; 0x3ff
  22:	283f      	cmp	r0, #63	; 0x3f
  24:	bf81      	itttt	hi
  26:	ea6f 70d1 	mvnhi.w	r0, r1, lsr #31
  2a:	f04f 33ff 	movhi.w	r3, #4294967295	; 0xffffffff
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:216
  2e:	4619      	movhi	r1, r3
  30:	4770      	bxhi	lr
  32:	2301      	movs	r3, #1
  34:	0d0a      	lsrs	r2, r1, #20
  36:	f363 511f 	bfi	r1, r3, #20, #12
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:269
  3a:	2833      	cmp	r0, #51	; 0x33
  3c:	d816      	bhi.n	6c <__fixunsdfdi+0x6c>
  3e:	f1c2 0033 	rsb	r0, r2, #51	; 0x33
  42:	f000 023f 	and.w	r2, r0, #63	; 0x3f
  46:	f1c2 0320 	rsb	r3, r2, #32
  4a:	fa2c f002 	lsr.w	r0, ip, r2
  4e:	fa01 f303 	lsl.w	r3, r1, r3
  52:	4318      	orrs	r0, r3
  54:	f1a2 0320 	sub.w	r3, r2, #32
  58:	2b00      	cmp	r3, #0
  5a:	bfa8      	it	ge
  5c:	fa21 f003 	lsrge.w	r0, r1, r3
  60:	fa21 f302 	lsr.w	r3, r1, r2
  64:	bfa8      	it	ge
  66:	2300      	movge	r3, #0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:216
  68:	4619      	mov	r1, r3
  6a:	4770      	bx	lr
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:269
  6c:	f102 000d 	add.w	r0, r2, #13
  70:	f000 003f 	and.w	r0, r0, #63	; 0x3f
  74:	f1c0 0220 	rsb	r2, r0, #32
  78:	4081      	lsls	r1, r0
  7a:	fa2c f202 	lsr.w	r2, ip, r2
  7e:	ea42 0301 	orr.w	r3, r2, r1
  82:	f1a0 0120 	sub.w	r1, r0, #32
  86:	fa0c f000 	lsl.w	r0, ip, r0
  8a:	2900      	cmp	r1, #0
  8c:	bfa8      	it	ge
  8e:	fa0c f301 	lslge.w	r3, ip, r1
  92:	bfa8      	it	ge
  94:	2000      	movge	r0, #0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:216
  96:	4619      	mov	r1, r3
  98:	4770      	bx	lr

Disassembly of section .text.__aeabi_d2ulz:

00000000 <__aeabi_d2ulz>:
__aeabi_d2ulz():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:254
   0:	4684      	mov	ip, r0
   2:	2000      	movs	r0, #0
__fixunsdfdi():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:269
   4:	2900      	cmp	r1, #0
   6:	f3c1 520a 	ubfx	r2, r1, #20, #11
   a:	bfbe      	ittt	lt
   c:	2300      	movlt	r3, #0
__aeabi_d2ulz():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
   e:	4619      	movlt	r1, r3
  10:	4770      	bxlt	lr
  12:	f240 33ff 	movw	r3, #1023	; 0x3ff
__fixunsdfdi():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:269
  16:	429a      	cmp	r2, r3
  18:	f04f 0300 	mov.w	r3, #0
  1c:	d33b      	bcc.n	96 <__aeabi_d2ulz+0x96>
  1e:	f2a2 30ff 	subw	r0, r2, #1023	; 0x3ff
  22:	2840      	cmp	r0, #64	; 0x40
  24:	bf21      	itttt	cs
  26:	ea6f 70d1 	mvncs.w	r0, r1, lsr #31
  2a:	f04f 33ff 	movcs.w	r3, #4294967295	; 0xffffffff
__aeabi_d2ulz():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
  2e:	4619      	movcs	r1, r3
  30:	4770      	bxcs	lr
  32:	2301      	movs	r3, #1
  34:	0d0a      	lsrs	r2, r1, #20
  36:	f363 511f 	bfi	r1, r3, #20, #12
__fixunsdfdi():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:269
  3a:	2833      	cmp	r0, #51	; 0x33
  3c:	d816      	bhi.n	6c <__aeabi_d2ulz+0x6c>
  3e:	f1c2 0033 	rsb	r0, r2, #51	; 0x33
  42:	f000 023f 	and.w	r2, r0, #63	; 0x3f
  46:	f1c2 0320 	rsb	r3, r2, #32
  4a:	fa2c f002 	lsr.w	r0, ip, r2
  4e:	fa01 f303 	lsl.w	r3, r1, r3
  52:	4318      	orrs	r0, r3
  54:	f1a2 0320 	sub.w	r3, r2, #32
  58:	2b00      	cmp	r3, #0
  5a:	bfa8      	it	ge
  5c:	fa21 f003 	lsrge.w	r0, r1, r3
  60:	fa21 f302 	lsr.w	r3, r1, r2
  64:	bfa8      	it	ge
  66:	2300      	movge	r3, #0
__aeabi_d2ulz():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
  68:	4619      	mov	r1, r3
  6a:	4770      	bx	lr
__fixunsdfdi():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:269
  6c:	f102 000d 	add.w	r0, r2, #13
  70:	f000 003f 	and.w	r0, r0, #63	; 0x3f
  74:	f1c0 0220 	rsb	r2, r0, #32
  78:	4081      	lsls	r1, r0
  7a:	fa2c f202 	lsr.w	r2, ip, r2
  7e:	ea42 0301 	orr.w	r3, r2, r1
  82:	f1a0 0120 	sub.w	r1, r0, #32
  86:	fa0c f000 	lsl.w	r0, ip, r0
  8a:	2900      	cmp	r1, #0
  8c:	bfa8      	it	ge
  8e:	fa0c f301 	lslge.w	r3, ip, r1
  92:	bfa8      	it	ge
  94:	2000      	movge	r0, #0
__aeabi_d2ulz():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
  96:	4619      	mov	r1, r3
  98:	4770      	bx	lr

Disassembly of section .text.__fixunsdfti:

00000000 <__fixunsdfti>:
__fixunsdfti():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:254
   0:	e92d 43f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, lr}
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:274
   4:	f3c1 540a 	ubfx	r4, r1, #20, #11
   8:	f04f 0c00 	mov.w	ip, #0
   c:	2900      	cmp	r1, #0
   e:	db1a      	blt.n	46 <__fixunsdfti+0x46>
  10:	468e      	mov	lr, r1
  12:	f240 31ff 	movw	r1, #1023	; 0x3ff
  16:	428c      	cmp	r4, r1
  18:	f04f 0100 	mov.w	r1, #0
  1c:	f04f 0200 	mov.w	r2, #0
  20:	f04f 0300 	mov.w	r3, #0
  24:	f0c0 8086 	bcc.w	134 <__fixunsdfti+0x134>
  28:	f2a4 31ff 	subw	r1, r4, #1023	; 0x3ff
  2c:	297f      	cmp	r1, #127	; 0x7f
  2e:	d90c      	bls.n	4a <__fixunsdfti+0x4a>
  30:	ea6f 7cde 	mvn.w	ip, lr, lsr #31
  34:	f04f 31ff 	mov.w	r1, #4294967295	; 0xffffffff
  38:	f04f 32ff 	mov.w	r2, #4294967295	; 0xffffffff
  3c:	f04f 33ff 	mov.w	r3, #4294967295	; 0xffffffff
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
  40:	4660      	mov	r0, ip
  42:	e8bd 83f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, pc}
  46:	2100      	movs	r1, #0
  48:	e01b      	b.n	82 <__fixunsdfti+0x82>
  4a:	2301      	movs	r3, #1
  4c:	ea4f 521e 	mov.w	r2, lr, lsr #20
  50:	f363 5e1f 	bfi	lr, r3, #20, #12
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:274
  54:	2933      	cmp	r1, #51	; 0x33
  56:	d819      	bhi.n	8c <__fixunsdfti+0x8c>
  58:	f1c2 0133 	rsb	r1, r2, #51	; 0x33
  5c:	f001 013f 	and.w	r1, r1, #63	; 0x3f
  60:	f1c1 0220 	rsb	r2, r1, #32
  64:	40c8      	lsrs	r0, r1
  66:	fa0e f202 	lsl.w	r2, lr, r2
  6a:	ea40 0c02 	orr.w	ip, r0, r2
  6e:	f1a1 0020 	sub.w	r0, r1, #32
  72:	fa2e f101 	lsr.w	r1, lr, r1
  76:	2800      	cmp	r0, #0
  78:	bfa8      	it	ge
  7a:	fa2e fc00 	lsrge.w	ip, lr, r0
  7e:	bfa8      	it	ge
  80:	2100      	movge	r1, #0
  82:	2200      	movs	r2, #0
  84:	2300      	movs	r3, #0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
  86:	4660      	mov	r0, ip
  88:	e8bd 83f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, pc}
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/conv.rs:274
  8c:	f102 014d 	add.w	r1, r2, #77	; 0x4d
  90:	f04f 0800 	mov.w	r8, #0
  94:	f001 047f 	and.w	r4, r1, #127	; 0x7f
  98:	f1c4 0220 	rsb	r2, r4, #32
  9c:	f1c4 0760 	rsb	r7, r4, #96	; 0x60
  a0:	f1a4 0920 	sub.w	r9, r4, #32
  a4:	fa0e f104 	lsl.w	r1, lr, r4
  a8:	f1a4 0c40 	sub.w	ip, r4, #64	; 0x40
  ac:	fa20 f302 	lsr.w	r3, r0, r2
  b0:	4319      	orrs	r1, r3
  b2:	f1b9 0f00 	cmp.w	r9, #0
  b6:	f1c4 0540 	rsb	r5, r4, #64	; 0x40
  ba:	bfa8      	it	ge
  bc:	fa00 f109 	lslge.w	r1, r0, r9
  c0:	2c40      	cmp	r4, #64	; 0x40
  c2:	fa0e f30c 	lsl.w	r3, lr, ip
  c6:	fa20 f707 	lsr.w	r7, r0, r7
  ca:	f1a4 0660 	sub.w	r6, r4, #96	; 0x60
  ce:	bf28      	it	cs
  d0:	4641      	movcs	r1, r8
  d2:	431f      	orrs	r7, r3
  d4:	2e00      	cmp	r6, #0
  d6:	fa2e f305 	lsr.w	r3, lr, r5
  da:	bfa8      	it	ge
  dc:	fa00 f706 	lslge.w	r7, r0, r6
  e0:	2a00      	cmp	r2, #0
  e2:	bfa8      	it	ge
  e4:	2300      	movge	r3, #0
  e6:	2c40      	cmp	r4, #64	; 0x40
  e8:	bf28      	it	cs
  ea:	463b      	movcs	r3, r7
  ec:	fa20 f705 	lsr.w	r7, r0, r5
  f0:	f1c5 0520 	rsb	r5, r5, #32
  f4:	2c00      	cmp	r4, #0
  f6:	bf08      	it	eq
  f8:	4623      	moveq	r3, r4
  fa:	2a00      	cmp	r2, #0
  fc:	fa0e f505 	lsl.w	r5, lr, r5
 100:	ea45 0507 	orr.w	r5, r5, r7
 104:	bfa8      	it	ge
 106:	fa2e f502 	lsrge.w	r5, lr, r2
 10a:	fa00 f20c 	lsl.w	r2, r0, ip
 10e:	2e00      	cmp	r6, #0
 110:	bfa8      	it	ge
 112:	2200      	movge	r2, #0
 114:	2c40      	cmp	r4, #64	; 0x40
 116:	bf38      	it	cc
 118:	462a      	movcc	r2, r5
 11a:	2c00      	cmp	r4, #0
 11c:	fa00 fc04 	lsl.w	ip, r0, r4
 120:	bf08      	it	eq
 122:	4622      	moveq	r2, r4
 124:	f1b9 0f00 	cmp.w	r9, #0
 128:	bfa8      	it	ge
 12a:	f04f 0c00 	movge.w	ip, #0
 12e:	2c40      	cmp	r4, #64	; 0x40
 130:	bf28      	it	cs
 132:	46c4      	movcs	ip, r8
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
 134:	4660      	mov	r0, ip
 136:	e8bd 83f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, pc}

Disassembly of section .text.__gesf2:

00000000 <__gesf2>:
__gesf2():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:135
   0:	f020 4300 	bic.w	r3, r0, #2147483648	; 0x80000000
   4:	4684      	mov	ip, r0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/cmp.rs:55
   6:	f1b3 4fff 	cmp.w	r3, #2139095040	; 0x7f800000
   a:	f04f 30ff 	mov.w	r0, #4294967295	; 0xffffffff
   e:	bf9c      	itt	ls
  10:	f021 4200 	bicls.w	r2, r1, #2147483648	; 0x80000000
  14:	f1b2 4fff 	cmpls.w	r2, #2139095040	; 0x7f800000
  18:	d900      	bls.n	1c <__gesf2+0x1c>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
  1a:	4770      	bx	lr
bitor():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:219
  1c:	ea52 0003 	orrs.w	r0, r2, r3
  20:	bf04      	itt	eq
  22:	2000      	moveq	r0, #0
__gesf2():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
  24:	4770      	bxeq	lr
bitand():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:135
  26:	ea01 000c 	and.w	r0, r1, ip
__gesf2():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/cmp.rs:69
  2a:	2800      	cmp	r0, #0
  2c:	db09      	blt.n	42 <__gesf2+0x42>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/cmp.rs:70
  2e:	458c      	cmp	ip, r1
  30:	bfbc      	itt	lt
  32:	f04f 30ff 	movlt.w	r0, #4294967295	; 0xffffffff
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
  36:	4770      	bxlt	lr
eq():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/cmp.rs:894
  38:	ebbc 0001 	subs.w	r0, ip, r1
  3c:	bf18      	it	ne
  3e:	2001      	movne	r0, #1
  40:	4770      	bx	lr
__gesf2():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/cmp.rs:84
  42:	458c      	cmp	ip, r1
  44:	bfc4      	itt	gt
  46:	f04f 30ff 	movgt.w	r0, #4294967295	; 0xffffffff
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
  4a:	4770      	bxgt	lr
eq():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/cmp.rs:894
  4c:	ebbc 0001 	subs.w	r0, ip, r1
  50:	bf18      	it	ne
  52:	2001      	movne	r0, #1
__gesf2():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
  54:	4770      	bx	lr

Disassembly of section .text.__unordsf2:

00000000 <__unordsf2>:
__unordsf2():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:135
   0:	f021 4100 	bic.w	r1, r1, #2147483648	; 0x80000000
   4:	2200      	movs	r2, #0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/cmp.rs:111
   6:	f1b1 4fff 	cmp.w	r1, #2139095040	; 0x7f800000
   a:	f04f 0100 	mov.w	r1, #0
bitand():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:135
   e:	f020 4000 	bic.w	r0, r0, #2147483648	; 0x80000000
__unordsf2():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/cmp.rs:111
  12:	bf88      	it	hi
  14:	2101      	movhi	r1, #1
gt():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/cmp.rs:980
  16:	f1b0 4fff 	cmp.w	r0, #2139095040	; 0x7f800000
  1a:	bf88      	it	hi
  1c:	2201      	movhi	r2, #1
__unordsf2():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/cmp.rs:111
  1e:	ea42 0001 	orr.w	r0, r2, r1
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:216
  22:	4770      	bx	lr

Disassembly of section .text.__aeabi_fcmpun:

00000000 <__aeabi_fcmpun>:
__aeabi_fcmpun():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:135
   0:	f021 4100 	bic.w	r1, r1, #2147483648	; 0x80000000
   4:	2200      	movs	r2, #0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/cmp.rs:111
   6:	f1b1 4fff 	cmp.w	r1, #2139095040	; 0x7f800000
   a:	f04f 0100 	mov.w	r1, #0
bitand():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:135
   e:	f020 4000 	bic.w	r0, r0, #2147483648	; 0x80000000
__aeabi_fcmpun():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/cmp.rs:111
  12:	bf88      	it	hi
  14:	2101      	movhi	r1, #1
gt():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/cmp.rs:980
  16:	f1b0 4fff 	cmp.w	r0, #2139095040	; 0x7f800000
  1a:	bf88      	it	hi
  1c:	2201      	movhi	r2, #1
__aeabi_fcmpun():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/cmp.rs:111
  1e:	ea42 0001 	orr.w	r0, r2, r1
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
  22:	4770      	bx	lr

Disassembly of section .text.__eqsf2:

00000000 <__eqsf2>:
__eqsf2():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:135
   0:	f020 4300 	bic.w	r3, r0, #2147483648	; 0x80000000
   4:	4684      	mov	ip, r0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/cmp.rs:55
   6:	f1b3 4fff 	cmp.w	r3, #2139095040	; 0x7f800000
   a:	f04f 0001 	mov.w	r0, #1
   e:	bf9c      	itt	ls
  10:	f021 4200 	bicls.w	r2, r1, #2147483648	; 0x80000000
  14:	f1b2 4fff 	cmpls.w	r2, #2139095040	; 0x7f800000
  18:	d900      	bls.n	1c <__eqsf2+0x1c>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
  1a:	4770      	bx	lr
bitor():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:219
  1c:	ea52 0003 	orrs.w	r0, r2, r3
  20:	bf04      	itt	eq
  22:	2000      	moveq	r0, #0
__eqsf2():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
  24:	4770      	bxeq	lr
bitand():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:135
  26:	ea01 000c 	and.w	r0, r1, ip
__eqsf2():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/cmp.rs:69
  2a:	2800      	cmp	r0, #0
  2c:	db09      	blt.n	42 <__eqsf2+0x42>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/cmp.rs:70
  2e:	458c      	cmp	ip, r1
  30:	bfbc      	itt	lt
  32:	f04f 30ff 	movlt.w	r0, #4294967295	; 0xffffffff
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
  36:	4770      	bxlt	lr
eq():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/cmp.rs:894
  38:	ebbc 0001 	subs.w	r0, ip, r1
  3c:	bf18      	it	ne
  3e:	2001      	movne	r0, #1
  40:	4770      	bx	lr
__eqsf2():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/cmp.rs:84
  42:	458c      	cmp	ip, r1
  44:	bfc4      	itt	gt
  46:	f04f 30ff 	movgt.w	r0, #4294967295	; 0xffffffff
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
  4a:	4770      	bxgt	lr
eq():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/cmp.rs:894
  4c:	ebbc 0001 	subs.w	r0, ip, r1
  50:	bf18      	it	ne
  52:	2001      	movne	r0, #1
__eqsf2():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
  54:	4770      	bx	lr

Disassembly of section .text.__gedf2:

00000000 <__gedf2>:
__gedf2():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:254
   0:	b570      	push	{r4, r5, r6, lr}
   2:	2500      	movs	r5, #0
bitand():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:135
   4:	f021 4e00 	bic.w	lr, r1, #2147483648	; 0x80000000
gt():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/cmp.rs:980
   8:	4244      	negs	r4, r0
   a:	f6c7 75f0 	movt	r5, #32752	; 0x7ff0
   e:	f04f 3cff 	mov.w	ip, #4294967295	; 0xffffffff
  12:	eb75 040e 	sbcs.w	r4, r5, lr
cmp<f64>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/cmp.rs:55
  16:	d32b      	bcc.n	70 <__gedf2+0x70>
  18:	f023 4400 	bic.w	r4, r3, #2147483648	; 0x80000000
  1c:	4256      	negs	r6, r2
  1e:	41a5      	sbcs	r5, r4
  20:	d326      	bcc.n	70 <__gedf2+0x70>
bitor():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:219
  22:	ea42 0600 	orr.w	r6, r2, r0
  26:	ea44 050e 	orr.w	r5, r4, lr
eq():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/cmp.rs:894
  2a:	432e      	orrs	r6, r5
cmp<f64>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/cmp.rs:60
  2c:	d00d      	beq.n	4a <__gedf2+0x4a>
bitand():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:135
  2e:	ea03 0601 	and.w	r6, r3, r1
cmp<f64>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/cmp.rs:69
  32:	2e00      	cmp	r6, #0
  34:	db0d      	blt.n	52 <__gedf2+0x52>
lt():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/cmp.rs:974
  36:	1a86      	subs	r6, r0, r2
  38:	eb71 0603 	sbcs.w	r6, r1, r3
cmp<f64>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/cmp.rs:70
  3c:	db0d      	blt.n	5a <__gedf2+0x5a>
eq():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/cmp.rs:894
  3e:	4050      	eors	r0, r2
  40:	4059      	eors	r1, r3
  42:	4308      	orrs	r0, r1
  44:	bf18      	it	ne
  46:	2001      	movne	r0, #1
  48:	bd70      	pop	{r4, r5, r6, pc}
__gedf2():
  4a:	f04f 0c00 	mov.w	ip, #0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
  4e:	4660      	mov	r0, ip
  50:	bd70      	pop	{r4, r5, r6, pc}
gt():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/cmp.rs:980
  52:	1a16      	subs	r6, r2, r0
  54:	eb73 0601 	sbcs.w	r6, r3, r1
cmp<f64>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/cmp.rs:84
  58:	da03      	bge.n	62 <__gedf2+0x62>
__gedf2():
  5a:	f04f 3cff 	mov.w	ip, #4294967295	; 0xffffffff
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
  5e:	4660      	mov	r0, ip
  60:	bd70      	pop	{r4, r5, r6, pc}
eq():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/cmp.rs:894
  62:	4050      	eors	r0, r2
  64:	4059      	eors	r1, r3
  66:	ea50 0c01 	orrs.w	ip, r0, r1
  6a:	bf18      	it	ne
  6c:	f04f 0c01 	movne.w	ip, #1
__gedf2():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
  70:	4660      	mov	r0, ip
  72:	bd70      	pop	{r4, r5, r6, pc}

Disassembly of section .text.__unorddf2:

00000000 <__unorddf2>:
__unorddf2():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:214
   0:	b580      	push	{r7, lr}
   2:	f240 0e00 	movw	lr, #0
bitand():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:135
   6:	f023 4c00 	bic.w	ip, r3, #2147483648	; 0x80000000
unord<f64>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/cmp.rs:111
   a:	4252      	negs	r2, r2
   c:	f6c7 7ef0 	movt	lr, #32752	; 0x7ff0
  10:	eb7e 020c 	sbcs.w	r2, lr, ip
bitand():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:135
  14:	f021 4100 	bic.w	r1, r1, #2147483648	; 0x80000000
unord<f64>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/cmp.rs:111
  18:	f04f 0200 	mov.w	r2, #0
  1c:	f04f 0300 	mov.w	r3, #0
  20:	bf38      	it	cc
  22:	2201      	movcc	r2, #1
gt():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/cmp.rs:980
  24:	4240      	negs	r0, r0
  26:	eb7e 0001 	sbcs.w	r0, lr, r1
  2a:	bf38      	it	cc
  2c:	2301      	movcc	r3, #1
unord<f64>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/cmp.rs:111
  2e:	ea43 0002 	orr.w	r0, r3, r2
__unorddf2():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:216
  32:	bd80      	pop	{r7, pc}

Disassembly of section .text.__aeabi_dcmpun:

00000000 <__aeabi_dcmpun>:
__aeabi_dcmpun():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:254
   0:	b580      	push	{r7, lr}
   2:	f240 0e00 	movw	lr, #0
bitand():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:135
   6:	f023 4c00 	bic.w	ip, r3, #2147483648	; 0x80000000
unord<f64>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/cmp.rs:111
   a:	4252      	negs	r2, r2
   c:	f6c7 7ef0 	movt	lr, #32752	; 0x7ff0
  10:	eb7e 020c 	sbcs.w	r2, lr, ip
bitand():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:135
  14:	f021 4100 	bic.w	r1, r1, #2147483648	; 0x80000000
unord<f64>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/cmp.rs:111
  18:	f04f 0200 	mov.w	r2, #0
  1c:	f04f 0300 	mov.w	r3, #0
  20:	bf38      	it	cc
  22:	2201      	movcc	r2, #1
gt():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/cmp.rs:980
  24:	4240      	negs	r0, r0
  26:	eb7e 0001 	sbcs.w	r0, lr, r1
  2a:	bf38      	it	cc
  2c:	2301      	movcc	r3, #1
unord<f64>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/cmp.rs:111
  2e:	ea43 0002 	orr.w	r0, r3, r2
__aeabi_dcmpun():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
  32:	bd80      	pop	{r7, pc}

Disassembly of section .text.__eqdf2:

00000000 <__eqdf2>:
__eqdf2():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:254
   0:	b570      	push	{r4, r5, r6, lr}
   2:	2500      	movs	r5, #0
bitand():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:135
   4:	f021 4e00 	bic.w	lr, r1, #2147483648	; 0x80000000
gt():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/cmp.rs:980
   8:	4244      	negs	r4, r0
   a:	f6c7 75f0 	movt	r5, #32752	; 0x7ff0
   e:	f04f 0c01 	mov.w	ip, #1
  12:	eb75 040e 	sbcs.w	r4, r5, lr
cmp<f64>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/cmp.rs:55
  16:	d32b      	bcc.n	70 <__eqdf2+0x70>
  18:	f023 4400 	bic.w	r4, r3, #2147483648	; 0x80000000
  1c:	4256      	negs	r6, r2
  1e:	41a5      	sbcs	r5, r4
  20:	d326      	bcc.n	70 <__eqdf2+0x70>
bitor():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:219
  22:	ea42 0600 	orr.w	r6, r2, r0
  26:	ea44 050e 	orr.w	r5, r4, lr
eq():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/cmp.rs:894
  2a:	432e      	orrs	r6, r5
cmp<f64>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/cmp.rs:60
  2c:	d00d      	beq.n	4a <__eqdf2+0x4a>
bitand():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:135
  2e:	ea03 0601 	and.w	r6, r3, r1
cmp<f64>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/cmp.rs:69
  32:	2e00      	cmp	r6, #0
  34:	db0d      	blt.n	52 <__eqdf2+0x52>
lt():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/cmp.rs:974
  36:	1a86      	subs	r6, r0, r2
  38:	eb71 0603 	sbcs.w	r6, r1, r3
cmp<f64>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/cmp.rs:70
  3c:	db0d      	blt.n	5a <__eqdf2+0x5a>
eq():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/cmp.rs:894
  3e:	4050      	eors	r0, r2
  40:	4059      	eors	r1, r3
  42:	4308      	orrs	r0, r1
  44:	bf18      	it	ne
  46:	2001      	movne	r0, #1
  48:	bd70      	pop	{r4, r5, r6, pc}
__eqdf2():
  4a:	f04f 0c00 	mov.w	ip, #0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
  4e:	4660      	mov	r0, ip
  50:	bd70      	pop	{r4, r5, r6, pc}
gt():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/cmp.rs:980
  52:	1a16      	subs	r6, r2, r0
  54:	eb73 0601 	sbcs.w	r6, r3, r1
cmp<f64>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/cmp.rs:84
  58:	da03      	bge.n	62 <__eqdf2+0x62>
__eqdf2():
  5a:	f04f 3cff 	mov.w	ip, #4294967295	; 0xffffffff
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
  5e:	4660      	mov	r0, ip
  60:	bd70      	pop	{r4, r5, r6, pc}
eq():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/cmp.rs:894
  62:	4050      	eors	r0, r2
  64:	4059      	eors	r1, r3
  66:	ea50 0c01 	orrs.w	ip, r0, r1
  6a:	bf18      	it	ne
  6c:	f04f 0c01 	movne.w	ip, #1
__eqdf2():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
  70:	4660      	mov	r0, ip
  72:	bd70      	pop	{r4, r5, r6, pc}

Disassembly of section .text.__aeabi_fcmple:

00000000 <__aeabi_fcmple>:
__aeabi_fcmple():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:135
   0:	f020 4300 	bic.w	r3, r0, #2147483648	; 0x80000000
   4:	f04f 0c01 	mov.w	ip, #1
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/cmp.rs:55
   8:	f1b3 4fff 	cmp.w	r3, #2139095040	; 0x7f800000
   c:	bf9c      	itt	ls
   e:	f021 4200 	bicls.w	r2, r1, #2147483648	; 0x80000000
  12:	f1b2 4fff 	cmpls.w	r2, #2139095040	; 0x7f800000
  16:	d905      	bls.n	24 <__aeabi_fcmple+0x24>
  18:	2000      	movs	r0, #0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/cmp.rs:177
  1a:	f1bc 0f01 	cmp.w	ip, #1
  1e:	bfb8      	it	lt
  20:	2001      	movlt	r0, #1
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
  22:	4770      	bx	lr
bitor():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:219
  24:	431a      	orrs	r2, r3
__aeabi_fcmple():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/cmp.rs:60
  26:	d008      	beq.n	3a <__aeabi_fcmple+0x3a>
bitand():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:135
  28:	ea01 0200 	and.w	r2, r1, r0
__aeabi_fcmple():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/cmp.rs:69
  2c:	2a00      	cmp	r2, #0
  2e:	db07      	blt.n	40 <__aeabi_fcmple+0x40>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/cmp.rs:70
  30:	4288      	cmp	r0, r1
  32:	da07      	bge.n	44 <__aeabi_fcmple+0x44>
  34:	f04f 3cff 	mov.w	ip, #4294967295	; 0xffffffff
  38:	e7ee      	b.n	18 <__aeabi_fcmple+0x18>
  3a:	f04f 0c00 	mov.w	ip, #0
  3e:	e7eb      	b.n	18 <__aeabi_fcmple+0x18>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/cmp.rs:84
  40:	4288      	cmp	r0, r1
  42:	dcf7      	bgt.n	34 <__aeabi_fcmple+0x34>
  44:	ebb0 0c01 	subs.w	ip, r0, r1
  48:	bf18      	it	ne
  4a:	f04f 0c01 	movne.w	ip, #1
  4e:	e7e3      	b.n	18 <__aeabi_fcmple+0x18>

Disassembly of section .text.__aeabi_fcmpge:

00000000 <__aeabi_fcmpge>:
__aeabi_fcmpge():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:135
   0:	f020 4300 	bic.w	r3, r0, #2147483648	; 0x80000000
   4:	4684      	mov	ip, r0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/cmp.rs:55
   6:	f1b3 4fff 	cmp.w	r3, #2139095040	; 0x7f800000
   a:	f04f 0000 	mov.w	r0, #0
   e:	bf9c      	itt	ls
  10:	f021 4200 	bicls.w	r2, r1, #2147483648	; 0x80000000
  14:	f1b2 4fff 	cmpls.w	r2, #2139095040	; 0x7f800000
  18:	d900      	bls.n	1c <__aeabi_fcmpge+0x1c>
  1a:	4770      	bx	lr
bitor():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:219
  1c:	ea52 0003 	orrs.w	r0, r2, r3
  20:	bf04      	itt	eq
  22:	2001      	moveq	r0, #1
__aeabi_fcmpge():
  24:	4770      	bxeq	lr
bitand():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:135
  26:	ea01 000c 	and.w	r0, r1, ip
__aeabi_fcmpge():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/cmp.rs:69
  2a:	2800      	cmp	r0, #0
  2c:	db04      	blt.n	38 <__aeabi_fcmpge+0x38>
  2e:	2000      	movs	r0, #0
lt():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/cmp.rs:974
  30:	458c      	cmp	ip, r1
  32:	bfa8      	it	ge
  34:	2001      	movge	r0, #1
__aeabi_fcmpge():
  36:	4770      	bx	lr
  38:	2000      	movs	r0, #0
gt():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/cmp.rs:980
  3a:	458c      	cmp	ip, r1
  3c:	bfd8      	it	le
  3e:	2001      	movle	r0, #1
__aeabi_fcmpge():
  40:	4770      	bx	lr

Disassembly of section .text.__aeabi_fcmpeq:

00000000 <__aeabi_fcmpeq>:
__aeabi_fcmpeq():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:135
   0:	f020 4300 	bic.w	r3, r0, #2147483648	; 0x80000000
   4:	4602      	mov	r2, r0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/cmp.rs:55
   6:	f1b3 4fff 	cmp.w	r3, #2139095040	; 0x7f800000
   a:	f04f 0000 	mov.w	r0, #0
   e:	bf9c      	itt	ls
  10:	f021 4c00 	bicls.w	ip, r1, #2147483648	; 0x80000000
  14:	f1bc 4fff 	cmpls.w	ip, #2139095040	; 0x7f800000
  18:	d900      	bls.n	1c <__aeabi_fcmpeq+0x1c>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
  1a:	4770      	bx	lr
  1c:	1a50      	subs	r0, r2, r1
bitor():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:219
  1e:	ea4c 0103 	orr.w	r1, ip, r3
__aeabi_fcmpeq():
  22:	fab0 f080 	clz	r0, r0
eq():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/cmp.rs:894
  26:	fab1 f181 	clz	r1, r1
__aeabi_fcmpeq():
  2a:	0940      	lsrs	r0, r0, #5
eq():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/cmp.rs:894
  2c:	0949      	lsrs	r1, r1, #5
__aeabi_fcmpeq():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/cmp.rs:60
  2e:	4308      	orrs	r0, r1
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
  30:	4770      	bx	lr

Disassembly of section .text.__aeabi_fcmplt:

00000000 <__aeabi_fcmplt>:
__aeabi_fcmplt():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:135
   0:	f020 4300 	bic.w	r3, r0, #2147483648	; 0x80000000
   4:	4684      	mov	ip, r0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/cmp.rs:55
   6:	f1b3 4fff 	cmp.w	r3, #2139095040	; 0x7f800000
   a:	f04f 0000 	mov.w	r0, #0
   e:	bf9c      	itt	ls
  10:	f021 4200 	bicls.w	r2, r1, #2147483648	; 0x80000000
  14:	f1b2 4fff 	cmpls.w	r2, #2139095040	; 0x7f800000
  18:	d900      	bls.n	1c <__aeabi_fcmplt+0x1c>
  1a:	4770      	bx	lr
  1c:	431a      	orrs	r2, r3
  1e:	bf08      	it	eq
  20:	4770      	bxeq	lr
bitand():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:135
  22:	ea01 000c 	and.w	r0, r1, ip
__aeabi_fcmplt():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/cmp.rs:69
  26:	2800      	cmp	r0, #0
  28:	db04      	blt.n	34 <__aeabi_fcmplt+0x34>
  2a:	2000      	movs	r0, #0
lt():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/cmp.rs:974
  2c:	458c      	cmp	ip, r1
  2e:	bfb8      	it	lt
  30:	2001      	movlt	r0, #1
__aeabi_fcmplt():
  32:	4770      	bx	lr
  34:	2000      	movs	r0, #0
gt():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/cmp.rs:980
  36:	458c      	cmp	ip, r1
  38:	bfc8      	it	gt
  3a:	2001      	movgt	r0, #1
__aeabi_fcmplt():
  3c:	4770      	bx	lr

Disassembly of section .text.__aeabi_fcmpgt:

00000000 <__aeabi_fcmpgt>:
__aeabi_fcmpgt():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:135
   0:	f020 4300 	bic.w	r3, r0, #2147483648	; 0x80000000
   4:	f04f 3cff 	mov.w	ip, #4294967295	; 0xffffffff
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/cmp.rs:55
   8:	f1b3 4fff 	cmp.w	r3, #2139095040	; 0x7f800000
   c:	bf9c      	itt	ls
   e:	f021 4200 	bicls.w	r2, r1, #2147483648	; 0x80000000
  12:	f1b2 4fff 	cmpls.w	r2, #2139095040	; 0x7f800000
  16:	d905      	bls.n	24 <__aeabi_fcmpgt+0x24>
  18:	2000      	movs	r0, #0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/cmp.rs:193
  1a:	f1bc 0f00 	cmp.w	ip, #0
  1e:	bfc8      	it	gt
  20:	2001      	movgt	r0, #1
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
  22:	4770      	bx	lr
bitor():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:219
  24:	431a      	orrs	r2, r3
__aeabi_fcmpgt():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/cmp.rs:60
  26:	d008      	beq.n	3a <__aeabi_fcmpgt+0x3a>
bitand():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:135
  28:	ea01 0200 	and.w	r2, r1, r0
__aeabi_fcmpgt():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/cmp.rs:69
  2c:	2a00      	cmp	r2, #0
  2e:	db07      	blt.n	40 <__aeabi_fcmpgt+0x40>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/cmp.rs:70
  30:	4288      	cmp	r0, r1
  32:	da07      	bge.n	44 <__aeabi_fcmpgt+0x44>
  34:	f04f 3cff 	mov.w	ip, #4294967295	; 0xffffffff
  38:	e7ee      	b.n	18 <__aeabi_fcmpgt+0x18>
  3a:	f04f 0c00 	mov.w	ip, #0
  3e:	e7eb      	b.n	18 <__aeabi_fcmpgt+0x18>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/cmp.rs:84
  40:	4288      	cmp	r0, r1
  42:	dcf7      	bgt.n	34 <__aeabi_fcmpgt+0x34>
  44:	ebb0 0c01 	subs.w	ip, r0, r1
  48:	bf18      	it	ne
  4a:	f04f 0c01 	movne.w	ip, #1
  4e:	e7e3      	b.n	18 <__aeabi_fcmpgt+0x18>

Disassembly of section .text.__aeabi_dcmple:

00000000 <__aeabi_dcmple>:
__aeabi_dcmple():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:254
   0:	b570      	push	{r4, r5, r6, lr}
   2:	2500      	movs	r5, #0
bitand():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:135
   4:	f021 4e00 	bic.w	lr, r1, #2147483648	; 0x80000000
gt():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/cmp.rs:980
   8:	4244      	negs	r4, r0
   a:	f6c7 75f0 	movt	r5, #32752	; 0x7ff0
   e:	f04f 0c01 	mov.w	ip, #1
  12:	eb75 040e 	sbcs.w	r4, r5, lr
cmp<f64>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/cmp.rs:55
  16:	d323      	bcc.n	60 <__aeabi_dcmple+0x60>
  18:	f023 4400 	bic.w	r4, r3, #2147483648	; 0x80000000
  1c:	4256      	negs	r6, r2
  1e:	41a5      	sbcs	r5, r4
  20:	d31e      	bcc.n	60 <__aeabi_dcmple+0x60>
bitor():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:219
  22:	ea42 0600 	orr.w	r6, r2, r0
  26:	ea44 050e 	orr.w	r5, r4, lr
eq():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/cmp.rs:894
  2a:	432e      	orrs	r6, r5
cmp<f64>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/cmp.rs:60
  2c:	d00a      	beq.n	44 <__aeabi_dcmple+0x44>
bitand():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:135
  2e:	ea03 0601 	and.w	r6, r3, r1
cmp<f64>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/cmp.rs:69
  32:	2e00      	cmp	r6, #0
  34:	db09      	blt.n	4a <__aeabi_dcmple+0x4a>
lt():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/cmp.rs:974
  36:	1a86      	subs	r6, r0, r2
  38:	eb71 0603 	sbcs.w	r6, r1, r3
cmp<f64>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/cmp.rs:70
  3c:	da09      	bge.n	52 <__aeabi_dcmple+0x52>
  3e:	f04f 3cff 	mov.w	ip, #4294967295	; 0xffffffff
  42:	e00d      	b.n	60 <__aeabi_dcmple+0x60>
  44:	f04f 0c00 	mov.w	ip, #0
  48:	e00a      	b.n	60 <__aeabi_dcmple+0x60>
gt():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/cmp.rs:980
  4a:	1a16      	subs	r6, r2, r0
  4c:	eb73 0601 	sbcs.w	r6, r3, r1
cmp<f64>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/cmp.rs:84
  50:	dbf5      	blt.n	3e <__aeabi_dcmple+0x3e>
  52:	4050      	eors	r0, r2
  54:	4059      	eors	r1, r3
  56:	ea50 0c01 	orrs.w	ip, r0, r1
  5a:	bf18      	it	ne
  5c:	f04f 0c01 	movne.w	ip, #1
__aeabi_dcmple():
  60:	2000      	movs	r0, #0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/cmp.rs:197
  62:	f1bc 0f01 	cmp.w	ip, #1
  66:	bfb8      	it	lt
  68:	2001      	movlt	r0, #1
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
  6a:	bd70      	pop	{r4, r5, r6, pc}

Disassembly of section .text.__aeabi_dcmpge:

00000000 <__aeabi_dcmpge>:
__aeabi_dcmpge():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:254
   0:	b570      	push	{r4, r5, r6, lr}
   2:	4684      	mov	ip, r0
   4:	2500      	movs	r5, #0
bitand():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:135
   6:	f021 4e00 	bic.w	lr, r1, #2147483648	; 0x80000000
gt():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/cmp.rs:980
   a:	f1dc 0400 	rsbs	r4, ip, #0
   e:	f6c7 75f0 	movt	r5, #32752	; 0x7ff0
  12:	f04f 0000 	mov.w	r0, #0
  16:	eb75 040e 	sbcs.w	r4, r5, lr
cmp<f64>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/cmp.rs:55
  1a:	d320      	bcc.n	5e <__aeabi_dcmpge+0x5e>
  1c:	f023 4400 	bic.w	r4, r3, #2147483648	; 0x80000000
  20:	4256      	negs	r6, r2
  22:	41a5      	sbcs	r5, r4
  24:	d31b      	bcc.n	5e <__aeabi_dcmpge+0x5e>
bitor():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:219
  26:	ea42 000c 	orr.w	r0, r2, ip
  2a:	ea44 060e 	orr.w	r6, r4, lr
eq():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/cmp.rs:894
  2e:	4330      	orrs	r0, r6
cmp<f64>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/cmp.rs:60
  30:	d00b      	beq.n	4a <__aeabi_dcmpge+0x4a>
bitand():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:135
  32:	ea03 0001 	and.w	r0, r3, r1
cmp<f64>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/cmp.rs:69
  36:	2800      	cmp	r0, #0
  38:	db09      	blt.n	4e <__aeabi_dcmpge+0x4e>
lt():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/cmp.rs:974
  3a:	ebbc 0202 	subs.w	r2, ip, r2
  3e:	f04f 0000 	mov.w	r0, #0
  42:	4199      	sbcs	r1, r3
  44:	bfa8      	it	ge
  46:	2001      	movge	r0, #1
__aeabi_dcmpge():
  48:	bd70      	pop	{r4, r5, r6, pc}
  4a:	2001      	movs	r0, #1
  4c:	bd70      	pop	{r4, r5, r6, pc}
gt():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/cmp.rs:980
  4e:	ebb2 020c 	subs.w	r2, r2, ip
  52:	f04f 0000 	mov.w	r0, #0
  56:	eb73 0101 	sbcs.w	r1, r3, r1
  5a:	bfa8      	it	ge
  5c:	2001      	movge	r0, #1
__aeabi_dcmpge():
  5e:	bd70      	pop	{r4, r5, r6, pc}

Disassembly of section .text.__aeabi_dcmpeq:

00000000 <__aeabi_dcmpeq>:
__aeabi_dcmpeq():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:254
   0:	b570      	push	{r4, r5, r6, lr}
   2:	2500      	movs	r5, #0
bitand():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:135
   4:	f021 4e00 	bic.w	lr, r1, #2147483648	; 0x80000000
gt():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/cmp.rs:980
   8:	4244      	negs	r4, r0
   a:	f6c7 75f0 	movt	r5, #32752	; 0x7ff0
   e:	f04f 0c00 	mov.w	ip, #0
  12:	eb75 040e 	sbcs.w	r4, r5, lr
cmp<f64>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/cmp.rs:55
  16:	d314      	bcc.n	42 <__aeabi_dcmpeq+0x42>
  18:	f023 4400 	bic.w	r4, r3, #2147483648	; 0x80000000
  1c:	4256      	negs	r6, r2
  1e:	41a5      	sbcs	r5, r4
  20:	d30f      	bcc.n	42 <__aeabi_dcmpeq+0x42>
  22:	ea80 0602 	eor.w	r6, r0, r2
  26:	4059      	eors	r1, r3
bitor():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:219
  28:	4310      	orrs	r0, r2
  2a:	ea44 020e 	orr.w	r2, r4, lr
cmp<f64>():
  2e:	4331      	orrs	r1, r6
eq():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/cmp.rs:894
  30:	4310      	orrs	r0, r2
cmp<f64>():
  32:	fab1 f181 	clz	r1, r1
eq():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/cmp.rs:894
  36:	fab0 f080 	clz	r0, r0
cmp<f64>():
  3a:	0949      	lsrs	r1, r1, #5
eq():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/cmp.rs:894
  3c:	0940      	lsrs	r0, r0, #5
cmp<f64>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/cmp.rs:60
  3e:	ea40 0c01 	orr.w	ip, r0, r1
__aeabi_dcmpeq():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
  42:	4660      	mov	r0, ip
  44:	bd70      	pop	{r4, r5, r6, pc}

Disassembly of section .text.__aeabi_dcmplt:

00000000 <__aeabi_dcmplt>:
__aeabi_dcmplt():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:254
   0:	b570      	push	{r4, r5, r6, lr}
   2:	4684      	mov	ip, r0
   4:	2400      	movs	r4, #0
bitand():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:135
   6:	f021 4e00 	bic.w	lr, r1, #2147483648	; 0x80000000
gt():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/cmp.rs:980
   a:	f1dc 0500 	rsbs	r5, ip, #0
   e:	f6c7 74f0 	movt	r4, #32752	; 0x7ff0
  12:	f04f 0000 	mov.w	r0, #0
  16:	eb74 050e 	sbcs.w	r5, r4, lr
cmp<f64>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/cmp.rs:55
  1a:	d31e      	bcc.n	5a <__aeabi_dcmplt+0x5a>
  1c:	f023 4500 	bic.w	r5, r3, #2147483648	; 0x80000000
  20:	4256      	negs	r6, r2
  22:	41ac      	sbcs	r4, r5
  24:	d319      	bcc.n	5a <__aeabi_dcmplt+0x5a>
  26:	ea42 040c 	orr.w	r4, r2, ip
  2a:	ea45 060e 	orr.w	r6, r5, lr
  2e:	4326      	orrs	r6, r4
  30:	d013      	beq.n	5a <__aeabi_dcmplt+0x5a>
bitand():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:135
  32:	ea03 0001 	and.w	r0, r3, r1
cmp<f64>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/cmp.rs:69
  36:	2800      	cmp	r0, #0
  38:	db07      	blt.n	4a <__aeabi_dcmplt+0x4a>
lt():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/cmp.rs:974
  3a:	ebbc 0202 	subs.w	r2, ip, r2
  3e:	f04f 0000 	mov.w	r0, #0
  42:	4199      	sbcs	r1, r3
  44:	bfb8      	it	lt
  46:	2001      	movlt	r0, #1
__aeabi_dcmplt():
  48:	bd70      	pop	{r4, r5, r6, pc}
gt():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/cmp.rs:980
  4a:	ebb2 020c 	subs.w	r2, r2, ip
  4e:	f04f 0000 	mov.w	r0, #0
  52:	eb73 0101 	sbcs.w	r1, r3, r1
  56:	bfb8      	it	lt
  58:	2001      	movlt	r0, #1
__aeabi_dcmplt():
  5a:	bd70      	pop	{r4, r5, r6, pc}

Disassembly of section .text.__aeabi_dcmpgt:

00000000 <__aeabi_dcmpgt>:
__aeabi_dcmpgt():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:254
   0:	b570      	push	{r4, r5, r6, lr}
   2:	2500      	movs	r5, #0
bitand():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:135
   4:	f021 4e00 	bic.w	lr, r1, #2147483648	; 0x80000000
gt():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/cmp.rs:980
   8:	4244      	negs	r4, r0
   a:	f6c7 75f0 	movt	r5, #32752	; 0x7ff0
   e:	f04f 3cff 	mov.w	ip, #4294967295	; 0xffffffff
  12:	eb75 040e 	sbcs.w	r4, r5, lr
cmp<f64>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/cmp.rs:55
  16:	d323      	bcc.n	60 <__aeabi_dcmpgt+0x60>
  18:	f023 4400 	bic.w	r4, r3, #2147483648	; 0x80000000
  1c:	4256      	negs	r6, r2
  1e:	41a5      	sbcs	r5, r4
  20:	d31e      	bcc.n	60 <__aeabi_dcmpgt+0x60>
bitor():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:219
  22:	ea42 0600 	orr.w	r6, r2, r0
  26:	ea44 050e 	orr.w	r5, r4, lr
eq():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/cmp.rs:894
  2a:	432e      	orrs	r6, r5
cmp<f64>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/cmp.rs:60
  2c:	d00a      	beq.n	44 <__aeabi_dcmpgt+0x44>
bitand():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:135
  2e:	ea03 0601 	and.w	r6, r3, r1
cmp<f64>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/cmp.rs:69
  32:	2e00      	cmp	r6, #0
  34:	db09      	blt.n	4a <__aeabi_dcmpgt+0x4a>
lt():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/cmp.rs:974
  36:	1a86      	subs	r6, r0, r2
  38:	eb71 0603 	sbcs.w	r6, r1, r3
cmp<f64>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/cmp.rs:70
  3c:	da09      	bge.n	52 <__aeabi_dcmpgt+0x52>
  3e:	f04f 3cff 	mov.w	ip, #4294967295	; 0xffffffff
  42:	e00d      	b.n	60 <__aeabi_dcmpgt+0x60>
  44:	f04f 0c00 	mov.w	ip, #0
  48:	e00a      	b.n	60 <__aeabi_dcmpgt+0x60>
gt():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/cmp.rs:980
  4a:	1a16      	subs	r6, r2, r0
  4c:	eb73 0601 	sbcs.w	r6, r3, r1
cmp<f64>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/cmp.rs:84
  50:	dbf5      	blt.n	3e <__aeabi_dcmpgt+0x3e>
  52:	4050      	eors	r0, r2
  54:	4059      	eors	r1, r3
  56:	ea50 0c01 	orrs.w	ip, r0, r1
  5a:	bf18      	it	ne
  5c:	f04f 0c01 	movne.w	ip, #1
__aeabi_dcmpgt():
  60:	2000      	movs	r0, #0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/cmp.rs:213
  62:	f1bc 0f00 	cmp.w	ip, #0
  66:	bfc8      	it	gt
  68:	2001      	movgt	r0, #1
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
  6a:	bd70      	pop	{r4, r5, r6, pc}

Disassembly of section .text.__gesf2vfp:

00000000 <__gesf2vfp>:
__gesf2vfp():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:254
   0:	b580      	push	{r7, lr}
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/cmp.rs:220
   2:	f7ff fffe 	bl	0 <__gesf2vfp>
   6:	2800      	cmp	r0, #0
   8:	bf18      	it	ne
   a:	2001      	movne	r0, #1
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
   c:	bd80      	pop	{r7, pc}

Disassembly of section .text.__gedf2vfp:

00000000 <__gedf2vfp>:
__gedf2vfp():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:254
   0:	b580      	push	{r7, lr}
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/cmp.rs:224
   2:	f7ff fffe 	bl	0 <__gedf2vfp>
   6:	2800      	cmp	r0, #0
   8:	bf18      	it	ne
   a:	2001      	movne	r0, #1
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
   c:	bd80      	pop	{r7, pc}

Disassembly of section .text.__gtsf2vfp:

00000000 <__gtsf2vfp>:
__gtsf2vfp():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:254
   0:	b580      	push	{r7, lr}
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/cmp.rs:228
   2:	f7ff fffe 	bl	0 <__gtsf2vfp>
   6:	2800      	cmp	r0, #0
   8:	bf18      	it	ne
   a:	2001      	movne	r0, #1
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
   c:	bd80      	pop	{r7, pc}

Disassembly of section .text.__gtdf2vfp:

00000000 <__gtdf2vfp>:
__gtdf2vfp():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:254
   0:	b580      	push	{r7, lr}
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/cmp.rs:232
   2:	f7ff fffe 	bl	0 <__gtdf2vfp>
   6:	2800      	cmp	r0, #0
   8:	bf18      	it	ne
   a:	2001      	movne	r0, #1
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
   c:	bd80      	pop	{r7, pc}

Disassembly of section .text.__ltsf2vfp:

00000000 <__ltsf2vfp>:
__ltsf2vfp():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:254
   0:	b580      	push	{r7, lr}
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/cmp.rs:236
   2:	f7ff fffe 	bl	0 <__ltsf2vfp>
   6:	2800      	cmp	r0, #0
   8:	bf18      	it	ne
   a:	2001      	movne	r0, #1
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
   c:	bd80      	pop	{r7, pc}

Disassembly of section .text.__ltdf2vfp:

00000000 <__ltdf2vfp>:
__ltdf2vfp():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:254
   0:	b580      	push	{r7, lr}
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/cmp.rs:240
   2:	f7ff fffe 	bl	0 <__ltdf2vfp>
   6:	2800      	cmp	r0, #0
   8:	bf18      	it	ne
   a:	2001      	movne	r0, #1
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
   c:	bd80      	pop	{r7, pc}

Disassembly of section .text.__lesf2vfp:

00000000 <__lesf2vfp>:
__lesf2vfp():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:254
   0:	b580      	push	{r7, lr}
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/cmp.rs:244
   2:	f7ff fffe 	bl	0 <__lesf2vfp>
   6:	2800      	cmp	r0, #0
   8:	bf18      	it	ne
   a:	2001      	movne	r0, #1
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
   c:	bd80      	pop	{r7, pc}

Disassembly of section .text.__ledf2vfp:

00000000 <__ledf2vfp>:
__ledf2vfp():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:254
   0:	b580      	push	{r7, lr}
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/cmp.rs:248
   2:	f7ff fffe 	bl	0 <__ledf2vfp>
   6:	2800      	cmp	r0, #0
   8:	bf18      	it	ne
   a:	2001      	movne	r0, #1
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
   c:	bd80      	pop	{r7, pc}

Disassembly of section .text.__nesf2vfp:

00000000 <__nesf2vfp>:
__nesf2vfp():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:254
   0:	b580      	push	{r7, lr}
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/cmp.rs:252
   2:	f7ff fffe 	bl	0 <__nesf2vfp>
   6:	fab0 f080 	clz	r0, r0
   a:	0940      	lsrs	r0, r0, #5
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
   c:	bd80      	pop	{r7, pc}

Disassembly of section .text.__nedf2vfp:

00000000 <__nedf2vfp>:
__nedf2vfp():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:254
   0:	b580      	push	{r7, lr}
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/cmp.rs:256
   2:	f7ff fffe 	bl	0 <__nedf2vfp>
   6:	fab0 f080 	clz	r0, r0
   a:	0940      	lsrs	r0, r0, #5
   c:	bd80      	pop	{r7, pc}

Disassembly of section .text.__eqsf2vfp:

00000000 <__eqsf2vfp>:
__eqsf2vfp():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:254
   0:	b580      	push	{r7, lr}
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/cmp.rs:260
   2:	f7ff fffe 	bl	0 <__eqsf2vfp>
   6:	2800      	cmp	r0, #0
   8:	bf18      	it	ne
   a:	2001      	movne	r0, #1
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
   c:	bd80      	pop	{r7, pc}

Disassembly of section .text.__eqdf2vfp:

00000000 <__eqdf2vfp>:
__eqdf2vfp():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:254
   0:	b580      	push	{r7, lr}
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/cmp.rs:264
   2:	f7ff fffe 	bl	0 <__eqdf2vfp>
   6:	2800      	cmp	r0, #0
   8:	bf18      	it	ne
   a:	2001      	movne	r0, #1
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
   c:	bd80      	pop	{r7, pc}

Disassembly of section .text.__addsf3:

00000000 <__addsf3>:
__addsf3():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:214
   0:	b5b0      	push	{r4, r5, r7, lr}
bitand():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:135
   2:	f020 4300 	bic.w	r3, r0, #2147483648	; 0x80000000
   6:	f64f 75fe 	movw	r5, #65534	; 0xfffe
   a:	f021 4200 	bic.w	r2, r1, #2147483648	; 0x80000000
wrapping_sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2863
   e:	1e5c      	subs	r4, r3, #1
  10:	f6c7 757f 	movt	r5, #32639	; 0x7f7f
add<f32>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/add.rs:33
  14:	42ac      	cmp	r4, r5
  16:	bf9c      	itt	ls
  18:	1e54      	subls	r4, r2, #1
  1a:	42ac      	cmpls	r4, r5
  1c:	d921      	bls.n	62 <__addsf3+0x62>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/add.rs:36
  1e:	f1b3 4fff 	cmp.w	r3, #2139095040	; 0x7f800000
  22:	d903      	bls.n	2c <__addsf3+0x2c>
bitor():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:219
  24:	f443 0180 	orr.w	r1, r3, #4194304	; 0x400000
__addsf3():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:216
  28:	4608      	mov	r0, r1
  2a:	bdb0      	pop	{r4, r5, r7, pc}
add<f32>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/add.rs:40
  2c:	f1b2 4fff 	cmp.w	r2, #2139095040	; 0x7f800000
  30:	d903      	bls.n	3a <__addsf3+0x3a>
bitor():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:219
  32:	f442 0180 	orr.w	r1, r2, #4194304	; 0x400000
__addsf3():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:216
  36:	4608      	mov	r0, r1
  38:	bdb0      	pop	{r4, r5, r7, pc}
add<f32>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/add.rs:44
  3a:	f1b3 4fff 	cmp.w	r3, #2139095040	; 0x7f800000
  3e:	d107      	bne.n	50 <__addsf3+0x50>
bitxor():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:306
  40:	4041      	eors	r1, r0
add<f32>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/add.rs:46
  42:	f1b1 4f00 	cmp.w	r1, #2147483648	; 0x80000000
  46:	bf04      	itt	eq
  48:	2000      	moveq	r0, #0
  4a:	f6c7 70c0 	movteq	r0, #32704	; 0x7fc0
__addsf3():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:216
  4e:	bdb0      	pop	{r4, r5, r7, pc}
add<f32>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/add.rs:55
  50:	f1b2 4fff 	cmp.w	r2, #2139095040	; 0x7f800000
  54:	f000 8094 	beq.w	180 <__addsf3+0x180>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/add.rs:60
  58:	2b00      	cmp	r3, #0
  5a:	f000 8093 	beq.w	184 <__addsf3+0x184>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/add.rs:70
  5e:	2a00      	cmp	r2, #0
  60:	d0f5      	beq.n	4e <__addsf3+0x4e>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/add.rs:76
  62:	429a      	cmp	r2, r3
  64:	460b      	mov	r3, r1
  66:	bf84      	itt	hi
  68:	4603      	movhi	r3, r0
  6a:	4608      	movhi	r0, r1
bitand():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:135
  6c:	4601      	mov	r1, r0
shr():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:505
  6e:	f3c3 52c7 	ubfx	r2, r3, #23, #8
  72:	f3c0 5cc7 	ubfx	ip, r0, #23, #8
bitand():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:135
  76:	f36f 51df 	bfc	r1, #23, #9
add<f32>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/add.rs:90
  7a:	f1bc 0f00 	cmp.w	ip, #0
  7e:	d108      	bne.n	92 <__addsf3+0x92>
leading_zeros():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2239
  80:	fab1 f581 	clz	r5, r1
wrapping_sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2863
  84:	f105 0418 	add.w	r4, r5, #24
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:1027
  88:	f1c5 0c09 	rsb	ip, r5, #9
normalize():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mod.rs:128
  8c:	f004 041f 	and.w	r4, r4, #31
  90:	40a1      	lsls	r1, r4
add<f32>():
  92:	461c      	mov	r4, r3
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/add.rs:95
  94:	2a00      	cmp	r2, #0
  96:	f36f 54df 	bfc	r4, #23, #9
  9a:	d108      	bne.n	ae <__addsf3+0xae>
leading_zeros():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2239
  9c:	fab4 f284 	clz	r2, r4
wrapping_sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2863
  a0:	f102 0518 	add.w	r5, r2, #24
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:1027
  a4:	f1c2 0209 	rsb	r2, r2, #9
normalize():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mod.rs:128
  a8:	f005 051f 	and.w	r5, r5, #31
  ac:	40ac      	lsls	r4, r5
wrapping_sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:1027
  ae:	ebbc 0502 	subs.w	r5, ip, r2
  b2:	f04f 6e80 	mov.w	lr, #67108864	; 0x4000000
shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:396
  b6:	ea4e 02c4 	orr.w	r2, lr, r4, lsl #3
bitxor():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:306
  ba:	ea83 0300 	eor.w	r3, r3, r0
add<f32>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/add.rs:116
  be:	d00f      	beq.n	e0 <__addsf3+0xe0>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/add.rs:117
  c0:	2d1f      	cmp	r5, #31
  c2:	d80c      	bhi.n	de <__addsf3+0xde>
wrapping_sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2863
  c4:	426c      	negs	r4, r5
shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:396
  c6:	f004 041f 	and.w	r4, r4, #31
  ca:	fa12 f404 	lsls.w	r4, r2, r4
shr():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:505
  ce:	f005 041f 	and.w	r4, r5, #31
  d2:	fa22 f204 	lsr.w	r2, r2, r4
bitor():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:219
  d6:	bf18      	it	ne
  d8:	f042 0201 	orrne.w	r2, r2, #1
  dc:	e000      	b.n	e0 <__addsf3+0xe0>
add<f32>():
  de:	2201      	movs	r2, #1
  e0:	ea4e 01c1 	orr.w	r1, lr, r1, lsl #3
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/add.rs:124
  e4:	f1b3 3fff 	cmp.w	r3, #4294967295	; 0xffffffff
  e8:	dd34      	ble.n	154 <__addsf3+0x154>
add_assign():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/arith.rs:698
  ea:	1853      	adds	r3, r2, r1
add<f32>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/add.rs:144
  ec:	0119      	lsls	r1, r3, #4
bitand():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:135
  ee:	bf42      	ittt	mi
  f0:	f003 0101 	andmi.w	r1, r3, #1
bitor():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:219
  f4:	ea41 0353 	orrmi.w	r3, r1, r3, lsr #1
add<f32>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/add.rs:147
  f8:	f10c 0c01 	addmi.w	ip, ip, #1
  fc:	f000 4000 	and.w	r0, r0, #2147483648	; 0x80000000
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/add.rs:152
 100:	f1bc 0fff 	cmp.w	ip, #255	; 0xff
 104:	db03      	blt.n	10e <__addsf3+0x10e>
bitor():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:219
 106:	f040 41ff 	orr.w	r1, r0, #2139095040	; 0x7f800000
__addsf3():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:216
 10a:	4608      	mov	r0, r1
 10c:	bdb0      	pop	{r4, r5, r7, pc}
 10e:	f64f 71ff 	movw	r1, #65535	; 0xffff
add<f32>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/add.rs:156
 112:	f1bc 0f00 	cmp.w	ip, #0
 116:	f2c0 017f 	movt	r1, #127	; 0x7f
 11a:	dc0f      	bgt.n	13c <__addsf3+0x13c>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/add.rs:159
 11c:	f1cc 0201 	rsb	r2, ip, #1
 120:	f04f 0c00 	mov.w	ip, #0
wrapping_sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2863
 124:	4255      	negs	r5, r2
shr():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:505
 126:	f002 021f 	and.w	r2, r2, #31
shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:396
 12a:	f005 051f 	and.w	r5, r5, #31
 12e:	fa13 f505 	lsls.w	r5, r3, r5
shr():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:505
 132:	fa23 f302 	lsr.w	r3, r3, r2
bitor():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:219
 136:	bf18      	it	ne
 138:	f043 0301 	orrne.w	r3, r3, #1
bitand():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:135
 13c:	ea01 01d3 	and.w	r1, r1, r3, lsr #3
bitor_assign():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:661
 140:	ea40 50cc 	orr.w	r0, r0, ip, lsl #23
 144:	4301      	orrs	r1, r0
add<f32>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/add.rs:167
 146:	f003 0007 	and.w	r0, r3, #7
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/add.rs:178
 14a:	2805      	cmp	r0, #5
 14c:	d312      	bcc.n	174 <__addsf3+0x174>
add_assign():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/arith.rs:698
 14e:	3101      	adds	r1, #1
__addsf3():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:216
 150:	4608      	mov	r0, r1
 152:	bdb0      	pop	{r4, r5, r7, pc}
wrapping_sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2863
 154:	1a8b      	subs	r3, r1, r2
 156:	f04f 0100 	mov.w	r1, #0
add<f32>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/add.rs:127
 15a:	d011      	beq.n	180 <__addsf3+0x180>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/add.rs:133
 15c:	ebb1 6f93 	cmp.w	r1, r3, lsr #26
 160:	d1cc      	bne.n	fc <__addsf3+0xfc>
leading_zeros():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2239
 162:	fab3 f183 	clz	r1, r3
add<f32>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/add.rs:134
 166:	3905      	subs	r1, #5
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/add.rs:137
 168:	ebac 0c01 	sub.w	ip, ip, r1
shl_assign():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:759
 16c:	f001 011f 	and.w	r1, r1, #31
 170:	408b      	lsls	r3, r1
 172:	e7c3      	b.n	fc <__addsf3+0xfc>
add<f32>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/add.rs:179
 174:	2804      	cmp	r0, #4
 176:	bf02      	ittt	eq
 178:	08d8      	lsreq	r0, r3, #3
bitand():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:135
 17a:	f000 0001 	andeq.w	r0, r0, #1
add_assign():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/arith.rs:698
 17e:	4401      	addeq	r1, r0
__addsf3():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:216
 180:	4608      	mov	r0, r1
 182:	bdb0      	pop	{r4, r5, r7, pc}
add<f32>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/add.rs:62
 184:	2a00      	cmp	r2, #0
 186:	d1fb      	bne.n	180 <__addsf3+0x180>
bitand():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:135
 188:	4001      	ands	r1, r0
__addsf3():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:216
 18a:	4608      	mov	r0, r1
 18c:	bdb0      	pop	{r4, r5, r7, pc}

Disassembly of section .text.__aeabi_fadd:

00000000 <__aeabi_fadd>:
__aeabi_fadd():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/add.rs:184
   0:	f7ff bffe 	b.w	0 <__aeabi_fadd>

Disassembly of section .text.__adddf3:

00000000 <__adddf3>:
__adddf3():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:214
   0:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
bitand():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:135
   4:	f023 4800 	bic.w	r8, r3, #2147483648	; 0x80000000
wrapping_sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2863
   8:	1e56      	subs	r6, r2, #1
   a:	4696      	mov	lr, r2
   c:	f168 0500 	sbc.w	r5, r8, #0
bitand():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:135
  10:	f021 4400 	bic.w	r4, r1, #2147483648	; 0x80000000
wrapping_sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2863
  14:	1e47      	subs	r7, r0, #1
  16:	f06f 0201 	mvn.w	r2, #1
  1a:	f64f 79ff 	movw	r9, #65535	; 0xffff
  1e:	469c      	mov	ip, r3
  20:	f164 0300 	sbc.w	r3, r4, #0
ge():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/cmp.rs:978
  24:	1bd2      	subs	r2, r2, r7
  26:	f6c7 79ef 	movt	r9, #32751	; 0x7fef
  2a:	eb79 0203 	sbcs.w	r2, r9, r3
add<f64>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/add.rs:33
  2e:	f0c0 80a5 	bcc.w	17c <__adddf3+0x17c>
  32:	f1b6 32ff 	subs.w	r2, r6, #4294967295	; 0xffffffff
  36:	eb75 0209 	sbcs.w	r2, r5, r9
  3a:	f080 809f 	bcs.w	17c <__adddf3+0x17c>
gt():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/cmp.rs:980
  3e:	ebb0 030e 	subs.w	r3, r0, lr
  42:	f04f 0200 	mov.w	r2, #0
  46:	eb74 0308 	sbcs.w	r3, r4, r8
  4a:	bf38      	it	cc
  4c:	2201      	movcc	r2, #1
add<f64>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/add.rs:76
  4e:	4673      	mov	r3, lr
  50:	2a00      	cmp	r2, #0
  52:	bf1c      	itt	ne
  54:	4603      	movne	r3, r0
  56:	4670      	movne	r0, lr
  58:	46e6      	mov	lr, ip
  5a:	bf1c      	itt	ne
  5c:	468e      	movne	lr, r1
  5e:	4661      	movne	r1, ip
bitand():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:135
  60:	460a      	mov	r2, r1
cast():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:241
  62:	f3ce 540a 	ubfx	r4, lr, #20, #11
  66:	f3c1 5c0a 	ubfx	ip, r1, #20, #11
bitand():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:135
  6a:	f36f 521f 	bfc	r2, #20, #12
add<f64>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/add.rs:90
  6e:	f1bc 0f00 	cmp.w	ip, #0
  72:	d11d      	bne.n	b0 <__adddf3+0xb0>
leading_zeros():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2239
  74:	fab0 f780 	clz	r7, r0
  78:	2a00      	cmp	r2, #0
  7a:	f107 0720 	add.w	r7, r7, #32
  7e:	bf18      	it	ne
  80:	fab2 f782 	clzne	r7, r2
wrapping_sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2863
  84:	f107 0635 	add.w	r6, r7, #53	; 0x35
normalize():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mod.rs:128
  88:	f006 063f 	and.w	r6, r6, #63	; 0x3f
wrapping_sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:1027
  8c:	f1c7 0c0c 	rsb	ip, r7, #12
normalize():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mod.rs:128
  90:	f1c6 0520 	rsb	r5, r6, #32
  94:	40b2      	lsls	r2, r6
  96:	fa20 f505 	lsr.w	r5, r0, r5
  9a:	432a      	orrs	r2, r5
  9c:	f1a6 0520 	sub.w	r5, r6, #32
  a0:	2d00      	cmp	r5, #0
  a2:	bfa8      	it	ge
  a4:	fa00 f205 	lslge.w	r2, r0, r5
  a8:	fa00 f006 	lsl.w	r0, r0, r6
  ac:	bfa8      	it	ge
  ae:	2000      	movge	r0, #0
add<f64>():
  b0:	4675      	mov	r5, lr
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/add.rs:95
  b2:	2c00      	cmp	r4, #0
  b4:	f36f 551f 	bfc	r5, #20, #12
  b8:	d11d      	bne.n	f6 <__adddf3+0xf6>
leading_zeros():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2239
  ba:	fab3 f483 	clz	r4, r3
  be:	2d00      	cmp	r5, #0
  c0:	f104 0420 	add.w	r4, r4, #32
  c4:	bf18      	it	ne
  c6:	fab5 f485 	clzne	r4, r5
wrapping_sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2863
  ca:	f104 0635 	add.w	r6, r4, #53	; 0x35
normalize():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mod.rs:128
  ce:	f006 063f 	and.w	r6, r6, #63	; 0x3f
wrapping_sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:1027
  d2:	f1c4 040c 	rsb	r4, r4, #12
normalize():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mod.rs:128
  d6:	f1c6 0720 	rsb	r7, r6, #32
  da:	40b5      	lsls	r5, r6
  dc:	fa23 f707 	lsr.w	r7, r3, r7
  e0:	433d      	orrs	r5, r7
  e2:	f1a6 0720 	sub.w	r7, r6, #32
  e6:	2f00      	cmp	r7, #0
  e8:	bfa8      	it	ge
  ea:	fa03 f507 	lslge.w	r5, r3, r7
  ee:	fa03 f306 	lsl.w	r3, r3, r6
  f2:	bfa8      	it	ge
  f4:	2300      	movge	r3, #0
shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:396
  f6:	00ef      	lsls	r7, r5, #3
  f8:	00d2      	lsls	r2, r2, #3
  fa:	ea47 7753 	orr.w	r7, r7, r3, lsr #29
bitxor():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:306
  fe:	ea8e 0801 	eor.w	r8, lr, r1
wrapping_sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:1027
 102:	ebbc 0604 	subs.w	r6, ip, r4
shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:396
 106:	f447 0e00 	orr.w	lr, r7, #8388608	; 0x800000
 10a:	ea42 7a50 	orr.w	sl, r2, r0, lsr #29
 10e:	ea4f 03c3 	mov.w	r3, r3, lsl #3
add<f64>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/add.rs:116
 112:	d04a      	beq.n	1aa <__adddf3+0x1aa>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/add.rs:117
 114:	2e3f      	cmp	r6, #63	; 0x3f
 116:	d845      	bhi.n	1a4 <__adddf3+0x1a4>
shr():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:505
 118:	f006 053f 	and.w	r5, r6, #63	; 0x3f
wrapping_sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2863
 11c:	4276      	negs	r6, r6
shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:396
 11e:	f006 063f 	and.w	r6, r6, #63	; 0x3f
shr():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:505
 122:	f1c5 0420 	rsb	r4, r5, #32
shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:396
 126:	f1c6 0220 	rsb	r2, r6, #32
shr():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:505
 12a:	f1a5 0b20 	sub.w	fp, r5, #32
 12e:	fa23 f705 	lsr.w	r7, r3, r5
 132:	fa0e f404 	lsl.w	r4, lr, r4
shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:396
 136:	fa23 f202 	lsr.w	r2, r3, r2
shr():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:505
 13a:	433c      	orrs	r4, r7
 13c:	f1bb 0f00 	cmp.w	fp, #0
shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:396
 140:	fa0e f906 	lsl.w	r9, lr, r6
 144:	ea42 0209 	orr.w	r2, r2, r9
 148:	f1a6 0720 	sub.w	r7, r6, #32
shr():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:505
 14c:	bfa8      	it	ge
 14e:	fa2e f40b 	lsrge.w	r4, lr, fp
shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:396
 152:	2f00      	cmp	r7, #0
 154:	bfa8      	it	ge
 156:	fa03 f207 	lslge.w	r2, r3, r7
 15a:	fa03 f306 	lsl.w	r3, r3, r6
 15e:	bfa8      	it	ge
 160:	2300      	movge	r3, #0
ne():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/cmp.rs:896
 162:	431a      	orrs	r2, r3
 164:	bf18      	it	ne
 166:	2201      	movne	r2, #1
bitor():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:219
 168:	ea44 0302 	orr.w	r3, r4, r2
shr():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:505
 16c:	fa2e fe05 	lsr.w	lr, lr, r5
 170:	f1bb 0f00 	cmp.w	fp, #0
 174:	bfa8      	it	ge
 176:	f04f 0e00 	movge.w	lr, #0
 17a:	e016      	b.n	1aa <__adddf3+0x1aa>
add<f64>():
 17c:	2600      	movs	r6, #0
gt():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/cmp.rs:980
 17e:	1e42      	subs	r2, r0, #1
 180:	f6c7 76f0 	movt	r6, #32752	; 0x7ff0
 184:	eb74 0206 	sbcs.w	r2, r4, r6
add<f64>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/add.rs:36
 188:	d303      	bcc.n	192 <__adddf3+0x192>
bitor():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:219
 18a:	f444 2c00 	orr.w	ip, r4, #524288	; 0x80000
 18e:	4686      	mov	lr, r0
 190:	e0d0      	b.n	334 <__adddf3+0x334>
gt():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/cmp.rs:980
 192:	f1be 0201 	subs.w	r2, lr, #1
 196:	eb78 0206 	sbcs.w	r2, r8, r6
add<f64>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/add.rs:40
 19a:	f0c0 8096 	bcc.w	2ca <__adddf3+0x2ca>
bitor():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:219
 19e:	f448 2c00 	orr.w	ip, r8, #524288	; 0x80000
 1a2:	e0c7      	b.n	334 <__adddf3+0x334>
add<f64>():
 1a4:	f04f 0e00 	mov.w	lr, #0
 1a8:	2301      	movs	r3, #1
 1aa:	f44a 0200 	orr.w	r2, sl, #8388608	; 0x800000
 1ae:	00c0      	lsls	r0, r0, #3
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/add.rs:124
 1b0:	f1b8 3fff 	cmp.w	r8, #4294967295	; 0xffffffff
 1b4:	dd0e      	ble.n	1d4 <__adddf3+0x1d4>
add_assign():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/arith.rs:698
 1b6:	18c0      	adds	r0, r0, r3
 1b8:	eb4e 0302 	adc.w	r3, lr, r2
add<f64>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/add.rs:144
 1bc:	01da      	lsls	r2, r3, #7
 1be:	d532      	bpl.n	226 <__adddf3+0x226>
shr():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:505
 1c0:	ea5f 0353 	movs.w	r3, r3, lsr #1
add<f64>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/add.rs:147
 1c4:	f10c 0c01 	add.w	ip, ip, #1
shr():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:505
 1c8:	ea4f 0230 	mov.w	r2, r0, rrx
bitand():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:135
 1cc:	f000 0001 	and.w	r0, r0, #1
bitor():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:219
 1d0:	4310      	orrs	r0, r2
 1d2:	e028      	b.n	226 <__adddf3+0x226>
wrapping_sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2863
 1d4:	1ac0      	subs	r0, r0, r3
 1d6:	eb62 030e 	sbc.w	r3, r2, lr
 1da:	f04f 0e00 	mov.w	lr, #0
eq():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/cmp.rs:894
 1de:	ea50 0203 	orrs.w	r2, r0, r3
add<f64>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/add.rs:127
 1e2:	f000 808e 	beq.w	302 <__adddf3+0x302>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/add.rs:133
 1e6:	ebbe 5fd3 	cmp.w	lr, r3, lsr #23
 1ea:	d11c      	bne.n	226 <__adddf3+0x226>
leading_zeros():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2239
 1ec:	fab0 f280 	clz	r2, r0
 1f0:	2b00      	cmp	r3, #0
 1f2:	f102 0220 	add.w	r2, r2, #32
 1f6:	bf18      	it	ne
 1f8:	fab3 f283 	clzne	r2, r3
add<f64>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/add.rs:134
 1fc:	3a08      	subs	r2, #8
shl_assign():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:759
 1fe:	f002 073f 	and.w	r7, r2, #63	; 0x3f
add<f64>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/add.rs:137
 202:	ebac 0c02 	sub.w	ip, ip, r2
shl_assign():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:759
 206:	f1c7 0620 	rsb	r6, r7, #32
 20a:	40bb      	lsls	r3, r7
 20c:	fa20 f606 	lsr.w	r6, r0, r6
 210:	4333      	orrs	r3, r6
 212:	f1a7 0620 	sub.w	r6, r7, #32
 216:	2e00      	cmp	r6, #0
 218:	bfa8      	it	ge
 21a:	fa00 f306 	lslge.w	r3, r0, r6
 21e:	fa00 f007 	lsl.w	r0, r0, r7
 222:	bfa8      	it	ge
 224:	2000      	movge	r0, #0
add<f64>():
 226:	f001 4100 	and.w	r1, r1, #2147483648	; 0x80000000
 22a:	f240 72ff 	movw	r2, #2047	; 0x7ff
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/add.rs:152
 22e:	4594      	cmp	ip, r2
 230:	db06      	blt.n	240 <__adddf3+0x240>
bitor():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:219
 232:	f041 40e0 	orr.w	r0, r1, #1879048192	; 0x70000000
 236:	f04f 0e00 	mov.w	lr, #0
 23a:	f040 6c7f 	orr.w	ip, r0, #267386880	; 0xff00000
 23e:	e079      	b.n	334 <__adddf3+0x334>
add<f64>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/add.rs:156
 240:	f1bc 0f00 	cmp.w	ip, #0
 244:	dc32      	bgt.n	2ac <__adddf3+0x2ac>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/add.rs:159
 246:	f1cc 0201 	rsb	r2, ip, #1
shr():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:505
 24a:	f002 073f 	and.w	r7, r2, #63	; 0x3f
wrapping_sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2863
 24e:	4252      	negs	r2, r2
shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:396
 250:	f002 023f 	and.w	r2, r2, #63	; 0x3f
shr():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:505
 254:	f1c7 0520 	rsb	r5, r7, #32
shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:396
 258:	f1c2 0420 	rsb	r4, r2, #32
shr():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:505
 25c:	f1a7 0e20 	sub.w	lr, r7, #32
 260:	fa20 f607 	lsr.w	r6, r0, r7
 264:	fa03 f505 	lsl.w	r5, r3, r5
shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:396
 268:	fa20 f404 	lsr.w	r4, r0, r4
shr():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:505
 26c:	432e      	orrs	r6, r5
 26e:	f1be 0f00 	cmp.w	lr, #0
shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:396
 272:	fa03 fc02 	lsl.w	ip, r3, r2
 276:	ea44 040c 	orr.w	r4, r4, ip
 27a:	f1a2 0520 	sub.w	r5, r2, #32
shr():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:505
 27e:	bfa8      	it	ge
 280:	fa23 f60e 	lsrge.w	r6, r3, lr
shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:396
 284:	2d00      	cmp	r5, #0
 286:	bfa8      	it	ge
 288:	fa00 f405 	lslge.w	r4, r0, r5
 28c:	fa00 f002 	lsl.w	r0, r0, r2
 290:	bfa8      	it	ge
 292:	2000      	movge	r0, #0
shr():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:505
 294:	40fb      	lsrs	r3, r7
ne():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/cmp.rs:896
 296:	4320      	orrs	r0, r4
 298:	f04f 0c00 	mov.w	ip, #0
 29c:	bf18      	it	ne
 29e:	2001      	movne	r0, #1
shr():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:505
 2a0:	f1be 0f00 	cmp.w	lr, #0
bitor():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:219
 2a4:	ea40 0006 	orr.w	r0, r0, r6
shr():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:505
 2a8:	bfa8      	it	ge
 2aa:	2300      	movge	r3, #0
 2ac:	08c2      	lsrs	r2, r0, #3
 2ae:	ea42 7e43 	orr.w	lr, r2, r3, lsl #29
bitand():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:135
 2b2:	f3c3 02d3 	ubfx	r2, r3, #3, #20
add<f64>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/add.rs:167
 2b6:	f000 0007 	and.w	r0, r0, #7
bitor_assign():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:661
 2ba:	4311      	orrs	r1, r2
add<f64>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/add.rs:178
 2bc:	2805      	cmp	r0, #5
bitor_assign():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:661
 2be:	ea41 5c0c 	orr.w	ip, r1, ip, lsl #20
add<f64>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/add.rs:178
 2c2:	d315      	bcc.n	2f0 <__adddf3+0x2f0>
add_assign():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/arith.rs:698
 2c4:	f11e 0e01 	adds.w	lr, lr, #1
 2c8:	e018      	b.n	2fc <__adddf3+0x2fc>
eq():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/cmp.rs:894
 2ca:	ea84 0206 	eor.w	r2, r4, r6
 2ce:	4302      	orrs	r2, r0
add<f64>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/add.rs:44
 2d0:	d11a      	bne.n	308 <__adddf3+0x308>
bitxor():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:306
 2d2:	ea8c 0301 	eor.w	r3, ip, r1
 2d6:	ea8e 0200 	eor.w	r2, lr, r0
eq():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/cmp.rs:894
 2da:	f083 4300 	eor.w	r3, r3, #2147483648	; 0x80000000
 2de:	ea52 0e03 	orrs.w	lr, r2, r3
add<f64>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/add.rs:46
 2e2:	bf06      	itte	eq
 2e4:	2100      	moveq	r1, #0
 2e6:	f6c7 71f8 	movteq	r1, #32760	; 0x7ff8
 2ea:	4686      	movne	lr, r0
 2ec:	468c      	mov	ip, r1
 2ee:	e021      	b.n	334 <__adddf3+0x334>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/add.rs:179
 2f0:	2804      	cmp	r0, #4
 2f2:	d11f      	bne.n	334 <__adddf3+0x334>
bitand():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:135
 2f4:	f00e 0001 	and.w	r0, lr, #1
add_assign():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/arith.rs:698
 2f8:	eb1e 0e00 	adds.w	lr, lr, r0
add<f64>():
 2fc:	f14c 0c00 	adc.w	ip, ip, #0
 300:	e018      	b.n	334 <__adddf3+0x334>
 302:	f04f 0c00 	mov.w	ip, #0
 306:	e015      	b.n	334 <__adddf3+0x334>
eq():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/cmp.rs:894
 308:	ea88 0206 	eor.w	r2, r8, r6
 30c:	ea52 020e 	orrs.w	r2, r2, lr
add<f64>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/add.rs:55
 310:	d010      	beq.n	334 <__adddf3+0x334>
eq():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/cmp.rs:894
 312:	ea50 0204 	orrs.w	r2, r0, r4
add<f64>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/add.rs:60
 316:	d006      	beq.n	326 <__adddf3+0x326>
 318:	ea5e 0208 	orrs.w	r2, lr, r8
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/add.rs:70
 31c:	f47f ae8f 	bne.w	3e <__adddf3+0x3e>
 320:	4686      	mov	lr, r0
 322:	468c      	mov	ip, r1
 324:	e006      	b.n	334 <__adddf3+0x334>
 326:	ea5e 0208 	orrs.w	r2, lr, r8
bitand():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:135
 32a:	bf04      	itt	eq
 32c:	ea0e 0e00 	andeq.w	lr, lr, r0
 330:	ea0c 0c01 	andeq.w	ip, ip, r1
__adddf3():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:216
 334:	4670      	mov	r0, lr
 336:	4661      	mov	r1, ip
 338:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}

Disassembly of section .text.__aeabi_dadd:

00000000 <__aeabi_dadd>:
__aeabi_dadd():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/add.rs:184
   0:	f7ff bffe 	b.w	0 <__aeabi_dadd>

Disassembly of section .text.__addsf3vfp:

00000000 <__addsf3vfp>:
__addsf3vfp():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:254
   0:	b580      	push	{r7, lr}
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/add.rs:199
   2:	f7ff fffe 	bl	0 <__addsf3vfp>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
   6:	bd80      	pop	{r7, pc}

Disassembly of section .text.__adddf3vfp:

00000000 <__adddf3vfp>:
__adddf3vfp():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:254
   0:	b580      	push	{r7, lr}
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/add.rs:204
   2:	f7ff fffe 	bl	0 <__adddf3vfp>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
   6:	bd80      	pop	{r7, pc}

Disassembly of section .text.__powisf2:

00000000 <__powisf2>:
__powisf2():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:254
   0:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
   4:	4606      	mov	r6, r0
pow<f32>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/pow.rs:11
   6:	07c8      	lsls	r0, r1, #31
   8:	4635      	mov	r5, r6
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/pow.rs:15
   a:	f101 0001 	add.w	r0, r1, #1
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/pow.rs:11
   e:	bf08      	it	eq
  10:	f04f 557e 	moveq.w	r5, #1065353216	; 0x3f800000
  14:	4688      	mov	r8, r1
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/pow.rs:15
  16:	2803      	cmp	r0, #3
  18:	d314      	bcc.n	44 <__powisf2+0x44>
  1a:	2701      	movs	r7, #1
  1c:	4644      	mov	r4, r8
mul_assign():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/arith.rs:801
  1e:	4630      	mov	r0, r6
  20:	4631      	mov	r1, r6
  22:	f7ff fffe 	bl	0 <__powisf2>
  26:	4606      	mov	r6, r0
  28:	4628      	mov	r0, r5
  2a:	4631      	mov	r1, r6
  2c:	f7ff fffe 	bl	0 <__powisf2>
checked_div():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:673
  30:	eb04 71d4 	add.w	r1, r4, r4, lsr #31
  34:	104c      	asrs	r4, r1, #1
pow<f32>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/pow.rs:11
  36:	07e2      	lsls	r2, r4, #31
  38:	bf18      	it	ne
  3a:	4605      	movne	r5, r0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/pow.rs:15
  3c:	eb07 0061 	add.w	r0, r7, r1, asr #1
  40:	2802      	cmp	r0, #2
  42:	d8ec      	bhi.n	1e <__powisf2+0x1e>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/pow.rs:21
  44:	f04f 507e 	mov.w	r0, #1065353216	; 0x3f800000
  48:	4629      	mov	r1, r5
  4a:	f7ff fffe 	bl	0 <__powisf2>
  4e:	f1b8 0f00 	cmp.w	r8, #0
  52:	bfa8      	it	ge
  54:	4628      	movge	r0, r5
__powisf2():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
  56:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}

Disassembly of section .text.__powidf2:

00000000 <__powidf2>:
__powidf2():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:254
   0:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
   4:	b081      	sub	sp, #4
   6:	4604      	mov	r4, r0
pow<f64>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/pow.rs:11
   8:	f012 0001 	ands.w	r0, r2, #1
   c:	f1c0 0000 	rsb	r0, r0, #0
  10:	468a      	mov	sl, r1
  12:	ea00 0604 	and.w	r6, r0, r4
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/pow.rs:15
  16:	f102 0001 	add.w	r0, r2, #1
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/pow.rs:11
  1a:	bf04      	itt	eq
  1c:	f240 0a00 	movweq	sl, #0
  20:	f6c3 7af0 	movteq	sl, #16368	; 0x3ff0
  24:	4690      	mov	r8, r2
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/pow.rs:15
  26:	2803      	cmp	r0, #3
  28:	d31f      	bcc.n	6a <__powidf2+0x6a>
  2a:	460f      	mov	r7, r1
  2c:	f04f 0901 	mov.w	r9, #1
  30:	4645      	mov	r5, r8
mul_assign():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/arith.rs:801
  32:	4620      	mov	r0, r4
  34:	4639      	mov	r1, r7
  36:	4622      	mov	r2, r4
  38:	463b      	mov	r3, r7
  3a:	f7ff fffe 	bl	0 <__powidf2>
  3e:	4604      	mov	r4, r0
  40:	460f      	mov	r7, r1
checked_div():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:673
  42:	eb05 75d5 	add.w	r5, r5, r5, lsr #31
mul_assign():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/arith.rs:801
  46:	4630      	mov	r0, r6
  48:	4651      	mov	r1, sl
  4a:	4622      	mov	r2, r4
  4c:	463b      	mov	r3, r7
pow<f64>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/pow.rs:11
  4e:	ea09 0b65 	and.w	fp, r9, r5, asr #1
mul_assign():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/arith.rs:801
  52:	f7ff fffe 	bl	0 <__powidf2>
pow<f64>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/pow.rs:11
  56:	f1bb 0f00 	cmp.w	fp, #0
  5a:	bf1c      	itt	ne
  5c:	468a      	movne	sl, r1
  5e:	4606      	movne	r6, r0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/pow.rs:15
  60:	eb09 0065 	add.w	r0, r9, r5, asr #1
checked_div():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:673
  64:	106d      	asrs	r5, r5, #1
pow<f64>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/pow.rs:15
  66:	2802      	cmp	r0, #2
  68:	d8e3      	bhi.n	32 <__powidf2+0x32>
  6a:	2100      	movs	r1, #0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/pow.rs:21
  6c:	2000      	movs	r0, #0
  6e:	f6c3 71f0 	movt	r1, #16368	; 0x3ff0
  72:	4632      	mov	r2, r6
  74:	4653      	mov	r3, sl
  76:	f7ff fffe 	bl	0 <__powidf2>
  7a:	f1b8 0f00 	cmp.w	r8, #0
  7e:	bfa4      	itt	ge
  80:	4630      	movge	r0, r6
  82:	4651      	movge	r1, sl
__powidf2():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
  84:	b001      	add	sp, #4
  86:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}

Disassembly of section .text.__subsf3:

00000000 <__subsf3>:
__subsf3():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/sub.rs:8
   0:	f081 4100 	eor.w	r1, r1, #2147483648	; 0x80000000
   4:	f7ff bffe 	b.w	0 <__subsf3>

Disassembly of section .text.__aeabi_fsub:

00000000 <__aeabi_fsub>:
__aeabi_fsub():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/sub.rs:8
   0:	f081 4100 	eor.w	r1, r1, #2147483648	; 0x80000000
   4:	f7ff bffe 	b.w	0 <__aeabi_fsub>

Disassembly of section .text.__subdf3:

00000000 <__subdf3>:
__subdf3():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/sub.rs:13
   0:	f083 4300 	eor.w	r3, r3, #2147483648	; 0x80000000
   4:	f7ff bffe 	b.w	0 <__subdf3>

Disassembly of section .text.__aeabi_dsub:

00000000 <__aeabi_dsub>:
__aeabi_dsub():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/sub.rs:13
   0:	f083 4300 	eor.w	r3, r3, #2147483648	; 0x80000000
   4:	f7ff bffe 	b.w	0 <__aeabi_dsub>

Disassembly of section .text.__subsf3vfp:

00000000 <__subsf3vfp>:
__subsf3vfp():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:254
   0:	b580      	push	{r7, lr}
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/sub.rs:18
   2:	f7ff fffe 	bl	0 <__subsf3vfp>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
   6:	bd80      	pop	{r7, pc}

Disassembly of section .text.__subdf3vfp:

00000000 <__subdf3vfp>:
__subdf3vfp():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:254
   0:	b580      	push	{r7, lr}
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/sub.rs:23
   2:	f7ff fffe 	bl	0 <__subdf3vfp>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
   6:	bd80      	pop	{r7, pc}

Disassembly of section .text.__mulsf3:

00000000 <__mulsf3>:
__mulsf3():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:214
   0:	b570      	push	{r4, r5, r6, lr}
   2:	4602      	mov	r2, r0
bitxor():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:306
   4:	4048      	eors	r0, r1
bitand():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:135
   6:	468c      	mov	ip, r1
   8:	4613      	mov	r3, r2
   a:	f3c1 5ec7 	ubfx	lr, r1, #23, #8
   e:	f3c2 54c7 	ubfx	r4, r2, #23, #8
wrapping_sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2863
  12:	1e65      	subs	r5, r4, #1
bitand():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:135
  14:	f000 4000 	and.w	r0, r0, #2147483648	; 0x80000000
  18:	f36f 5cdf 	bfc	ip, #23, #9
  1c:	f36f 53df 	bfc	r3, #23, #9
mul<f32>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mul.rs:43
  20:	2dfd      	cmp	r5, #253	; 0xfd
  22:	bf9c      	itt	ls
  24:	f1ae 0501 	subls.w	r5, lr, #1
  28:	2dfe      	cmpls	r5, #254	; 0xfe
  2a:	d307      	bcc.n	3c <__mulsf3+0x3c>
bitand():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:135
  2c:	f022 4600 	bic.w	r6, r2, #2147483648	; 0x80000000
mul<f32>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mul.rs:50
  30:	f1b6 4fff 	cmp.w	r6, #2139095040	; 0x7f800000
  34:	d922      	bls.n	7c <__mulsf3+0x7c>
bitor():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:219
  36:	f442 0080 	orr.w	r0, r2, #4194304	; 0x400000
__mulsf3():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:216
  3a:	bd70      	pop	{r4, r5, r6, pc}
  3c:	2100      	movs	r1, #0
wrapping_add():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:1006
  3e:	eb0e 0204 	add.w	r2, lr, r4
  42:	1856      	adds	r6, r2, r1
  44:	f04f 4100 	mov.w	r1, #2147483648	; 0x80000000
shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:396
  48:	ea41 210c 	orr.w	r1, r1, ip, lsl #8
bitor_assign():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:661
  4c:	f443 0200 	orr.w	r2, r3, #8388608	; 0x800000
wrapping_mul():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2884
  50:	fba1 1202 	umull	r1, r2, r1, r2
mul<f32>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mul.rs:126
  54:	0213      	lsls	r3, r2, #8
  56:	d419      	bmi.n	8c <__mulsf3+0x8c>
wide_shift_left():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:278
  58:	0fcb      	lsrs	r3, r1, #31
  5a:	ea43 0242 	orr.w	r2, r3, r2, lsl #1
wrapping_sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:1027
  5e:	f1a6 037f 	sub.w	r3, r6, #127	; 0x7f
wide_shift_left():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:279
  62:	0049      	lsls	r1, r1, #1
mul<f32>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mul.rs:133
  64:	2bff      	cmp	r3, #255	; 0xff
  66:	da15      	bge.n	94 <__mulsf3+0x94>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mul.rs:137
  68:	2b00      	cmp	r3, #0
  6a:	dd26      	ble.n	ba <__mulsf3+0xba>
  6c:	f64f 76ff 	movw	r6, #65535	; 0xffff
  70:	f2c0 067f 	movt	r6, #127	; 0x7f
bitand_assign():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:612
  74:	4032      	ands	r2, r6
bitor_assign():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:661
  76:	ea42 52c3 	orr.w	r2, r2, r3, lsl #23
  7a:	e02c      	b.n	d6 <__mulsf3+0xd6>
mul<f32>():
  7c:	f021 4500 	bic.w	r5, r1, #2147483648	; 0x80000000
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mul.rs:54
  80:	f1b5 4fff 	cmp.w	r5, #2139095040	; 0x7f800000
  84:	d909      	bls.n	9a <__mulsf3+0x9a>
bitor():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:219
  86:	f441 0080 	orr.w	r0, r1, #4194304	; 0x400000
__mulsf3():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:216
  8a:	bd70      	pop	{r4, r5, r6, pc}
wrapping_add():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:1006
  8c:	f1a6 037e 	sub.w	r3, r6, #126	; 0x7e
mul<f32>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mul.rs:133
  90:	2bff      	cmp	r3, #255	; 0xff
  92:	dbe9      	blt.n	68 <__mulsf3+0x68>
bitor():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:219
  94:	f040 40ff 	orr.w	r0, r0, #2139095040	; 0x7f800000
__mulsf3():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:216
  98:	bd70      	pop	{r4, r5, r6, pc}
mul<f32>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mul.rs:58
  9a:	f1b6 4fff 	cmp.w	r6, #2139095040	; 0x7f800000
  9e:	d104      	bne.n	aa <__mulsf3+0xaa>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mul.rs:59
  a0:	b325      	cbz	r5, ec <__mulsf3+0xec>
bitor():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:219
  a2:	f001 4000 	and.w	r0, r1, #2147483648	; 0x80000000
  a6:	4050      	eors	r0, r2
__mulsf3():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:216
  a8:	bd70      	pop	{r4, r5, r6, pc}
mul<f32>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mul.rs:68
  aa:	f1b5 4fff 	cmp.w	r5, #2139095040	; 0x7f800000
  ae:	d121      	bne.n	f4 <__mulsf3+0xf4>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mul.rs:69
  b0:	b1e6      	cbz	r6, ec <__mulsf3+0xec>
bitor():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:219
  b2:	f002 4000 	and.w	r0, r2, #2147483648	; 0x80000000
  b6:	4048      	eors	r0, r1
__mulsf3():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:216
  b8:	bd70      	pop	{r4, r5, r6, pc}
wrapping_sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2863
  ba:	f1c3 0301 	rsb	r3, r3, #1
mul<f32>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mul.rs:145
  be:	2b1f      	cmp	r3, #31
  c0:	dc1c      	bgt.n	fc <__mulsf3+0xfc>
wide_shift_right_with_sticky():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:284
  c2:	425e      	negs	r6, r3
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:285
  c4:	41d9      	rors	r1, r3
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:284
  c6:	f006 061f 	and.w	r6, r6, #31
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:285
  ca:	f003 031f 	and.w	r3, r3, #31
  ce:	fa02 f606 	lsl.w	r6, r2, r6
  d2:	4331      	orrs	r1, r6
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:286
  d4:	40da      	lsrs	r2, r3
bitor_assign():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:661
  d6:	4310      	orrs	r0, r2
mul<f32>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mul.rs:168
  d8:	f1b1 4f00 	cmp.w	r1, #2147483648	; 0x80000000
  dc:	d901      	bls.n	e2 <__mulsf3+0xe2>
add_assign():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/arith.rs:698
  de:	3001      	adds	r0, #1
__mulsf3():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:216
  e0:	bd70      	pop	{r4, r5, r6, pc}
bitand():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:135
  e2:	bf04      	itt	eq
  e4:	f002 0101 	andeq.w	r1, r2, #1
add_assign():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/arith.rs:698
  e8:	4408      	addeq	r0, r1
__mulsf3():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:216
  ea:	bd70      	pop	{r4, r5, r6, pc}
  ec:	2000      	movs	r0, #0
  ee:	f6c7 70c0 	movt	r0, #32704	; 0x7fc0
  f2:	bd70      	pop	{r4, r5, r6, pc}
mul<f32>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mul.rs:79
  f4:	2e00      	cmp	r6, #0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mul.rs:84
  f6:	bf18      	it	ne
  f8:	2d00      	cmpne	r5, #0
  fa:	d100      	bne.n	fe <__mulsf3+0xfe>
__mulsf3():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:216
  fc:	bd70      	pop	{r4, r5, r6, pc}
  fe:	2200      	movs	r2, #0
mul<f32>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mul.rs:91
 100:	ebb2 5fd6 	cmp.w	r2, r6, lsr #23
 104:	f04f 0100 	mov.w	r1, #0
 108:	d108      	bne.n	11c <__mulsf3+0x11c>
leading_zeros():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2239
 10a:	fab3 f183 	clz	r1, r3
wrapping_sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2863
 10e:	f101 0618 	add.w	r6, r1, #24
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:1027
 112:	f1c1 0109 	rsb	r1, r1, #9
normalize():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mod.rs:128
 116:	f006 061f 	and.w	r6, r6, #31
 11a:	40b3      	lsls	r3, r6
mul<f32>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mul.rs:97
 11c:	ebb2 5fd5 	cmp.w	r2, r5, lsr #23
 120:	f47f af8d 	bne.w	3e <__mulsf3+0x3e>
leading_zeros():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2239
 124:	fabc f28c 	clz	r2, ip
wrapping_sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:1027
 128:	f1c2 0509 	rsb	r5, r2, #9
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2863
 12c:	3218      	adds	r2, #24
normalize():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mod.rs:128
 12e:	f002 021f 	and.w	r2, r2, #31
mul<f32>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mul.rs:99
 132:	4429      	add	r1, r5
normalize():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mod.rs:128
 134:	fa0c fc02 	lsl.w	ip, ip, r2
 138:	e781      	b.n	3e <__mulsf3+0x3e>

Disassembly of section .text.__aeabi_fmul:

00000000 <__aeabi_fmul>:
__aeabi_fmul():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mul.rs:179
   0:	f7ff bffe 	b.w	0 <__aeabi_fmul>

Disassembly of section .text.__muldf3:

00000000 <__muldf3>:
__muldf3():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:214
   0:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
   4:	b085      	sub	sp, #20
bitand():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:135
   6:	f3c3 590a 	ubfx	r9, r3, #20, #11
bitxor():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:306
   a:	ea83 0501 	eor.w	r5, r3, r1
bitand():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:135
   e:	f005 4600 	and.w	r6, r5, #2147483648	; 0x80000000
  12:	9604      	str	r6, [sp, #16]
wrapping_sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2863
  14:	f1b9 0701 	subs.w	r7, r9, #1
bitand():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:135
  18:	f3c1 5a0a 	ubfx	sl, r1, #20, #11
  1c:	469e      	mov	lr, r3
  1e:	468b      	mov	fp, r1
  20:	f04f 0800 	mov.w	r8, #0
wrapping_sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2863
  24:	f168 0c00 	sbc.w	ip, r8, #0
  28:	f1ba 0501 	subs.w	r5, sl, #1
  2c:	f240 74fd 	movw	r4, #2045	; 0x7fd
  30:	f168 0600 	sbc.w	r6, r8, #0
ge():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/cmp.rs:978
  34:	1b64      	subs	r4, r4, r5
bitand():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:135
  36:	f36f 5e1f 	bfc	lr, #20, #12
  3a:	f36f 5b1f 	bfc	fp, #20, #12
ge():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/cmp.rs:978
  3e:	eb78 0406 	sbcs.w	r4, r8, r6
mul<f64>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mul.rs:43
  42:	d32d      	bcc.n	a0 <__muldf3+0xa0>
  44:	f240 74fe 	movw	r4, #2046	; 0x7fe
  48:	1b3c      	subs	r4, r7, r4
  4a:	f17c 0700 	sbcs.w	r7, ip, #0
  4e:	d227      	bcs.n	a0 <__muldf3+0xa0>
bitor_assign():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:661
  50:	f44b 1380 	orr.w	r3, fp, #1048576	; 0x100000
  54:	2100      	movs	r1, #0
wrapping_mul():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2884
  56:	e9cd 0300 	strd	r0, r3, [sp]
shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:396
  5a:	ea4f 20ce 	mov.w	r0, lr, lsl #11
  5e:	ea40 5052 	orr.w	r0, r0, r2, lsr #21
wrapping_mul():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2884
  62:	e9cd 1102 	strd	r1, r1, [sp, #8]
shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:396
  66:	f040 4100 	orr.w	r1, r0, #2147483648	; 0x80000000
  6a:	02d0      	lsls	r0, r2, #11
wrapping_mul():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2884
  6c:	2200      	movs	r2, #0
  6e:	2300      	movs	r3, #0
  70:	f7ff fffe 	bl	0 <__muldf3>
  74:	4683      	mov	fp, r0
  76:	4610      	mov	r0, r2
wrapping_add():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:1006
  78:	eb09 020a 	add.w	r2, r9, sl
mul<f64>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mul.rs:126
  7c:	02df      	lsls	r7, r3, #11
wrapping_add():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:1006
  7e:	4442      	add	r2, r8
mul<f64>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mul.rs:126
  80:	d41a      	bmi.n	b8 <__muldf3+0xb8>
wide_shift_left():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:279
  82:	004f      	lsls	r7, r1, #1
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:278
  84:	005b      	lsls	r3, r3, #1
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:279
  86:	ea47 77db 	orr.w	r7, r7, fp, lsr #31
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:278
  8a:	ea43 73d0 	orr.w	r3, r3, r0, lsr #31
  8e:	0fc9      	lsrs	r1, r1, #31
  90:	ea41 0040 	orr.w	r0, r1, r0, lsl #1
wrapping_sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:1027
  94:	f2a2 32ff 	subw	r2, r2, #1023	; 0x3ff
wide_shift_left():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:279
  98:	ea4f 0b4b 	mov.w	fp, fp, lsl #1
mul<f64>():
  9c:	4639      	mov	r1, r7
  9e:	e00d      	b.n	bc <__muldf3+0xbc>
  a0:	2400      	movs	r4, #0
bitand():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:135
  a2:	f021 4600 	bic.w	r6, r1, #2147483648	; 0x80000000
gt():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/cmp.rs:980
  a6:	1e47      	subs	r7, r0, #1
  a8:	f6c7 74f0 	movt	r4, #32752	; 0x7ff0
  ac:	eb76 0704 	sbcs.w	r7, r6, r4
mul<f64>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mul.rs:50
  b0:	d316      	bcc.n	e0 <__muldf3+0xe0>
bitor():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:219
  b2:	f441 2400 	orr.w	r4, r1, #524288	; 0x80000
  b6:	e0a3      	b.n	200 <__muldf3+0x200>
wrapping_add():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:1006
  b8:	f2a2 32fe 	subw	r2, r2, #1022	; 0x3fe
mul<f64>():
  bc:	9c04      	ldr	r4, [sp, #16]
  be:	f240 77ff 	movw	r7, #2047	; 0x7ff
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mul.rs:133
  c2:	42ba      	cmp	r2, r7
  c4:	db05      	blt.n	d2 <__muldf3+0xd2>
bitor():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:219
  c6:	f044 40e0 	orr.w	r0, r4, #1879048192	; 0x70000000
  ca:	f040 647f 	orr.w	r4, r0, #267386880	; 0xff00000
  ce:	2000      	movs	r0, #0
  d0:	e096      	b.n	200 <__muldf3+0x200>
mul<f64>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mul.rs:137
  d2:	2a00      	cmp	r2, #0
  d4:	dd1b      	ble.n	10e <__muldf3+0x10e>
bitand_assign():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:612
  d6:	f36f 531f 	bfc	r3, #20, #12
bitor_assign():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:661
  da:	ea43 5202 	orr.w	r2, r3, r2, lsl #20
  de:	e07c      	b.n	1da <__muldf3+0x1da>
mul<f64>():
  e0:	f023 4c00 	bic.w	ip, r3, #2147483648	; 0x80000000
gt():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/cmp.rs:980
  e4:	1e55      	subs	r5, r2, #1
  e6:	eb7c 0504 	sbcs.w	r5, ip, r4
mul<f64>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mul.rs:54
  ea:	d303      	bcc.n	f4 <__muldf3+0xf4>
bitor():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:219
  ec:	f443 2400 	orr.w	r4, r3, #524288	; 0x80000
mul<f64>():
  f0:	4610      	mov	r0, r2
  f2:	e085      	b.n	200 <__muldf3+0x200>
eq():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/cmp.rs:894
  f4:	ea86 0504 	eor.w	r5, r6, r4
  f8:	4305      	orrs	r5, r0
mul<f64>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mul.rs:58
  fa:	d10e      	bne.n	11a <__muldf3+0x11a>
ne():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/cmp.rs:896
  fc:	ea52 020c 	orrs.w	r2, r2, ip
mul<f64>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mul.rs:59
 100:	f000 8082 	beq.w	208 <__muldf3+0x208>
bitor():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:219
 104:	f003 4200 	and.w	r2, r3, #2147483648	; 0x80000000
 108:	ea82 0401 	eor.w	r4, r2, r1
 10c:	e078      	b.n	200 <__muldf3+0x200>
wrapping_sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2863
 10e:	f1c2 0701 	rsb	r7, r2, #1
mul<f64>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mul.rs:145
 112:	2f3f      	cmp	r7, #63	; 0x3f
 114:	dd0d      	ble.n	132 <__muldf3+0x132>
 116:	2000      	movs	r0, #0
 118:	e072      	b.n	200 <__muldf3+0x200>
eq():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/cmp.rs:894
 11a:	ea84 040c 	eor.w	r4, r4, ip
 11e:	4314      	orrs	r4, r2
mul<f64>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mul.rs:68
 120:	d177      	bne.n	212 <__muldf3+0x212>
 122:	4330      	orrs	r0, r6
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mul.rs:69
 124:	d070      	beq.n	208 <__muldf3+0x208>
bitor():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:219
 126:	f001 4000 	and.w	r0, r1, #2147483648	; 0x80000000
 12a:	ea80 0403 	eor.w	r4, r0, r3
mul<f64>():
 12e:	4610      	mov	r0, r2
 130:	e066      	b.n	200 <__muldf3+0x200>
wide_shift_right_with_sticky():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:284
 132:	427a      	negs	r2, r7
 134:	f002 093f 	and.w	r9, r2, #63	; 0x3f
 138:	f1c9 0520 	rsb	r5, r9, #32
 13c:	f1a9 0820 	sub.w	r8, r9, #32
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:285
 140:	fa03 fc09 	lsl.w	ip, r3, r9
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:284
 144:	fa01 fe09 	lsl.w	lr, r1, r9
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:285
 148:	fa20 f605 	lsr.w	r6, r0, r5
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:284
 14c:	fa2b f505 	lsr.w	r5, fp, r5
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:285
 150:	ea4c 0c06 	orr.w	ip, ip, r6
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:284
 154:	ea45 060e 	orr.w	r6, r5, lr
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:285
 158:	f007 053f 	and.w	r5, r7, #63	; 0x3f
 15c:	f1b8 0f00 	cmp.w	r8, #0
 160:	bfa8      	it	ge
 162:	fa00 fc08 	lslge.w	ip, r0, r8
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:284
 166:	f1b8 0f00 	cmp.w	r8, #0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:285
 16a:	fa21 f205 	lsr.w	r2, r1, r5
 16e:	f1a5 0720 	sub.w	r7, r5, #32
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:284
 172:	bfa8      	it	ge
 174:	fa0b f608 	lslge.w	r6, fp, r8
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:285
 178:	2f00      	cmp	r7, #0
 17a:	bfa8      	it	ge
 17c:	2200      	movge	r2, #0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:286
 17e:	fa20 fe05 	lsr.w	lr, r0, r5
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:285
 182:	4332      	orrs	r2, r6
 184:	f1c5 0620 	rsb	r6, r5, #32
 188:	ea4c 0c02 	orr.w	ip, ip, r2
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:286
 18c:	2f00      	cmp	r7, #0
 18e:	fa03 f206 	lsl.w	r2, r3, r6
 192:	ea4e 0e02 	orr.w	lr, lr, r2
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:285
 196:	fa2b f205 	lsr.w	r2, fp, r5
 19a:	fa01 f606 	lsl.w	r6, r1, r6
 19e:	ea42 0206 	orr.w	r2, r2, r6
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:286
 1a2:	bfa8      	it	ge
 1a4:	fa23 fe07 	lsrge.w	lr, r3, r7
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:285
 1a8:	2f00      	cmp	r7, #0
 1aa:	bfa8      	it	ge
 1ac:	fa21 f207 	lsrge.w	r2, r1, r7
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:284
 1b0:	fa0b f109 	lsl.w	r1, fp, r9
 1b4:	f1b8 0f00 	cmp.w	r8, #0
 1b8:	bfa8      	it	ge
 1ba:	2100      	movge	r1, #0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:285
 1bc:	fa00 f009 	lsl.w	r0, r0, r9
 1c0:	ea41 0102 	orr.w	r1, r1, r2
 1c4:	bfa8      	it	ge
 1c6:	2000      	movge	r0, #0
 1c8:	ea41 0b00 	orr.w	fp, r1, r0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:286
 1cc:	fa23 f205 	lsr.w	r2, r3, r5
mul<f64>():
 1d0:	4670      	mov	r0, lr
 1d2:	4661      	mov	r1, ip
wide_shift_right_with_sticky():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:286
 1d4:	2f00      	cmp	r7, #0
 1d6:	bfa8      	it	ge
 1d8:	2200      	movge	r2, #0
bitor_assign():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:661
 1da:	4314      	orrs	r4, r2
gt():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/cmp.rs:980
 1dc:	f1db 0200 	rsbs	r2, fp, #0
 1e0:	f04f 4300 	mov.w	r3, #2147483648	; 0x80000000
 1e4:	eb73 0201 	sbcs.w	r2, r3, r1
mul<f64>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mul.rs:168
 1e8:	d201      	bcs.n	1ee <__muldf3+0x1ee>
add_assign():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/arith.rs:698
 1ea:	3001      	adds	r0, #1
 1ec:	e006      	b.n	1fc <__muldf3+0x1fc>
eq():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/cmp.rs:894
 1ee:	4059      	eors	r1, r3
 1f0:	ea51 010b 	orrs.w	r1, r1, fp
mul<f64>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mul.rs:172
 1f4:	d104      	bne.n	200 <__muldf3+0x200>
bitand():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:135
 1f6:	f000 0101 	and.w	r1, r0, #1
add_assign():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/arith.rs:698
 1fa:	1840      	adds	r0, r0, r1
mul<f64>():
 1fc:	f144 0400 	adc.w	r4, r4, #0
__muldf3():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:216
 200:	4621      	mov	r1, r4
 202:	b005      	add	sp, #20
 204:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
 208:	2400      	movs	r4, #0
 20a:	2000      	movs	r0, #0
 20c:	f6c7 74f8 	movt	r4, #32760	; 0x7ff8
 210:	e7f6      	b.n	200 <__muldf3+0x200>
mul<f64>():
 212:	ea50 0106 	orrs.w	r1, r0, r6
eq():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/cmp.rs:894
 216:	bf18      	it	ne
 218:	ea52 010c 	orrsne.w	r1, r2, ip
 21c:	d102      	bne.n	224 <__muldf3+0x224>
mul<f64>():
 21e:	2000      	movs	r0, #0
 220:	9c04      	ldr	r4, [sp, #16]
 222:	e7ed      	b.n	200 <__muldf3+0x200>
 224:	2100      	movs	r1, #0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mul.rs:91
 226:	ebb1 5f16 	cmp.w	r1, r6, lsr #20
 22a:	f04f 0800 	mov.w	r8, #0
 22e:	d120      	bne.n	272 <__muldf3+0x272>
leading_zeros():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2239
 230:	fab0 f380 	clz	r3, r0
 234:	f1bb 0f00 	cmp.w	fp, #0
 238:	f103 0320 	add.w	r3, r3, #32
 23c:	bf18      	it	ne
 23e:	fabb f38b 	clzne	r3, fp
wrapping_sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2863
 242:	f103 0435 	add.w	r4, r3, #53	; 0x35
normalize():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mod.rs:128
 246:	f004 043f 	and.w	r4, r4, #63	; 0x3f
wrapping_sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:1027
 24a:	f1c3 080c 	rsb	r8, r3, #12
normalize():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mod.rs:128
 24e:	f1c4 0620 	rsb	r6, r4, #32
 252:	fa0b f504 	lsl.w	r5, fp, r4
 256:	fa20 f606 	lsr.w	r6, r0, r6
 25a:	ea46 0b05 	orr.w	fp, r6, r5
 25e:	f1a4 0520 	sub.w	r5, r4, #32
 262:	2d00      	cmp	r5, #0
 264:	bfa8      	it	ge
 266:	fa00 fb05 	lslge.w	fp, r0, r5
 26a:	fa00 f004 	lsl.w	r0, r0, r4
 26e:	bfa8      	it	ge
 270:	2000      	movge	r0, #0
mul<f64>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mul.rs:97
 272:	ebb1 5f1c 	cmp.w	r1, ip, lsr #20
 276:	f47f aeeb 	bne.w	50 <__muldf3+0x50>
leading_zeros():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2239
 27a:	fab2 f182 	clz	r1, r2
 27e:	f1be 0f00 	cmp.w	lr, #0
 282:	f101 0120 	add.w	r1, r1, #32
 286:	bf18      	it	ne
 288:	fabe f18e 	clzne	r1, lr
wrapping_sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2863
 28c:	f101 0335 	add.w	r3, r1, #53	; 0x35
normalize():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mod.rs:128
 290:	f003 033f 	and.w	r3, r3, #63	; 0x3f
wrapping_sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:1027
 294:	f1c1 010c 	rsb	r1, r1, #12
normalize():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mod.rs:128
 298:	f1c3 0620 	rsb	r6, r3, #32
mul<f64>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mul.rs:99
 29c:	4488      	add	r8, r1
normalize():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mod.rs:128
 29e:	fa0e f703 	lsl.w	r7, lr, r3
 2a2:	fa22 f606 	lsr.w	r6, r2, r6
 2a6:	ea46 0e07 	orr.w	lr, r6, r7
 2aa:	f1a3 0720 	sub.w	r7, r3, #32
 2ae:	2f00      	cmp	r7, #0
 2b0:	bfa8      	it	ge
 2b2:	fa02 fe07 	lslge.w	lr, r2, r7
 2b6:	fa02 f203 	lsl.w	r2, r2, r3
 2ba:	bfa8      	it	ge
 2bc:	2200      	movge	r2, #0
 2be:	e6c7      	b.n	50 <__muldf3+0x50>

Disassembly of section .text.__aeabi_dmul:

00000000 <__aeabi_dmul>:
__aeabi_dmul():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mul.rs:179
   0:	f7ff bffe 	b.w	0 <__aeabi_dmul>

Disassembly of section .text.__mulsf3vfp:

00000000 <__mulsf3vfp>:
__mulsf3vfp():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:254
   0:	b580      	push	{r7, lr}
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mul.rs:194
   2:	f7ff fffe 	bl	0 <__mulsf3vfp>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
   6:	bd80      	pop	{r7, pc}

Disassembly of section .text.__muldf3vfp:

00000000 <__muldf3vfp>:
__muldf3vfp():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:254
   0:	b580      	push	{r7, lr}
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mul.rs:199
   2:	f7ff fffe 	bl	0 <__muldf3vfp>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
   6:	bd80      	pop	{r7, pc}

Disassembly of section .text.__divsf3:

00000000 <__divsf3>:
__divsf3():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:214
   0:	b5f0      	push	{r4, r5, r6, r7, lr}
   2:	4602      	mov	r2, r0
bitxor():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:306
   4:	4048      	eors	r0, r1
bitand():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:135
   6:	460c      	mov	r4, r1
   8:	4613      	mov	r3, r2
   a:	f3c1 5cc7 	ubfx	ip, r1, #23, #8
   e:	f3c2 5ec7 	ubfx	lr, r2, #23, #8
wrapping_sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2863
  12:	f1ae 0501 	sub.w	r5, lr, #1
bitand():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:135
  16:	f000 4000 	and.w	r0, r0, #2147483648	; 0x80000000
  1a:	f36f 54df 	bfc	r4, #23, #9
  1e:	f36f 53df 	bfc	r3, #23, #9
div32<f32>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/div.rs:49
  22:	2dfd      	cmp	r5, #253	; 0xfd
  24:	bf9c      	itt	ls
  26:	f1ac 0501 	subls.w	r5, ip, #1
  2a:	2dfe      	cmpls	r5, #254	; 0xfe
  2c:	d307      	bcc.n	3e <__divsf3+0x3e>
bitand():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:135
  2e:	f022 4600 	bic.w	r6, r2, #2147483648	; 0x80000000
div32<f32>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/div.rs:56
  32:	f1b6 4fff 	cmp.w	r6, #2139095040	; 0x7f800000
  36:	d940      	bls.n	ba <__divsf3+0xba>
bitor():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:219
  38:	f442 0080 	orr.w	r0, r2, #4194304	; 0x400000
__divsf3():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:216
  3c:	bdf0      	pop	{r4, r5, r6, r7, pc}
  3e:	2100      	movs	r1, #0
bitor_assign():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:661
  40:	f444 0200 	orr.w	r2, r4, #8388608	; 0x800000
  44:	f24f 3433 	movw	r4, #62259	; 0xf333
  48:	f2c7 5404 	movt	r4, #29956	; 0x7504
wrapping_sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2863
  4c:	eba4 2402 	sub.w	r4, r4, r2, lsl #8
shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:396
  50:	0215      	lsls	r5, r2, #8
wrapping_mul():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2884
  52:	fba4 6705 	umull	r6, r7, r4, r5
wrapping_add():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:1006
  56:	427e      	negs	r6, r7
wrapping_mul():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2884
  58:	fba6 4604 	umull	r4, r6, r6, r4
div32<f32>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/div.rs:135
  5c:	0fe4      	lsrs	r4, r4, #31
  5e:	ea44 0446 	orr.w	r4, r4, r6, lsl #1
wrapping_mul():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2884
  62:	fba4 6705 	umull	r6, r7, r4, r5
wrapping_add():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:1006
  66:	427e      	negs	r6, r7
wrapping_sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:1027
  68:	ebae 070c 	sub.w	r7, lr, ip
wrapping_add():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:1006
  6c:	4439      	add	r1, r7
wrapping_mul():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2884
  6e:	fba4 4606 	umull	r4, r6, r4, r6
div32<f32>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/div.rs:137
  72:	0fe4      	lsrs	r4, r4, #31
  74:	ea44 0446 	orr.w	r4, r4, r6, lsl #1
wrapping_mul():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2884
  78:	fba4 5605 	umull	r5, r6, r4, r5
wrapping_add():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:1006
  7c:	4275      	negs	r5, r6
wrapping_mul():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2884
  7e:	fba4 4505 	umull	r4, r5, r4, r5
div32<f32>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/div.rs:139
  82:	0fe4      	lsrs	r4, r4, #31
  84:	ea44 0445 	orr.w	r4, r4, r5, lsl #1
  88:	f04f 7580 	mov.w	r5, #16777216	; 0x1000000
wrapping_sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2863
  8c:	3c02      	subs	r4, #2
shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:396
  8e:	ea45 0543 	orr.w	r5, r5, r3, lsl #1
wrapping_mul():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2884
  92:	fba4 4605 	umull	r4, r6, r4, r5
  96:	2517      	movs	r5, #23
div32<f32>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/div.rs:176
  98:	f1b6 7f80 	cmp.w	r6, #16777216	; 0x1000000
  9c:	4634      	mov	r4, r6
  9e:	bf28      	it	cs
  a0:	0864      	lsrcs	r4, r4, #1
  a2:	bf38      	it	cc
  a4:	2518      	movcc	r5, #24
  a6:	f1b6 7f80 	cmp.w	r6, #16777216	; 0x1000000
  aa:	bf38      	it	cc
  ac:	3901      	subcc	r1, #1
wrapping_add():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:1006
  ae:	317f      	adds	r1, #127	; 0x7f
div32<f32>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/div.rs:186
  b0:	29ff      	cmp	r1, #255	; 0xff
  b2:	db0a      	blt.n	ca <__divsf3+0xca>
  b4:	f040 40ff 	orr.w	r0, r0, #2139095040	; 0x7f800000
__divsf3():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:216
  b8:	bdf0      	pop	{r4, r5, r6, r7, pc}
div32<f32>():
  ba:	f021 4500 	bic.w	r5, r1, #2147483648	; 0x80000000
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/div.rs:60
  be:	f1b5 4fff 	cmp.w	r5, #2139095040	; 0x7f800000
  c2:	d914      	bls.n	ee <__divsf3+0xee>
bitor():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:219
  c4:	f441 0080 	orr.w	r0, r1, #4194304	; 0x400000
__divsf3():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:216
  c8:	bdf0      	pop	{r4, r5, r6, r7, pc}
div32<f32>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/div.rs:189
  ca:	2900      	cmp	r1, #0
  cc:	dd1f      	ble.n	10e <__divsf3+0x10e>
  ce:	40ab      	lsls	r3, r5
  d0:	f64f 77ff 	movw	r7, #65535	; 0xffff
  d4:	fb02 3314 	mls	r3, r2, r4, r3
  d8:	f2c0 077f 	movt	r7, #127	; 0x7f
bitand():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:135
  dc:	4027      	ands	r7, r4
bitor_assign():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:661
  de:	ea47 51c1 	orr.w	r1, r7, r1, lsl #23
wrapping_add():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2843
  e2:	ebb2 0f43 	cmp.w	r2, r3, lsl #1
  e6:	bf38      	it	cc
  e8:	3101      	addcc	r1, #1
bitor():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:219
  ea:	4308      	orrs	r0, r1
__divsf3():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:216
  ec:	bdf0      	pop	{r4, r5, r6, r7, pc}
div32<f32>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/div.rs:64
  ee:	f1b6 4fff 	cmp.w	r6, #2139095040	; 0x7f800000
  f2:	d109      	bne.n	108 <__divsf3+0x108>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/div.rs:65
  f4:	f1b5 4fff 	cmp.w	r5, #2139095040	; 0x7f800000
  f8:	bf07      	ittee	eq
  fa:	2000      	moveq	r0, #0
  fc:	f6c7 70c0 	movteq	r0, #32704	; 0x7fc0
bitor():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:219
 100:	f001 4000 	andne.w	r0, r1, #2147483648	; 0x80000000
 104:	4050      	eorne	r0, r2
__divsf3():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:216
 106:	bdf0      	pop	{r4, r5, r6, r7, pc}
div32<f32>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/div.rs:75
 108:	f1b5 4fff 	cmp.w	r5, #2139095040	; 0x7f800000
 10c:	d100      	bne.n	110 <__divsf3+0x110>
__divsf3():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:216
 10e:	bdf0      	pop	{r4, r5, r6, r7, pc}
div32<f32>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/div.rs:79
 110:	b1f6      	cbz	r6, 150 <__divsf3+0x150>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/div.rs:90
 112:	2d00      	cmp	r5, #0
 114:	d0ce      	beq.n	b4 <__divsf3+0xb4>
 116:	2200      	movs	r2, #0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/div.rs:97
 118:	ebb2 5fd6 	cmp.w	r2, r6, lsr #23
 11c:	f04f 0100 	mov.w	r1, #0
 120:	d108      	bne.n	134 <__divsf3+0x134>
leading_zeros():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2239
 122:	fab3 f183 	clz	r1, r3
wrapping_sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2863
 126:	f101 0618 	add.w	r6, r1, #24
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:1027
 12a:	f1c1 0109 	rsb	r1, r1, #9
normalize():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mod.rs:128
 12e:	f006 061f 	and.w	r6, r6, #31
 132:	40b3      	lsls	r3, r6
div32<f32>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/div.rs:103
 134:	ebb2 5fd5 	cmp.w	r2, r5, lsr #23
 138:	f47f af82 	bne.w	40 <__divsf3+0x40>
leading_zeros():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2239
 13c:	fab4 f284 	clz	r2, r4
wrapping_sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2863
 140:	f102 0518 	add.w	r5, r2, #24
div32<f32>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/div.rs:105
 144:	4411      	add	r1, r2
normalize():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mod.rs:128
 146:	f005 051f 	and.w	r5, r5, #31
div32<f32>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/div.rs:105
 14a:	3909      	subs	r1, #9
normalize():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mod.rs:128
 14c:	40ac      	lsls	r4, r5
 14e:	e777      	b.n	40 <__divsf3+0x40>
div32<f32>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/div.rs:80
 150:	2d00      	cmp	r5, #0
 152:	bf04      	itt	eq
 154:	2000      	moveq	r0, #0
 156:	f6c7 70c0 	movteq	r0, #32704	; 0x7fc0
__divsf3():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:216
 15a:	bdf0      	pop	{r4, r5, r6, r7, pc}

Disassembly of section .text.__aeabi_fdiv:

00000000 <__aeabi_fdiv>:
__aeabi_fdiv():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/div.rs:446
   0:	f7ff bffe 	b.w	0 <__aeabi_fdiv>

Disassembly of section .text.__divdf3:

00000000 <__divdf3>:
__divdf3():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:214
   0:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
   4:	b085      	sub	sp, #20
   6:	4683      	mov	fp, r0
bitxor():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:306
   8:	ea83 0001 	eor.w	r0, r3, r1
bitand():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:135
   c:	f3c3 590a 	ubfx	r9, r3, #20, #11
  10:	f000 4000 	and.w	r0, r0, #2147483648	; 0x80000000
  14:	9004      	str	r0, [sp, #16]
wrapping_sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2863
  16:	f1b9 0401 	subs.w	r4, r9, #1
bitand():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:135
  1a:	f3c1 5a0a 	ubfx	sl, r1, #20, #11
  1e:	469e      	mov	lr, r3
  20:	468c      	mov	ip, r1
  22:	4690      	mov	r8, r2
  24:	f04f 0700 	mov.w	r7, #0
wrapping_sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2863
  28:	f167 0600 	sbc.w	r6, r7, #0
  2c:	f1ba 0501 	subs.w	r5, sl, #1
  30:	f240 72fd 	movw	r2, #2045	; 0x7fd
  34:	f167 0000 	sbc.w	r0, r7, #0
ge():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/cmp.rs:978
  38:	1b52      	subs	r2, r2, r5
bitand():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:135
  3a:	f36f 5e1f 	bfc	lr, #20, #12
  3e:	f36f 5c1f 	bfc	ip, #20, #12
ge():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/cmp.rs:978
  42:	eb77 0000 	sbcs.w	r0, r7, r0
div64<f64>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/div.rs:259
  46:	d37e      	bcc.n	146 <__divdf3+0x146>
  48:	f240 70fe 	movw	r0, #2046	; 0x7fe
  4c:	1a20      	subs	r0, r4, r0
  4e:	f176 0000 	sbcs.w	r0, r6, #0
  52:	d278      	bcs.n	146 <__divdf3+0x146>
shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:396
  54:	ea4f 028c 	mov.w	r2, ip, lsl #2
  58:	ea4f 008b 	mov.w	r0, fp, lsl #2
  5c:	ea42 729b 	orr.w	r2, r2, fp, lsr #30
bitor_assign():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:661
  60:	f44e 1480 	orr.w	r4, lr, #1048576	; 0x100000
shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:396
  64:	f442 0280 	orr.w	r2, r2, #4194304	; 0x400000
  68:	2100      	movs	r1, #0
wrapping_mul():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2884
  6a:	e9cd 0200 	strd	r0, r2, [sp]
shr():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:505
  6e:	ea4f 5058 	mov.w	r0, r8, lsr #21
  72:	f24f 3233 	movw	r2, #62259	; 0xf333
  76:	ea40 20c4 	orr.w	r0, r0, r4, lsl #11
  7a:	f2c7 5204 	movt	r2, #29956	; 0x7504
wrapping_mul():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2884
  7e:	e9cd 1102 	strd	r1, r1, [sp, #8]
wrapping_sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2863
  82:	1a12      	subs	r2, r2, r0
wrapping_mul():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2884
  84:	fba0 3602 	umull	r3, r6, r0, r2
wrapping_add():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:1006
  88:	4273      	negs	r3, r6
wrapping_mul():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2884
  8a:	fba3 2302 	umull	r2, r3, r3, r2
div64<f64>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/div.rs:345
  8e:	0fd2      	lsrs	r2, r2, #31
  90:	ea42 0243 	orr.w	r2, r2, r3, lsl #1
wrapping_mul():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2884
  94:	fba2 3600 	umull	r3, r6, r2, r0
wrapping_add():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:1006
  98:	4273      	negs	r3, r6
wrapping_mul():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2884
  9a:	fba2 2303 	umull	r2, r3, r2, r3
div64<f64>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/div.rs:347
  9e:	0fd2      	lsrs	r2, r2, #31
  a0:	ea42 0243 	orr.w	r2, r2, r3, lsl #1
wrapping_mul():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2884
  a4:	fba2 3600 	umull	r3, r6, r2, r0
wrapping_add():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:1006
  a8:	4273      	negs	r3, r6
wrapping_mul():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2884
  aa:	fba2 2303 	umull	r2, r3, r2, r3
div64<f64>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/div.rs:349
  ae:	0fd2      	lsrs	r2, r2, #31
  b0:	ea42 0243 	orr.w	r2, r2, r3, lsl #1
cast():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/int/mod.rs:241
  b4:	ea4f 23c8 	mov.w	r3, r8, lsl #11
wrapping_sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2863
  b8:	3a01      	subs	r2, #1
wrapping_mul():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2884
  ba:	fba2 3603 	umull	r3, r6, r2, r3
wrapping_add():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2843
  be:	2300      	movs	r3, #0
  c0:	fbe0 6302 	umlal	r6, r3, r0, r2
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:1006
  c4:	4270      	negs	r0, r6
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2843
  c6:	f04f 0600 	mov.w	r6, #0
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:1006
  ca:	4199      	sbcs	r1, r3
wrapping_mul():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2884
  cc:	fba0 0302 	umull	r0, r3, r0, r2
wrapping_add():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2843
  d0:	fbe1 3602 	umlal	r3, r6, r1, r2
wrapping_mul():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2884
  d4:	2200      	movs	r2, #0
wrapping_sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2863
  d6:	1e98      	subs	r0, r3, #2
wrapping_mul():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2884
  d8:	f04f 0300 	mov.w	r3, #0
wrapping_sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2863
  dc:	f166 0100 	sbc.w	r1, r6, #0
wrapping_mul():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2884
  e0:	f7ff fffe 	bl	0 <__divdf3>
div64<f64>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/div.rs:415
  e4:	ea5f 0153 	movs.w	r1, r3, lsr #1
  e8:	f04f 0534 	mov.w	r5, #52	; 0x34
  ec:	ea4f 0032 	mov.w	r0, r2, rrx
  f0:	f5b3 1f00 	cmp.w	r3, #2097152	; 0x200000
  f4:	bf3c      	itt	cc
  f6:	4619      	movcc	r1, r3
  f8:	4610      	movcc	r0, r2
  fa:	fba8 2600 	umull	r2, r6, r8, r0
  fe:	f5b3 1f00 	cmp.w	r3, #2097152	; 0x200000
 102:	bf38      	it	cc
 104:	2535      	movcc	r5, #53	; 0x35
 106:	f005 0515 	and.w	r5, r5, #21
 10a:	fb08 6601 	mla	r6, r8, r1, r6
 10e:	fa0b f505 	lsl.w	r5, fp, r5
 112:	4252      	negs	r2, r2
 114:	fb04 6600 	mla	r6, r4, r0, r6
 118:	eb65 0606 	sbc.w	r6, r5, r6
wrapping_sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:1027
 11c:	ebaa 0509 	sub.w	r5, sl, r9
wrapping_add():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:1006
 120:	442f      	add	r7, r5
div64<f64>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/div.rs:415
 122:	f5b3 1f00 	cmp.w	r3, #2097152	; 0x200000
 126:	bf38      	it	cc
 128:	3f01      	subcc	r7, #1
wrapping_add():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:1006
 12a:	f207 33ff 	addw	r3, r7, #1023	; 0x3ff
 12e:	f240 77ff 	movw	r7, #2047	; 0x7ff
div64<f64>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/div.rs:425
 132:	42bb      	cmp	r3, r7
 134:	db14      	blt.n	160 <__divdf3+0x160>
bitor():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:219
 136:	9804      	ldr	r0, [sp, #16]
 138:	f04f 0b00 	mov.w	fp, #0
 13c:	f040 40e0 	orr.w	r0, r0, #1879048192	; 0x70000000
 140:	f040 617f 	orr.w	r1, r0, #267386880	; 0xff00000
 144:	e04a      	b.n	1dc <__divdf3+0x1dc>
div64<f64>():
 146:	2400      	movs	r4, #0
bitand():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:135
 148:	f021 4700 	bic.w	r7, r1, #2147483648	; 0x80000000
gt():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/cmp.rs:980
 14c:	f1bb 0001 	subs.w	r0, fp, #1
 150:	f6c7 74f0 	movt	r4, #32752	; 0x7ff0
 154:	eb77 0004 	sbcs.w	r0, r7, r4
div64<f64>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/div.rs:266
 158:	d31e      	bcc.n	198 <__divdf3+0x198>
bitor():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:219
 15a:	f441 2100 	orr.w	r1, r1, #524288	; 0x80000
 15e:	e03d      	b.n	1dc <__divdf3+0x1dc>
div64<f64>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/div.rs:428
 160:	2b00      	cmp	r3, #0
 162:	dd38      	ble.n	1d6 <__divdf3+0x1d6>
shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:396
 164:	0077      	lsls	r7, r6, #1
bitand():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:135
 166:	f36f 511f 	bfc	r1, #20, #12
shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:396
 16a:	ea47 77d2 	orr.w	r7, r7, r2, lsr #31
gt():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/cmp.rs:980
 16e:	ebb8 0242 	subs.w	r2, r8, r2, lsl #1
 172:	f04f 0600 	mov.w	r6, #0
 176:	eb74 0207 	sbcs.w	r2, r4, r7
 17a:	bf38      	it	cc
 17c:	2601      	movcc	r6, #1
bitor_assign():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:661
 17e:	ea41 5103 	orr.w	r1, r1, r3, lsl #20
wrapping_add():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2843
 182:	f110 0b01 	adds.w	fp, r0, #1
 186:	f141 0200 	adc.w	r2, r1, #0
 18a:	2e00      	cmp	r6, #0
 18c:	bf04      	itt	eq
 18e:	4683      	moveq	fp, r0
 190:	460a      	moveq	r2, r1
 192:	9904      	ldr	r1, [sp, #16]
bitor():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:219
 194:	4311      	orrs	r1, r2
 196:	e021      	b.n	1dc <__divdf3+0x1dc>
div64<f64>():
 198:	f023 4000 	bic.w	r0, r3, #2147483648	; 0x80000000
gt():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/cmp.rs:980
 19c:	f1b8 0201 	subs.w	r2, r8, #1
 1a0:	eb70 0204 	sbcs.w	r2, r0, r4
div64<f64>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/div.rs:270
 1a4:	d303      	bcc.n	1ae <__divdf3+0x1ae>
bitor():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:219
 1a6:	f443 2100 	orr.w	r1, r3, #524288	; 0x80000
 1aa:	46c3      	mov	fp, r8
 1ac:	e016      	b.n	1dc <__divdf3+0x1dc>
eq():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/cmp.rs:894
 1ae:	ea87 0204 	eor.w	r2, r7, r4
 1b2:	ea52 020b 	orrs.w	r2, r2, fp
div64<f64>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/div.rs:274
 1b6:	d109      	bne.n	1cc <__divdf3+0x1cc>
eq():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/cmp.rs:894
 1b8:	4060      	eors	r0, r4
 1ba:	ea50 0008 	orrs.w	r0, r0, r8
div64<f64>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/div.rs:275
 1be:	d111      	bne.n	1e4 <__divdf3+0x1e4>
 1c0:	2100      	movs	r1, #0
 1c2:	f04f 0b00 	mov.w	fp, #0
 1c6:	f6c7 71f8 	movt	r1, #32760	; 0x7ff8
 1ca:	e007      	b.n	1dc <__divdf3+0x1dc>
eq():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/cmp.rs:894
 1cc:	ea80 0104 	eor.w	r1, r0, r4
 1d0:	ea51 0108 	orrs.w	r1, r1, r8
div64<f64>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/div.rs:285
 1d4:	d10a      	bne.n	1ec <__divdf3+0x1ec>
__divdf3():
 1d6:	f04f 0b00 	mov.w	fp, #0
 1da:	9904      	ldr	r1, [sp, #16]
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:216
 1dc:	4658      	mov	r0, fp
 1de:	b005      	add	sp, #20
 1e0:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
bitor():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:219
 1e4:	f003 4000 	and.w	r0, r3, #2147483648	; 0x80000000
 1e8:	4041      	eors	r1, r0
 1ea:	e7f7      	b.n	1dc <__divdf3+0x1dc>
eq():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/cmp.rs:894
 1ec:	ea5b 0107 	orrs.w	r1, fp, r7
div64<f64>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/div.rs:289
 1f0:	d052      	beq.n	298 <__divdf3+0x298>
eq():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/cmp.rs:894
 1f2:	ea58 0100 	orrs.w	r1, r8, r0
div64<f64>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/div.rs:300
 1f6:	d059      	beq.n	2ac <__divdf3+0x2ac>
 1f8:	2100      	movs	r1, #0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/div.rs:307
 1fa:	ebb1 5f17 	cmp.w	r1, r7, lsr #20
 1fe:	f04f 0700 	mov.w	r7, #0
 202:	d121      	bne.n	248 <__divdf3+0x248>
leading_zeros():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2239
 204:	fabb f28b 	clz	r2, fp
 208:	f1bc 0f00 	cmp.w	ip, #0
 20c:	f102 0220 	add.w	r2, r2, #32
 210:	bf18      	it	ne
 212:	fabc f28c 	clzne	r2, ip
wrapping_sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2863
 216:	f102 0335 	add.w	r3, r2, #53	; 0x35
normalize():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mod.rs:128
 21a:	f003 033f 	and.w	r3, r3, #63	; 0x3f
 21e:	f1c3 0620 	rsb	r6, r3, #32
 222:	f1a3 0420 	sub.w	r4, r3, #32
 226:	fa0c f703 	lsl.w	r7, ip, r3
 22a:	2c00      	cmp	r4, #0
 22c:	fa2b f606 	lsr.w	r6, fp, r6
 230:	ea46 0c07 	orr.w	ip, r6, r7
wrapping_sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:1027
 234:	f1c2 070c 	rsb	r7, r2, #12
normalize():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mod.rs:128
 238:	bfa8      	it	ge
 23a:	fa0b fc04 	lslge.w	ip, fp, r4
 23e:	fa0b fb03 	lsl.w	fp, fp, r3
 242:	bfa8      	it	ge
 244:	f04f 0b00 	movge.w	fp, #0
div64<f64>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/div.rs:313
 248:	ebb1 5f10 	cmp.w	r1, r0, lsr #20
 24c:	f47f af02 	bne.w	54 <__divdf3+0x54>
leading_zeros():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2239
 250:	fab8 f088 	clz	r0, r8
 254:	f1be 0f00 	cmp.w	lr, #0
 258:	f100 0020 	add.w	r0, r0, #32
 25c:	bf18      	it	ne
 25e:	fabe f08e 	clzne	r0, lr
wrapping_sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2863
 262:	f100 0135 	add.w	r1, r0, #53	; 0x35
normalize():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mod.rs:128
 266:	f001 013f 	and.w	r1, r1, #63	; 0x3f
div64<f64>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/div.rs:315
 26a:	4438      	add	r0, r7
normalize():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mod.rs:128
 26c:	f1c1 0320 	rsb	r3, r1, #32
div64<f64>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/div.rs:315
 270:	f1a0 070c 	sub.w	r7, r0, #12
normalize():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mod.rs:128
 274:	fa0e f201 	lsl.w	r2, lr, r1
 278:	fa28 f303 	lsr.w	r3, r8, r3
 27c:	ea43 0e02 	orr.w	lr, r3, r2
 280:	f1a1 0220 	sub.w	r2, r1, #32
 284:	2a00      	cmp	r2, #0
 286:	bfa8      	it	ge
 288:	fa08 fe02 	lslge.w	lr, r8, r2
 28c:	fa08 f801 	lsl.w	r8, r8, r1
 290:	bfa8      	it	ge
 292:	f04f 0800 	movge.w	r8, #0
 296:	e6dd      	b.n	54 <__divdf3+0x54>
div64<f64>():
 298:	9904      	ldr	r1, [sp, #16]
eq():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/cmp.rs:894
 29a:	ea50 0008 	orrs.w	r0, r0, r8
div64<f64>():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/div.rs:290
 29e:	bf04      	itt	eq
 2a0:	2100      	moveq	r1, #0
 2a2:	f6c7 71f8 	movteq	r1, #32760	; 0x7ff8
 2a6:	f04f 0b00 	mov.w	fp, #0
 2aa:	e797      	b.n	1dc <__divdf3+0x1dc>
 2ac:	9904      	ldr	r1, [sp, #16]
 2ae:	f04f 0b00 	mov.w	fp, #0
bitor():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:219
 2b2:	4321      	orrs	r1, r4
 2b4:	e792      	b.n	1dc <__divdf3+0x1dc>

Disassembly of section .text.__aeabi_ddiv:

00000000 <__aeabi_ddiv>:
__aeabi_ddiv():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/div.rs:446
   0:	f7ff bffe 	b.w	0 <__aeabi_ddiv>

Disassembly of section .text.__divsf3vfp:

00000000 <__divsf3vfp>:
__divsf3vfp():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:254
   0:	b580      	push	{r7, lr}
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/div.rs:459
   2:	f7ff fffe 	bl	0 <__divsf3vfp>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
   6:	bd80      	pop	{r7, pc}

Disassembly of section .text.__divdf3vfp:

00000000 <__divdf3vfp>:
__divdf3vfp():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:254
   0:	b580      	push	{r7, lr}
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/div.rs:464
   2:	f7ff fffe 	bl	0 <__divdf3vfp>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
   6:	bd80      	pop	{r7, pc}

Disassembly of section .text.__aeabi_f2d:

00000000 <__aeabi_f2d>:
__aeabi_f2d():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:135
   0:	f020 4100 	bic.w	r1, r0, #2147483648	; 0x80000000
wrapping_sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2863
   4:	f5a1 0200 	sub.w	r2, r1, #8388608	; 0x800000
__aeabi_f2d():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/extend.rs:37
   8:	0e12      	lsrs	r2, r2, #24
   a:	2a7e      	cmp	r2, #126	; 0x7e
   c:	d805      	bhi.n	1a <__aeabi_f2d+0x1a>
   e:	f04f 5260 	mov.w	r2, #939524096	; 0x38000000
add_assign():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/arith.rs:698
  12:	eb02 03d1 	add.w	r3, r2, r1, lsr #3
wrapping_shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:3032
  16:	074a      	lsls	r2, r1, #29
  18:	e02f      	b.n	7a <__aeabi_f2d+0x7a>
__aeabi_f2d():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/extend.rs:45
  1a:	f1b1 4fff 	cmp.w	r1, #2139095040	; 0x7f800000
  1e:	d306      	bcc.n	2e <__aeabi_f2d+0x2e>
  20:	2100      	movs	r1, #0
bitor_assign():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:661
  22:	0742      	lsls	r2, r0, #29
  24:	f6c7 71f0 	movt	r1, #32752	; 0x7ff0
  28:	ea41 03d0 	orr.w	r3, r1, r0, lsr #3
  2c:	e025      	b.n	7a <__aeabi_f2d+0x7a>
__aeabi_f2d():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/extend.rs:56
  2e:	b311      	cbz	r1, 76 <__aeabi_f2d+0x76>
  30:	b510      	push	{r4, lr}
leading_zeros():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2239
  32:	fab1 fc81 	clz	ip, r1
  36:	f240 3489 	movw	r4, #905	; 0x389
__aeabi_f2d():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/extend.rs:63
  3a:	f10c 0315 	add.w	r3, ip, #21
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/extend.rs:62
  3e:	eba4 040c 	sub.w	r4, r4, ip
wrapping_shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:3032
  42:	f003 023f 	and.w	r2, r3, #63	; 0x3f
  46:	f1c2 0320 	rsb	r3, r2, #32
  4a:	f1a2 0e20 	sub.w	lr, r2, #32
  4e:	f1be 0f00 	cmp.w	lr, #0
  52:	fa01 f202 	lsl.w	r2, r1, r2
  56:	fa21 f303 	lsr.w	r3, r1, r3
  5a:	bfa8      	it	ge
  5c:	fa01 f30e 	lslge.w	r3, r1, lr
  60:	f1be 0f00 	cmp.w	lr, #0
bitxor():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:306
  64:	f483 1380 	eor.w	r3, r3, #1048576	; 0x100000
wrapping_shl():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:3032
  68:	bfa8      	it	ge
  6a:	2200      	movge	r2, #0
bitor():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:219
  6c:	ea43 5304 	orr.w	r3, r3, r4, lsl #20
  70:	e8bd 4010 	ldmia.w	sp!, {r4, lr}
  74:	e001      	b.n	7a <__aeabi_f2d+0x7a>
__aeabi_f2d():
  76:	2200      	movs	r2, #0
  78:	2300      	movs	r3, #0
bitand():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:135
  7a:	f000 4000 	and.w	r0, r0, #2147483648	; 0x80000000
bitor():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/ops/bit.rs:219
  7e:	ea43 0100 	orr.w	r1, r3, r0
__aeabi_f2d():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
  82:	4610      	mov	r0, r2
  84:	4770      	bx	lr

Disassembly of section .text.__extendsfdf2vfp:

00000000 <__extendsfdf2vfp>:
__extendsfdf2vfp():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:254
   0:	b580      	push	{r7, lr}
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/extend.rs:80
   2:	f7ff fffe 	bl	0 <__extendsfdf2vfp>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
   6:	bd80      	pop	{r7, pc}

Disassembly of section .text._ZN55_$LT$f32$u20$as$u20$compiler_builtins..float..Float$GT$11signed_repr17hf0ed93956b902812E:

00000000 <<f32 as compiler_builtins::float::Float>::signed_repr>:
_ZN55_$LT$f32$u20$as$u20$compiler_builtins..float..Float$GT$4repr17h384e536e99a0c563E():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mod.rs:108
   0:	4770      	bx	lr

Disassembly of section .text._ZN55_$LT$f32$u20$as$u20$compiler_builtins..float..Float$GT$9from_repr17h54017aa9053fbe21E:

00000000 <<f32 as compiler_builtins::float::Float>::from_repr>:
_ZN55_$LT$f32$u20$as$u20$compiler_builtins..float..Float$GT$9from_repr17h54017aa9053fbe21E():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mod.rs:119
   0:	4770      	bx	lr

Disassembly of section .text._ZN55_$LT$f32$u20$as$u20$compiler_builtins..float..Float$GT$10from_parts17h520e72223ba72e43E:

00000000 <<f32 as compiler_builtins::float::Float>::from_parts>:
_ZN55_$LT$f32$u20$as$u20$compiler_builtins..float..Float$GT$10from_parts17h520e72223ba72e43E():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mod.rs:121
   0:	07c0      	lsls	r0, r0, #31
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mod.rs:123
   2:	f36f 52df 	bfc	r2, #23, #9
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mod.rs:121
   6:	f361 50de 	bfi	r0, r1, #23, #8
   a:	4410      	add	r0, r2
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mod.rs:124
   c:	4770      	bx	lr

Disassembly of section .text._ZN55_$LT$f32$u20$as$u20$compiler_builtins..float..Float$GT$9normalize17h49a2612df8824186E:

00000000 <<f32 as compiler_builtins::float::Float>::normalize>:
_ZN55_$LT$f32$u20$as$u20$compiler_builtins..float..Float$GT$9normalize17h49a2612df8824186E():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2239
   0:	fab0 f280 	clz	r2, r0
wrapping_sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2863
   4:	f102 0118 	add.w	r1, r2, #24
_ZN55_$LT$f32$u20$as$u20$compiler_builtins..float..Float$GT$9normalize17h49a2612df8824186E():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mod.rs:128
   8:	f001 011f 	and.w	r1, r1, #31
   c:	fa00 f101 	lsl.w	r1, r0, r1
wrapping_sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:1027
  10:	f1c2 0009 	rsb	r0, r2, #9
_ZN55_$LT$f32$u20$as$u20$compiler_builtins..float..Float$GT$9normalize17h49a2612df8824186E():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mod.rs:129
  14:	4770      	bx	lr

Disassembly of section .text._ZN55_$LT$f64$u20$as$u20$compiler_builtins..float..Float$GT$11signed_repr17hdb5d10c47536870bE:

00000000 <<f64 as compiler_builtins::float::Float>::signed_repr>:
_ZN55_$LT$f64$u20$as$u20$compiler_builtins..float..Float$GT$4repr17hf77910dedcce9603E():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mod.rs:108
   0:	4770      	bx	lr

Disassembly of section .text._ZN55_$LT$f64$u20$as$u20$compiler_builtins..float..Float$GT$9from_repr17h74667411c3d40656E:

00000000 <<f64 as compiler_builtins::float::Float>::from_repr>:
_ZN55_$LT$f64$u20$as$u20$compiler_builtins..float..Float$GT$9from_repr17h74667411c3d40656E():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mod.rs:119
   0:	4770      	bx	lr

Disassembly of section .text._ZN55_$LT$f64$u20$as$u20$compiler_builtins..float..Float$GT$10from_parts17h0c4d4fd83cc3a52aE:

00000000 <<f64 as compiler_builtins::float::Float>::from_parts>:
_ZN55_$LT$f64$u20$as$u20$compiler_builtins..float..Float$GT$10from_parts17h0c4d4fd83cc3a52aE():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mod.rs:120
   0:	9901      	ldr	r1, [sp, #4]
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mod.rs:121
   2:	07c0      	lsls	r0, r0, #31
   4:	f362 501e 	bfi	r0, r2, #20, #11
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mod.rs:123
   8:	f36f 511f 	bfc	r1, #20, #12
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mod.rs:121
   c:	4401      	add	r1, r0
   e:	9800      	ldr	r0, [sp, #0]
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mod.rs:124
  10:	4770      	bx	lr

Disassembly of section .text._ZN55_$LT$f64$u20$as$u20$compiler_builtins..float..Float$GT$9normalize17h32270a1a68f34ff6E:

00000000 <<f64 as compiler_builtins::float::Float>::normalize>:
_ZN55_$LT$f64$u20$as$u20$compiler_builtins..float..Float$GT$9normalize17h32270a1a68f34ff6E():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2239
   0:	fab0 f280 	clz	r2, r0
   4:	2900      	cmp	r1, #0
   6:	f102 0c20 	add.w	ip, r2, #32
   a:	bf18      	it	ne
   c:	fab1 fc81 	clzne	ip, r1
wrapping_sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:2863
  10:	f10c 0235 	add.w	r2, ip, #53	; 0x35
_ZN55_$LT$f64$u20$as$u20$compiler_builtins..float..Float$GT$9normalize17h32270a1a68f34ff6E():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mod.rs:128
  14:	f002 033f 	and.w	r3, r2, #63	; 0x3f
  18:	f1c3 0220 	rsb	r2, r3, #32
  1c:	4099      	lsls	r1, r3
  1e:	fa20 f202 	lsr.w	r2, r0, r2
  22:	430a      	orrs	r2, r1
  24:	f1a3 0120 	sub.w	r1, r3, #32
  28:	2900      	cmp	r1, #0
  2a:	bfa8      	it	ge
  2c:	fa00 f201 	lslge.w	r2, r0, r1
  30:	fa00 f103 	lsl.w	r1, r0, r3
wrapping_sub():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/mod.rs:1027
  34:	f1cc 000c 	rsb	r0, ip, #12
_ZN55_$LT$f64$u20$as$u20$compiler_builtins..float..Float$GT$9normalize17h32270a1a68f34ff6E():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mod.rs:128
  38:	bfa8      	it	ge
  3a:	2100      	movge	r1, #0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/float/mod.rs:129
  3c:	4770      	bx	lr

Disassembly of section .text.fmod:

00000000 <fmod>:
fmod():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:254
   0:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
   4:	b083      	sub	sp, #12
   6:	4607      	mov	r7, r0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmod.rs:12
   8:	0058      	lsls	r0, r3, #1
   a:	ea40 74d2 	orr.w	r4, r0, r2, lsr #31
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmod.rs:8
   e:	f3c3 5b0a 	ubfx	fp, r3, #20, #11
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmod.rs:12
  12:	ea44 0042 	orr.w	r0, r4, r2, lsl #1
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmod.rs:7
  16:	f3c1 580a 	ubfx	r8, r1, #20, #11
  1a:	4699      	mov	r9, r3
  1c:	4692      	mov	sl, r2
  1e:	460e      	mov	r6, r1
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmod.rs:12
  20:	b348      	cbz	r0, 76 <fmod+0x76>
is_nan():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/f64.rs:161
  22:	4650      	mov	r0, sl
  24:	4649      	mov	r1, r9
  26:	4652      	mov	r2, sl
  28:	464b      	mov	r3, r9
  2a:	f7ff fffe 	bl	0 <fmod>
fmod():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmod.rs:12
  2e:	bb10      	cbnz	r0, 76 <fmod+0x76>
  30:	f240 70ff 	movw	r0, #2047	; 0x7ff
  34:	4580      	cmp	r8, r0
  36:	d01e      	beq.n	76 <fmod+0x76>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmod.rs:15
  38:	0071      	lsls	r1, r6, #1
  3a:	ea4f 004a 	mov.w	r0, sl, lsl #1
  3e:	ea41 71d7 	orr.w	r1, r1, r7, lsr #31
  42:	ebb0 0247 	subs.w	r2, r0, r7, lsl #1
  46:	eb74 0201 	sbcs.w	r2, r4, r1
  4a:	d223      	bcs.n	94 <fmod+0x94>
  4c:	f04f 3eff 	mov.w	lr, #4294967295	; 0xffffffff
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmod.rs:23
  50:	f1b8 0f00 	cmp.w	r8, #0
  54:	d02e      	beq.n	b4 <fmod+0xb4>
  56:	2001      	movs	r0, #1
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmod.rs:32
  58:	4634      	mov	r4, r6
  5a:	f360 541f 	bfi	r4, r0, #20, #12
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmod.rs:7
  5e:	f04f 0c00 	mov.w	ip, #0
  62:	4638      	mov	r0, r7
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmod.rs:34
  64:	f1bb 0f00 	cmp.w	fp, #0
  68:	d06e      	beq.n	148 <fmod+0x148>
  6a:	2100      	movs	r1, #0
  6c:	9102      	str	r1, [sp, #8]
  6e:	2101      	movs	r1, #1
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmod.rs:43
  70:	f361 591f 	bfi	r9, r1, #20, #12
  74:	e0b1      	b.n	1da <fmod+0x1da>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmod.rs:13
  76:	4638      	mov	r0, r7
  78:	4631      	mov	r1, r6
  7a:	4652      	mov	r2, sl
  7c:	464b      	mov	r3, r9
  7e:	f7ff fffe 	bl	0 <fmod>
  82:	4602      	mov	r2, r0
  84:	460b      	mov	r3, r1
  86:	f7ff fffe 	bl	0 <fmod>
  8a:	460e      	mov	r6, r1
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
  8c:	4631      	mov	r1, r6
  8e:	b003      	add	sp, #12
  90:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
  94:	007a      	lsls	r2, r7, #1
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmod.rs:16
  96:	4050      	eors	r0, r2
  98:	4061      	eors	r1, r4
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmod.rs:17
  9a:	2200      	movs	r2, #0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmod.rs:16
  9c:	ea40 0401 	orr.w	r4, r0, r1
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmod.rs:17
  a0:	4638      	mov	r0, r7
  a2:	4631      	mov	r1, r6
  a4:	2300      	movs	r3, #0
  a6:	f7ff fffe 	bl	0 <fmod>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmod.rs:16
  aa:	2c00      	cmp	r4, #0
  ac:	bf0c      	ite	eq
  ae:	460e      	moveq	r6, r1
  b0:	4638      	movne	r0, r7
  b2:	e7eb      	b.n	8c <fmod+0x8c>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmod.rs:24
  b4:	0330      	lsls	r0, r6, #12
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmod.rs:25
  b6:	ebbe 3107 	subs.w	r1, lr, r7, lsl #12
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmod.rs:24
  ba:	ea40 5017 	orr.w	r0, r0, r7, lsr #20
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmod.rs:25
  be:	eb7e 0100 	sbcs.w	r1, lr, r0
  c2:	da19      	bge.n	f8 <fmod+0xf8>
  c4:	0339      	lsls	r1, r7, #12
  c6:	f04f 0800 	mov.w	r8, #0
  ca:	f04f 0c00 	mov.w	ip, #0
  ce:	0042      	lsls	r2, r0, #1
  d0:	d417      	bmi.n	102 <fmod+0x102>
  d2:	0082      	lsls	r2, r0, #2
  d4:	d418      	bmi.n	108 <fmod+0x108>
  d6:	00c2      	lsls	r2, r0, #3
  d8:	d419      	bmi.n	10e <fmod+0x10e>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmod.rs:27
  da:	0100      	lsls	r0, r0, #4
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmod.rs:26
  dc:	f1b8 0804 	subs.w	r8, r8, #4
  e0:	f16c 0c00 	sbc.w	ip, ip, #0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmod.rs:27
  e4:	ea40 7011 	orr.w	r0, r0, r1, lsr #28
  e8:	010a      	lsls	r2, r1, #4
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmod.rs:25
  ea:	ebbe 1101 	subs.w	r1, lr, r1, lsl #4
  ee:	eb7e 0100 	sbcs.w	r1, lr, r0
  f2:	4611      	mov	r1, r2
  f4:	dbeb      	blt.n	ce <fmod+0xce>
  f6:	e00e      	b.n	116 <fmod+0x116>
  f8:	f04f 0800 	mov.w	r8, #0
  fc:	f04f 0c00 	mov.w	ip, #0
 100:	e009      	b.n	116 <fmod+0x116>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmod.rs:26
 102:	f1b8 0801 	subs.w	r8, r8, #1
 106:	e004      	b.n	112 <fmod+0x112>
 108:	f1b8 0802 	subs.w	r8, r8, #2
 10c:	e001      	b.n	112 <fmod+0x112>
 10e:	f1b8 0803 	subs.w	r8, r8, #3
 112:	f16c 0c00 	sbc.w	ip, ip, #0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmod.rs:29
 116:	f1c8 0001 	rsb	r0, r8, #1
 11a:	f000 003f 	and.w	r0, r0, #63	; 0x3f
 11e:	f1c0 0220 	rsb	r2, r0, #32
 122:	fa06 f100 	lsl.w	r1, r6, r0
 126:	fa27 f202 	lsr.w	r2, r7, r2
 12a:	ea42 0401 	orr.w	r4, r2, r1
 12e:	f1a0 0120 	sub.w	r1, r0, #32
 132:	fa07 f000 	lsl.w	r0, r7, r0
 136:	2900      	cmp	r1, #0
 138:	bfa8      	it	ge
 13a:	fa07 f401 	lslge.w	r4, r7, r1
 13e:	bfa8      	it	ge
 140:	2000      	movge	r0, #0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmod.rs:34
 142:	f1bb 0f00 	cmp.w	fp, #0
 146:	d190      	bne.n	6a <fmod+0x6a>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmod.rs:35
 148:	ea4f 3109 	mov.w	r1, r9, lsl #12
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmod.rs:36
 14c:	ebbe 320a 	subs.w	r2, lr, sl, lsl #12
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmod.rs:35
 150:	ea41 511a 	orr.w	r1, r1, sl, lsr #20
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmod.rs:36
 154:	eb7e 0201 	sbcs.w	r2, lr, r1
 158:	da19      	bge.n	18e <fmod+0x18e>
 15a:	ea4f 320a 	mov.w	r2, sl, lsl #12
 15e:	f04f 0b00 	mov.w	fp, #0
 162:	2500      	movs	r5, #0
 164:	004b      	lsls	r3, r1, #1
 166:	d416      	bmi.n	196 <fmod+0x196>
 168:	008b      	lsls	r3, r1, #2
 16a:	d417      	bmi.n	19c <fmod+0x19c>
 16c:	00cb      	lsls	r3, r1, #3
 16e:	d418      	bmi.n	1a2 <fmod+0x1a2>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmod.rs:38
 170:	0109      	lsls	r1, r1, #4
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmod.rs:37
 172:	f1bb 0b04 	subs.w	fp, fp, #4
 176:	f165 0500 	sbc.w	r5, r5, #0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmod.rs:38
 17a:	ea41 7112 	orr.w	r1, r1, r2, lsr #28
 17e:	0113      	lsls	r3, r2, #4
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmod.rs:36
 180:	ebbe 1202 	subs.w	r2, lr, r2, lsl #4
 184:	eb7e 0201 	sbcs.w	r2, lr, r1
 188:	461a      	mov	r2, r3
 18a:	dbeb      	blt.n	164 <fmod+0x164>
 18c:	e00d      	b.n	1aa <fmod+0x1aa>
 18e:	f04f 0b00 	mov.w	fp, #0
 192:	2500      	movs	r5, #0
 194:	e009      	b.n	1aa <fmod+0x1aa>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmod.rs:37
 196:	f1bb 0b01 	subs.w	fp, fp, #1
 19a:	e004      	b.n	1a6 <fmod+0x1a6>
 19c:	f1bb 0b02 	subs.w	fp, fp, #2
 1a0:	e001      	b.n	1a6 <fmod+0x1a6>
 1a2:	f1bb 0b03 	subs.w	fp, fp, #3
 1a6:	f165 0500 	sbc.w	r5, r5, #0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmod.rs:40
 1aa:	f1cb 0101 	rsb	r1, fp, #1
 1ae:	9502      	str	r5, [sp, #8]
 1b0:	f001 013f 	and.w	r1, r1, #63	; 0x3f
 1b4:	f1c1 0320 	rsb	r3, r1, #32
 1b8:	fa09 f201 	lsl.w	r2, r9, r1
 1bc:	fa2a f303 	lsr.w	r3, sl, r3
 1c0:	ea43 0902 	orr.w	r9, r3, r2
 1c4:	f1a1 0220 	sub.w	r2, r1, #32
 1c8:	2a00      	cmp	r2, #0
 1ca:	bfa8      	it	ge
 1cc:	fa0a f902 	lslge.w	r9, sl, r2
 1d0:	fa0a fa01 	lsl.w	sl, sl, r1
 1d4:	bfa8      	it	ge
 1d6:	f04f 0a00 	movge.w	sl, #0
 1da:	ebb0 030a 	subs.w	r3, r0, sl
 1de:	f04f 3eff 	mov.w	lr, #4294967295	; 0xffffffff
 1e2:	eb64 0209 	sbc.w	r2, r4, r9
 1e6:	ebbe 0503 	subs.w	r5, lr, r3
 1ea:	f04f 0100 	mov.w	r1, #0
 1ee:	eb7e 0502 	sbcs.w	r5, lr, r2
 1f2:	bfb8      	it	lt
 1f4:	2101      	movlt	r1, #1
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmod.rs:47
 1f6:	ebbb 0508 	subs.w	r5, fp, r8
 1fa:	9d02      	ldr	r5, [sp, #8]
 1fc:	e9cd 7600 	strd	r7, r6, [sp]
 200:	eb75 050c 	sbcs.w	r5, r5, ip
 204:	f280 80a2 	bge.w	34c <fmod+0x34c>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmod.rs:49
 208:	07c9      	lsls	r1, r1, #31
 20a:	f04f 35ff 	mov.w	r5, #4294967295	; 0xffffffff
 20e:	d005      	beq.n	21c <fmod+0x21c>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmod.rs:50
 210:	ea53 0002 	orrs.w	r0, r3, r2
 214:	4614      	mov	r4, r2
 216:	4618      	mov	r0, r3
 218:	f000 80c2 	beq.w	3a0 <fmod+0x3a0>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmod.rs:55
 21c:	0061      	lsls	r1, r4, #1
 21e:	ea41 74d0 	orr.w	r4, r1, r0, lsr #31
 222:	ebda 0340 	rsbs	r3, sl, r0, lsl #1
 226:	465f      	mov	r7, fp
 228:	eb64 0209 	sbc.w	r2, r4, r9
 22c:	1ae9      	subs	r1, r5, r3
 22e:	eb75 0102 	sbcs.w	r1, r5, r2
 232:	463e      	mov	r6, r7
 234:	f04f 0100 	mov.w	r1, #0
 238:	f04f 3eff 	mov.w	lr, #4294967295	; 0xffffffff
 23c:	bfb8      	it	lt
 23e:	2101      	movlt	r1, #1
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmod.rs:56
 240:	f1b8 0501 	subs.w	r5, r8, #1
 244:	f16c 0b00 	sbc.w	fp, ip, #0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmod.rs:47
 248:	1b7f      	subs	r7, r7, r5
 24a:	9f02      	ldr	r7, [sp, #8]
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmod.rs:55
 24c:	ea4f 0040 	mov.w	r0, r0, lsl #1
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmod.rs:47
 250:	eb77 070b 	sbcs.w	r7, r7, fp
 254:	f280 80ab 	bge.w	3ae <fmod+0x3ae>
 258:	ebbe 0103 	subs.w	r1, lr, r3
 25c:	46b3      	mov	fp, r6
 25e:	eb7e 0102 	sbcs.w	r1, lr, r2
 262:	f04f 35ff 	mov.w	r5, #4294967295	; 0xffffffff
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmod.rs:49
 266:	da05      	bge.n	274 <fmod+0x274>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmod.rs:50
 268:	ea53 0002 	orrs.w	r0, r3, r2
 26c:	4614      	mov	r4, r2
 26e:	4618      	mov	r0, r3
 270:	f000 8096 	beq.w	3a0 <fmod+0x3a0>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmod.rs:55
 274:	0061      	lsls	r1, r4, #1
 276:	ea41 74d0 	orr.w	r4, r1, r0, lsr #31
 27a:	ebda 0340 	rsbs	r3, sl, r0, lsl #1
 27e:	f04f 3eff 	mov.w	lr, #4294967295	; 0xffffffff
 282:	eb64 0209 	sbc.w	r2, r4, r9
 286:	1ae9      	subs	r1, r5, r3
 288:	eb75 0102 	sbcs.w	r1, r5, r2
 28c:	ea4f 0040 	mov.w	r0, r0, lsl #1
 290:	f04f 0100 	mov.w	r1, #0
 294:	bfb8      	it	lt
 296:	2101      	movlt	r1, #1
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmod.rs:56
 298:	f1b8 0502 	subs.w	r5, r8, #2
 29c:	f16c 0700 	sbc.w	r7, ip, #0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmod.rs:47
 2a0:	ebbb 0605 	subs.w	r6, fp, r5
 2a4:	9e02      	ldr	r6, [sp, #8]
 2a6:	41be      	sbcs	r6, r7
 2a8:	da4e      	bge.n	348 <fmod+0x348>
 2aa:	ebbe 0103 	subs.w	r1, lr, r3
 2ae:	f04f 35ff 	mov.w	r5, #4294967295	; 0xffffffff
 2b2:	eb7e 0102 	sbcs.w	r1, lr, r2
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmod.rs:49
 2b6:	da04      	bge.n	2c2 <fmod+0x2c2>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmod.rs:50
 2b8:	ea53 0002 	orrs.w	r0, r3, r2
 2bc:	4614      	mov	r4, r2
 2be:	4618      	mov	r0, r3
 2c0:	d06e      	beq.n	3a0 <fmod+0x3a0>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmod.rs:55
 2c2:	0061      	lsls	r1, r4, #1
 2c4:	ea41 74d0 	orr.w	r4, r1, r0, lsr #31
 2c8:	ebda 0340 	rsbs	r3, sl, r0, lsl #1
 2cc:	f04f 3eff 	mov.w	lr, #4294967295	; 0xffffffff
 2d0:	eb64 0209 	sbc.w	r2, r4, r9
 2d4:	1ae9      	subs	r1, r5, r3
 2d6:	eb75 0102 	sbcs.w	r1, r5, r2
 2da:	ea4f 0040 	mov.w	r0, r0, lsl #1
 2de:	f04f 0100 	mov.w	r1, #0
 2e2:	bfb8      	it	lt
 2e4:	2101      	movlt	r1, #1
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmod.rs:56
 2e6:	f1b8 0503 	subs.w	r5, r8, #3
 2ea:	f16c 0700 	sbc.w	r7, ip, #0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmod.rs:47
 2ee:	ebbb 0605 	subs.w	r6, fp, r5
 2f2:	9e02      	ldr	r6, [sp, #8]
 2f4:	41be      	sbcs	r6, r7
 2f6:	da27      	bge.n	348 <fmod+0x348>
 2f8:	ebbe 0103 	subs.w	r1, lr, r3
 2fc:	f04f 35ff 	mov.w	r5, #4294967295	; 0xffffffff
 300:	eb7e 0102 	sbcs.w	r1, lr, r2
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmod.rs:49
 304:	da04      	bge.n	310 <fmod+0x310>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmod.rs:50
 306:	ea53 0002 	orrs.w	r0, r3, r2
 30a:	4614      	mov	r4, r2
 30c:	4618      	mov	r0, r3
 30e:	d047      	beq.n	3a0 <fmod+0x3a0>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmod.rs:55
 310:	0061      	lsls	r1, r4, #1
 312:	ea41 74d0 	orr.w	r4, r1, r0, lsr #31
 316:	ebda 0340 	rsbs	r3, sl, r0, lsl #1
 31a:	ea4f 0040 	mov.w	r0, r0, lsl #1
 31e:	eb64 0209 	sbc.w	r2, r4, r9
 322:	1ae9      	subs	r1, r5, r3
 324:	eb75 0102 	sbcs.w	r1, r5, r2
 328:	f04f 0100 	mov.w	r1, #0
 32c:	bfb8      	it	lt
 32e:	2101      	movlt	r1, #1
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmod.rs:56
 330:	f1b8 0804 	subs.w	r8, r8, #4
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmod.rs:47
 334:	9f02      	ldr	r7, [sp, #8]
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmod.rs:56
 336:	f16c 0c00 	sbc.w	ip, ip, #0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmod.rs:47
 33a:	ebbb 0508 	subs.w	r5, fp, r8
 33e:	eb77 050c 	sbcs.w	r5, r7, ip
 342:	f6ff af61 	blt.w	208 <fmod+0x208>
 346:	e001      	b.n	34c <fmod+0x34c>
 348:	46a8      	mov	r8, r5
 34a:	46bc      	mov	ip, r7
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmod.rs:59
 34c:	b121      	cbz	r1, 358 <fmod+0x358>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmod.rs:60
 34e:	ea53 0002 	orrs.w	r0, r3, r2
 352:	4614      	mov	r4, r2
 354:	4618      	mov	r0, r3
 356:	d023      	beq.n	3a0 <fmod+0x3a0>
 358:	9b01      	ldr	r3, [sp, #4]
 35a:	2100      	movs	r1, #0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmod.rs:65
 35c:	ebb1 5f14 	cmp.w	r1, r4, lsr #20
 360:	d139      	bne.n	3d6 <fmod+0x3d6>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmod.rs:66
 362:	0062      	lsls	r2, r4, #1
 364:	ea42 72d0 	orr.w	r2, r2, r0, lsr #31
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmod.rs:65
 368:	f5b2 1f80 	cmp.w	r2, #1048576	; 0x100000
 36c:	d224      	bcs.n	3b8 <fmod+0x3b8>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmod.rs:66
 36e:	00a2      	lsls	r2, r4, #2
 370:	ea42 7290 	orr.w	r2, r2, r0, lsr #30
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmod.rs:65
 374:	ebb1 5f12 	cmp.w	r1, r2, lsr #20
 378:	d123      	bne.n	3c2 <fmod+0x3c2>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmod.rs:66
 37a:	00e2      	lsls	r2, r4, #3
 37c:	ea42 7250 	orr.w	r2, r2, r0, lsr #29
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmod.rs:65
 380:	ebb1 5f12 	cmp.w	r1, r2, lsr #20
 384:	d121      	bne.n	3ca <fmod+0x3ca>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmod.rs:67
 386:	f1b8 0804 	subs.w	r8, r8, #4
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmod.rs:66
 38a:	ea4f 1204 	mov.w	r2, r4, lsl #4
 38e:	ea42 7410 	orr.w	r4, r2, r0, lsr #28
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmod.rs:67
 392:	f16c 0c00 	sbc.w	ip, ip, #0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmod.rs:66
 396:	0100      	lsls	r0, r0, #4
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmod.rs:65
 398:	f5b4 1f80 	cmp.w	r4, #1048576	; 0x100000
 39c:	d3e1      	bcc.n	362 <fmod+0x362>
 39e:	e01a      	b.n	3d6 <fmod+0x3d6>
 3a0:	e9dd 0100 	ldrd	r0, r1, [sp]
 3a4:	2200      	movs	r2, #0
 3a6:	2300      	movs	r3, #0
 3a8:	f7ff fffe 	bl	0 <fmod>
 3ac:	e66d      	b.n	8a <fmod+0x8a>
 3ae:	46a8      	mov	r8, r5
 3b0:	46dc      	mov	ip, fp
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmod.rs:59
 3b2:	2900      	cmp	r1, #0
 3b4:	d1cb      	bne.n	34e <fmod+0x34e>
 3b6:	e7cf      	b.n	358 <fmod+0x358>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmod.rs:67
 3b8:	f1b8 0801 	subs.w	r8, r8, #1
 3bc:	ea4f 0040 	mov.w	r0, r0, lsl #1
 3c0:	e006      	b.n	3d0 <fmod+0x3d0>
 3c2:	0080      	lsls	r0, r0, #2
 3c4:	f1b8 0802 	subs.w	r8, r8, #2
 3c8:	e002      	b.n	3d0 <fmod+0x3d0>
 3ca:	00c0      	lsls	r0, r0, #3
 3cc:	f1b8 0803 	subs.w	r8, r8, #3
 3d0:	f16c 0c00 	sbc.w	ip, ip, #0
 3d4:	4614      	mov	r4, r2
 3d6:	f003 4200 	and.w	r2, r3, #2147483648	; 0x80000000
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmod.rs:71
 3da:	f1d8 0300 	rsbs	r3, r8, #0
 3de:	eb71 010c 	sbcs.w	r1, r1, ip
 3e2:	da04      	bge.n	3ee <fmod+0x3ee>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmod.rs:72
 3e4:	f5a4 1180 	sub.w	r1, r4, #1048576	; 0x100000
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmod.rs:73
 3e8:	ea41 5108 	orr.w	r1, r1, r8, lsl #20
 3ec:	e013      	b.n	416 <fmod+0x416>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmod.rs:75
 3ee:	f1c8 0101 	rsb	r1, r8, #1
 3f2:	f001 013f 	and.w	r1, r1, #63	; 0x3f
 3f6:	f1c1 0320 	rsb	r3, r1, #32
 3fa:	40c8      	lsrs	r0, r1
 3fc:	fa04 f303 	lsl.w	r3, r4, r3
 400:	4318      	orrs	r0, r3
 402:	f1a1 0320 	sub.w	r3, r1, #32
 406:	fa24 f101 	lsr.w	r1, r4, r1
 40a:	2b00      	cmp	r3, #0
 40c:	bfa8      	it	ge
 40e:	fa24 f003 	lsrge.w	r0, r4, r3
 412:	bfa8      	it	ge
 414:	2100      	movge	r1, #0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmod.rs:77
 416:	ea41 0602 	orr.w	r6, r1, r2
 41a:	e637      	b.n	8c <fmod+0x8c>

Disassembly of section .text.fmodf:

00000000 <fmodf>:
fmodf():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:254
   0:	e92d 47f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmodf.rs:9
   4:	f3c1 59c7 	ubfx	r9, r1, #23, #8
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmodf.rs:8
   8:	f3c0 5ac7 	ubfx	sl, r0, #23, #8
   c:	4680      	mov	r8, r0
   e:	2000      	movs	r0, #0
  10:	460d      	mov	r5, r1
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmodf.rs:13
  12:	ebb0 0f41 	cmp.w	r0, r1, lsl #1
  16:	d01d      	beq.n	54 <fmodf+0x54>
is_nan():
/rustc/3c235d5600393dfe6c36eeed34042efad8d4f26e/src/libcore/num/f32.rs:161
  18:	4628      	mov	r0, r5
  1a:	4629      	mov	r1, r5
  1c:	f7ff fffe 	bl	0 <fmodf>
fmodf():
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmodf.rs:13
  20:	b9c0      	cbnz	r0, 54 <fmodf+0x54>
  22:	f1ba 0fff 	cmp.w	sl, #255	; 0xff
  26:	d015      	beq.n	54 <fmodf+0x54>
  28:	006e      	lsls	r6, r5, #1
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmodf.rs:17
  2a:	ebb6 0f48 	cmp.w	r6, r8, lsl #1
  2e:	d21a      	bcs.n	66 <fmodf+0x66>
  30:	f64f 71ff 	movw	r1, #65535	; 0xffff
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmodf.rs:26
  34:	f1ba 0f00 	cmp.w	sl, #0
  38:	f2c0 017f 	movt	r1, #127	; 0x7f
  3c:	d01e      	beq.n	7c <fmodf+0x7c>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmodf.rs:35
  3e:	ea08 0001 	and.w	r0, r8, r1
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmodf.rs:36
  42:	f500 0000 	add.w	r0, r0, #8388608	; 0x800000
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmodf.rs:39
  46:	f1b9 0f00 	cmp.w	r9, #0
  4a:	d03d      	beq.n	c8 <fmodf+0xc8>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmodf.rs:48
  4c:	4029      	ands	r1, r5
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmodf.rs:49
  4e:	f501 0200 	add.w	r2, r1, #8388608	; 0x800000
  52:	e05b      	b.n	10c <fmodf+0x10c>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmodf.rs:14
  54:	4640      	mov	r0, r8
  56:	4629      	mov	r1, r5
  58:	f7ff fffe 	bl	0 <fmodf>
  5c:	4601      	mov	r1, r0
  5e:	f7ff fffe 	bl	0 <fmodf>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
  62:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmodf.rs:19
  66:	4640      	mov	r0, r8
  68:	2100      	movs	r1, #0
  6a:	ea4f 0448 	mov.w	r4, r8, lsl #1
  6e:	f7ff fffe 	bl	0 <fmodf>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmodf.rs:18
  72:	42b4      	cmp	r4, r6
  74:	bf18      	it	ne
  76:	4640      	movne	r0, r8
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
  78:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmodf.rs:27
  7c:	ea4f 2048 	mov.w	r0, r8, lsl #9
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmodf.rs:28
  80:	2800      	cmp	r0, #0
  82:	db10      	blt.n	a6 <fmodf+0xa6>
  84:	f04f 3aff 	mov.w	sl, #4294967295	; 0xffffffff
  88:	0042      	lsls	r2, r0, #1
  8a:	d414      	bmi.n	b6 <fmodf+0xb6>
  8c:	0082      	lsls	r2, r0, #2
  8e:	d40d      	bmi.n	ac <fmodf+0xac>
  90:	00c2      	lsls	r2, r0, #3
  92:	d40e      	bmi.n	b2 <fmodf+0xb2>
  94:	f1aa 0a04 	sub.w	sl, sl, #4
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmodf.rs:30
  98:	0100      	lsls	r0, r0, #4
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmodf.rs:28
  9a:	f1b0 3fff 	cmp.w	r0, #4294967295	; 0xffffffff
  9e:	dcf3      	bgt.n	88 <fmodf+0x88>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmodf.rs:33
  a0:	f10a 0a01 	add.w	sl, sl, #1
  a4:	e007      	b.n	b6 <fmodf+0xb6>
  a6:	f04f 0a00 	mov.w	sl, #0
  aa:	e004      	b.n	b6 <fmodf+0xb6>
  ac:	f1aa 0a01 	sub.w	sl, sl, #1
  b0:	e001      	b.n	b6 <fmodf+0xb6>
  b2:	f1aa 0a02 	sub.w	sl, sl, #2
  b6:	f1ca 0001 	rsb	r0, sl, #1
  ba:	f000 001f 	and.w	r0, r0, #31
  be:	fa08 f000 	lsl.w	r0, r8, r0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmodf.rs:39
  c2:	f1b9 0f00 	cmp.w	r9, #0
  c6:	d1c1      	bne.n	4c <fmodf+0x4c>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmodf.rs:40
  c8:	0269      	lsls	r1, r5, #9
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmodf.rs:41
  ca:	2900      	cmp	r1, #0
  cc:	db10      	blt.n	f0 <fmodf+0xf0>
  ce:	f04f 39ff 	mov.w	r9, #4294967295	; 0xffffffff
  d2:	004a      	lsls	r2, r1, #1
  d4:	d414      	bmi.n	100 <fmodf+0x100>
  d6:	008a      	lsls	r2, r1, #2
  d8:	d40d      	bmi.n	f6 <fmodf+0xf6>
  da:	00ca      	lsls	r2, r1, #3
  dc:	d40e      	bmi.n	fc <fmodf+0xfc>
  de:	f1a9 0904 	sub.w	r9, r9, #4
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmodf.rs:43
  e2:	0109      	lsls	r1, r1, #4
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmodf.rs:41
  e4:	f1b1 3fff 	cmp.w	r1, #4294967295	; 0xffffffff
  e8:	dcf3      	bgt.n	d2 <fmodf+0xd2>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmodf.rs:46
  ea:	f109 0901 	add.w	r9, r9, #1
  ee:	e007      	b.n	100 <fmodf+0x100>
  f0:	f04f 0900 	mov.w	r9, #0
  f4:	e004      	b.n	100 <fmodf+0x100>
  f6:	f1a9 0901 	sub.w	r9, r9, #1
  fa:	e001      	b.n	100 <fmodf+0x100>
  fc:	f1a9 0902 	sub.w	r9, r9, #2
 100:	f1c9 0101 	rsb	r1, r9, #1
 104:	f001 011f 	and.w	r1, r1, #31
 108:	fa05 f201 	lsl.w	r2, r5, r1
 10c:	1a81      	subs	r1, r0, r2
 10e:	2300      	movs	r3, #0
 110:	f1b1 3fff 	cmp.w	r1, #4294967295	; 0xffffffff
 114:	bfc8      	it	gt
 116:	2301      	movgt	r3, #1
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmodf.rs:53
 118:	45ca      	cmp	sl, r9
 11a:	dc26      	bgt.n	16a <fmodf+0x16a>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmodf.rs:67
 11c:	b113      	cbz	r3, 124 <fmodf+0x124>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmodf.rs:68
 11e:	2900      	cmp	r1, #0
 120:	4608      	mov	r0, r1
 122:	d057      	beq.n	1d4 <fmodf+0x1d4>
 124:	2100      	movs	r1, #0
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmodf.rs:74
 126:	ebb1 5fd0 	cmp.w	r1, r0, lsr #23
 12a:	d166      	bne.n	1fa <fmodf+0x1fa>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmodf.rs:75
 12c:	0042      	lsls	r2, r0, #1
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmodf.rs:74
 12e:	f5b2 0f00 	cmp.w	r2, #8388608	; 0x800000
 132:	d255      	bcs.n	1e0 <fmodf+0x1e0>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmodf.rs:75
 134:	0082      	lsls	r2, r0, #2
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmodf.rs:74
 136:	ebb1 5fd2 	cmp.w	r1, r2, lsr #23
 13a:	d158      	bne.n	1ee <fmodf+0x1ee>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmodf.rs:75
 13c:	00c2      	lsls	r2, r0, #3
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmodf.rs:74
 13e:	ebb1 5fd2 	cmp.w	r1, r2, lsr #23
 142:	d157      	bne.n	1f4 <fmodf+0x1f4>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmodf.rs:76
 144:	f1aa 0a04 	sub.w	sl, sl, #4
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmodf.rs:75
 148:	0100      	lsls	r0, r0, #4
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmodf.rs:74
 14a:	f5b0 0f00 	cmp.w	r0, #8388608	; 0x800000
 14e:	d3ed      	bcc.n	12c <fmodf+0x12c>
 150:	e053      	b.n	1fa <fmodf+0x1fa>
 152:	ebc2 0140 	rsb	r1, r2, r0, lsl #1
 156:	2300      	movs	r3, #0
 158:	f1b1 3fff 	cmp.w	r1, #4294967295	; 0xffffffff
 15c:	bfc8      	it	gt
 15e:	2301      	movgt	r3, #1
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmodf.rs:63
 160:	f1aa 0a04 	sub.w	sl, sl, #4
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmodf.rs:61
 164:	0040      	lsls	r0, r0, #1
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmodf.rs:53
 166:	45ca      	cmp	sl, r9
 168:	ddd8      	ble.n	11c <fmodf+0x11c>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmodf.rs:55
 16a:	07db      	lsls	r3, r3, #31
 16c:	d002      	beq.n	174 <fmodf+0x174>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmodf.rs:56
 16e:	2900      	cmp	r1, #0
 170:	4608      	mov	r0, r1
 172:	d02f      	beq.n	1d4 <fmodf+0x1d4>
 174:	ebc2 0140 	rsb	r1, r2, r0, lsl #1
 178:	2300      	movs	r3, #0
 17a:	f1b1 3fff 	cmp.w	r1, #4294967295	; 0xffffffff
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmodf.rs:63
 17e:	f1aa 0601 	sub.w	r6, sl, #1
 182:	bfc8      	it	gt
 184:	2301      	movgt	r3, #1
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmodf.rs:61
 186:	0040      	lsls	r0, r0, #1
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmodf.rs:53
 188:	454e      	cmp	r6, r9
 18a:	dd2c      	ble.n	1e6 <fmodf+0x1e6>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmodf.rs:55
 18c:	2900      	cmp	r1, #0
 18e:	db01      	blt.n	194 <fmodf+0x194>
 190:	4608      	mov	r0, r1
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmodf.rs:56
 192:	d01f      	beq.n	1d4 <fmodf+0x1d4>
 194:	ebc2 0140 	rsb	r1, r2, r0, lsl #1
 198:	2300      	movs	r3, #0
 19a:	f1b1 3fff 	cmp.w	r1, #4294967295	; 0xffffffff
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmodf.rs:63
 19e:	f1aa 0702 	sub.w	r7, sl, #2
 1a2:	bfc8      	it	gt
 1a4:	2301      	movgt	r3, #1
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmodf.rs:61
 1a6:	0040      	lsls	r0, r0, #1
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmodf.rs:53
 1a8:	454f      	cmp	r7, r9
 1aa:	dd3a      	ble.n	222 <fmodf+0x222>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmodf.rs:55
 1ac:	2900      	cmp	r1, #0
 1ae:	db01      	blt.n	1b4 <fmodf+0x1b4>
 1b0:	4608      	mov	r0, r1
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmodf.rs:56
 1b2:	d00f      	beq.n	1d4 <fmodf+0x1d4>
 1b4:	ebc2 0140 	rsb	r1, r2, r0, lsl #1
 1b8:	2300      	movs	r3, #0
 1ba:	f1b1 3fff 	cmp.w	r1, #4294967295	; 0xffffffff
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmodf.rs:63
 1be:	f1aa 0403 	sub.w	r4, sl, #3
 1c2:	bfc8      	it	gt
 1c4:	2301      	movgt	r3, #1
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmodf.rs:61
 1c6:	0040      	lsls	r0, r0, #1
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmodf.rs:53
 1c8:	454c      	cmp	r4, r9
 1ca:	dd2f      	ble.n	22c <fmodf+0x22c>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmodf.rs:55
 1cc:	2900      	cmp	r1, #0
 1ce:	dbc0      	blt.n	152 <fmodf+0x152>
 1d0:	4608      	mov	r0, r1
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmodf.rs:56
 1d2:	d1be      	bne.n	152 <fmodf+0x152>
 1d4:	4640      	mov	r0, r8
 1d6:	2100      	movs	r1, #0
 1d8:	f7ff fffe 	bl	0 <fmodf>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
 1dc:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmodf.rs:76
 1e0:	f1aa 0a01 	sub.w	sl, sl, #1
 1e4:	e008      	b.n	1f8 <fmodf+0x1f8>
 1e6:	46b2      	mov	sl, r6
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmodf.rs:67
 1e8:	2b00      	cmp	r3, #0
 1ea:	d198      	bne.n	11e <fmodf+0x11e>
 1ec:	e79a      	b.n	124 <fmodf+0x124>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmodf.rs:76
 1ee:	f1aa 0a02 	sub.w	sl, sl, #2
 1f2:	e001      	b.n	1f8 <fmodf+0x1f8>
 1f4:	f1aa 0a03 	sub.w	sl, sl, #3
 1f8:	4610      	mov	r0, r2
 1fa:	f008 4100 	and.w	r1, r8, #2147483648	; 0x80000000
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmodf.rs:80
 1fe:	f1ba 0f00 	cmp.w	sl, #0
 202:	dd06      	ble.n	212 <fmodf+0x212>
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmodf.rs:81
 204:	f5a0 0000 	sub.w	r0, r0, #8388608	; 0x800000
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmodf.rs:82
 208:	ea40 50ca 	orr.w	r0, r0, sl, lsl #23
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmodf.rs:86
 20c:	4308      	orrs	r0, r1
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
 20e:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmodf.rs:84
 212:	f1ca 0201 	rsb	r2, sl, #1
 216:	f002 021f 	and.w	r2, r2, #31
 21a:	40d0      	lsrs	r0, r2
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmodf.rs:86
 21c:	4308      	orrs	r0, r1
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/macros.rs:256
 21e:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
 222:	46ba      	mov	sl, r7
/cargo/registry/src/github.com-1ecc6299db9ec823/compiler_builtins-0.1.9/src/../libm/src/math/fmodf.rs:67
 224:	2b00      	cmp	r3, #0
 226:	f47f af7a 	bne.w	11e <fmodf+0x11e>
 22a:	e77b      	b.n	124 <fmodf+0x124>
 22c:	46a2      	mov	sl, r4
 22e:	2b00      	cmp	r3, #0
 230:	f47f af75 	bne.w	11e <fmodf+0x11e>
 234:	e776      	b.n	124 <fmodf+0x124>

absvdi2.o:     file format elf32-littlearm

SYMBOL TABLE:
00000000 l    df *ABS*	00000000 absvdi2.c
00000000 l    d  .text	00000000 .text
00000000 l    d  .data	00000000 .data
00000000 l    d  .bss	00000000 .bss
00000000 l    d  .text.__absvdi2	00000000 .text.__absvdi2
00000000 l       .rodata.__absvdi2.str1.4	00000000 .LC0
00000000 l    d  .rodata.__absvdi2.str1.4	00000000 .rodata.__absvdi2.str1.4
00000000 l    d  .rodata.__func__.3739	00000000 .rodata.__func__.3739
00000000 l     O .rodata.__func__.3739	0000000a __func__.3739
00000000 l    d  .comment	00000000 .comment
00000000 l    d  .ARM.attributes	00000000 .ARM.attributes
00000000 g     F .text.__absvdi2	0000003c .hidden __absvdi2
00000000         *UND*	00000000 __compilerrt_abort_impl



Disassembly of section .text.__absvdi2:

00000000 <__absvdi2>:
__absvdi2():
   0:	f1b1 4f00 	cmp.w	r1, #2147483648	; 0x80000000
   4:	bf08      	it	eq
   6:	2800      	cmpeq	r0, #0
   8:	e92d 4800 	stmdb	sp!, {fp, lr}
   c:	d00a      	beq.n	24 <__absvdi2+0x24>
   e:	17ca      	asrs	r2, r1, #31
  10:	ea80 0b02 	eor.w	fp, r0, r2
  14:	ea81 0c02 	eor.w	ip, r1, r2
  18:	ebbb 0002 	subs.w	r0, fp, r2
  1c:	eb6c 0102 	sbc.w	r1, ip, r2
  20:	e8bd 8800 	ldmia.w	sp!, {fp, pc}
  24:	4a03      	ldr	r2, [pc, #12]	; (34 <__absvdi2+0x34>)
  26:	4804      	ldr	r0, [pc, #16]	; (38 <__absvdi2+0x38>)
  28:	447a      	add	r2, pc
  2a:	211a      	movs	r1, #26
  2c:	4478      	add	r0, pc
  2e:	f7ff fffe 	bl	0 <__compilerrt_abort_impl>
  32:	bf00      	nop
  34:	00000008 	.word	0x00000008
  38:	00000008 	.word	0x00000008

absvsi2.o:     file format elf32-littlearm

SYMBOL TABLE:
00000000 l    df *ABS*	00000000 absvsi2.c
00000000 l    d  .text	00000000 .text
00000000 l    d  .data	00000000 .data
00000000 l    d  .bss	00000000 .bss
00000000 l    d  .text.__absvsi2	00000000 .text.__absvsi2
00000000 l       .rodata.__absvsi2.str1.4	00000000 .LC0
00000000 l    d  .rodata.__absvsi2.str1.4	00000000 .rodata.__absvsi2.str1.4
00000000 l    d  .rodata.__func__.3739	00000000 .rodata.__func__.3739
00000000 l     O .rodata.__func__.3739	0000000a __func__.3739
00000000 l    d  .comment	00000000 .comment
00000000 l    d  .ARM.attributes	00000000 .ARM.attributes
00000000 g     F .text.__absvsi2	00000028 .hidden __absvsi2
00000000         *UND*	00000000 __compilerrt_abort_impl



Disassembly of section .text.__absvsi2:

00000000 <__absvsi2>:
__absvsi2():
   0:	f1b0 4f00 	cmp.w	r0, #2147483648	; 0x80000000
   4:	b508      	push	{r3, lr}
   6:	d003      	beq.n	10 <__absvsi2+0x10>
   8:	17c3      	asrs	r3, r0, #31
   a:	4058      	eors	r0, r3
   c:	1ac0      	subs	r0, r0, r3
   e:	bd08      	pop	{r3, pc}
  10:	4a03      	ldr	r2, [pc, #12]	; (20 <__absvsi2+0x20>)
  12:	4804      	ldr	r0, [pc, #16]	; (24 <__absvsi2+0x24>)
  14:	447a      	add	r2, pc
  16:	211a      	movs	r1, #26
  18:	4478      	add	r0, pc
  1a:	f7ff fffe 	bl	0 <__compilerrt_abort_impl>
  1e:	bf00      	nop
  20:	00000008 	.word	0x00000008
  24:	00000008 	.word	0x00000008

absvti2.o:     file format elf32-littlearm

SYMBOL TABLE:
00000000 l    df *ABS*	00000000 absvti2.c
00000000 l    d  .text	00000000 .text
00000000 l    d  .data	00000000 .data
00000000 l    d  .bss	00000000 .bss
00000000 l    d  .comment	00000000 .comment
00000000 l    d  .ARM.attributes	00000000 .ARM.attributes



addvdi3.o:     file format elf32-littlearm

SYMBOL TABLE:
00000000 l    df *ABS*	00000000 addvdi3.c
00000000 l    d  .text	00000000 .text
00000000 l    d  .data	00000000 .data
00000000 l    d  .bss	00000000 .bss
00000000 l    d  .text.__addvdi3	00000000 .text.__addvdi3
00000000 l       .rodata.__addvdi3.str1.4	00000000 .LC0
00000000 l    d  .rodata.__addvdi3.str1.4	00000000 .rodata.__addvdi3.str1.4
00000000 l    d  .rodata.__func__.3740	00000000 .rodata.__func__.3740
00000000 l     O .rodata.__func__.3740	0000000a __func__.3740
00000000 l    d  .comment	00000000 .comment
00000000 l    d  .ARM.attributes	00000000 .ARM.attributes
00000000 g     F .text.__addvdi3	00000054 .hidden __addvdi3
00000000         *UND*	00000000 __compilerrt_abort_impl



Disassembly of section .text.__addvdi3:

00000000 <__addvdi3>:
__addvdi3():
   0:	b538      	push	{r3, r4, r5, lr}
   2:	1884      	adds	r4, r0, r2
   4:	eb41 0503 	adc.w	r5, r1, r3
   8:	2a00      	cmp	r2, #0
   a:	f173 0300 	sbcs.w	r3, r3, #0
   e:	db06      	blt.n	1e <__addvdi3+0x1e>
  10:	4284      	cmp	r4, r0
  12:	eb75 0301 	sbcs.w	r3, r5, r1
  16:	db0d      	blt.n	34 <__addvdi3+0x34>
  18:	4620      	mov	r0, r4
  1a:	4629      	mov	r1, r5
  1c:	bd38      	pop	{r3, r4, r5, pc}
  1e:	4284      	cmp	r4, r0
  20:	eb75 0301 	sbcs.w	r3, r5, r1
  24:	dbf8      	blt.n	18 <__addvdi3+0x18>
  26:	4a07      	ldr	r2, [pc, #28]	; (44 <__addvdi3+0x44>)
  28:	4807      	ldr	r0, [pc, #28]	; (48 <__addvdi3+0x48>)
  2a:	447a      	add	r2, pc
  2c:	2121      	movs	r1, #33	; 0x21
  2e:	4478      	add	r0, pc
  30:	f7ff fffe 	bl	0 <__compilerrt_abort_impl>
  34:	4a05      	ldr	r2, [pc, #20]	; (4c <__addvdi3+0x4c>)
  36:	4806      	ldr	r0, [pc, #24]	; (50 <__addvdi3+0x50>)
  38:	447a      	add	r2, pc
  3a:	211c      	movs	r1, #28
  3c:	4478      	add	r0, pc
  3e:	f7ff fffe 	bl	0 <__compilerrt_abort_impl>
  42:	bf00      	nop
  44:	00000016 	.word	0x00000016
  48:	00000016 	.word	0x00000016
  4c:	00000010 	.word	0x00000010
  50:	00000010 	.word	0x00000010

addvsi3.o:     file format elf32-littlearm

SYMBOL TABLE:
00000000 l    df *ABS*	00000000 addvsi3.c
00000000 l    d  .text	00000000 .text
00000000 l    d  .data	00000000 .data
00000000 l    d  .bss	00000000 .bss
00000000 l    d  .text.__addvsi3	00000000 .text.__addvsi3
00000000 l       .rodata.__addvsi3.str1.4	00000000 .LC0
00000000 l    d  .rodata.__addvsi3.str1.4	00000000 .rodata.__addvsi3.str1.4
00000000 l    d  .rodata.__func__.3740	00000000 .rodata.__func__.3740
00000000 l     O .rodata.__func__.3740	0000000a __func__.3740
00000000 l    d  .comment	00000000 .comment
00000000 l    d  .ARM.attributes	00000000 .ARM.attributes
00000000 g     F .text.__addvsi3	00000044 .hidden __addvsi3
00000000         *UND*	00000000 __compilerrt_abort_impl



Disassembly of section .text.__addvsi3:

00000000 <__addvsi3>:
__addvsi3():
   0:	2900      	cmp	r1, #0
   2:	b508      	push	{r3, lr}
   4:	eb00 0301 	add.w	r3, r0, r1
   8:	db03      	blt.n	12 <__addvsi3+0x12>
   a:	4298      	cmp	r0, r3
   c:	dc0a      	bgt.n	24 <__addvsi3+0x24>
   e:	4618      	mov	r0, r3
  10:	bd08      	pop	{r3, pc}
  12:	4298      	cmp	r0, r3
  14:	dcfb      	bgt.n	e <__addvsi3+0xe>
  16:	4a07      	ldr	r2, [pc, #28]	; (34 <__addvsi3+0x34>)
  18:	4807      	ldr	r0, [pc, #28]	; (38 <__addvsi3+0x38>)
  1a:	447a      	add	r2, pc
  1c:	2121      	movs	r1, #33	; 0x21
  1e:	4478      	add	r0, pc
  20:	f7ff fffe 	bl	0 <__compilerrt_abort_impl>
  24:	4a05      	ldr	r2, [pc, #20]	; (3c <__addvsi3+0x3c>)
  26:	4806      	ldr	r0, [pc, #24]	; (40 <__addvsi3+0x40>)
  28:	447a      	add	r2, pc
  2a:	211c      	movs	r1, #28
  2c:	4478      	add	r0, pc
  2e:	f7ff fffe 	bl	0 <__compilerrt_abort_impl>
  32:	bf00      	nop
  34:	00000016 	.word	0x00000016
  38:	00000016 	.word	0x00000016
  3c:	00000010 	.word	0x00000010
  40:	00000010 	.word	0x00000010

addvti3.o:     file format elf32-littlearm

SYMBOL TABLE:
00000000 l    df *ABS*	00000000 absvti2.c
00000000 l    d  .text	00000000 .text
00000000 l    d  .data	00000000 .data
00000000 l    d  .bss	00000000 .bss
00000000 l    d  .comment	00000000 .comment
00000000 l    d  .ARM.attributes	00000000 .ARM.attributes



aeabi_cdcmpeq_check_nan.o:     file format elf32-littlearm

SYMBOL TABLE:
00000000 l    df *ABS*	00000000 aeabi_cdcmpeq_check_nan.c
00000000 l    d  .text	00000000 .text
00000000 l    d  .data	00000000 .data
00000000 l    d  .bss	00000000 .bss
00000000 l    d  .text.__aeabi_cdcmpeq_check_nan	00000000 .text.__aeabi_cdcmpeq_check_nan
00000000 l    d  .comment	00000000 .comment
00000000 l    d  .ARM.attributes	00000000 .ARM.attributes
00000000         *UND*	00000000 __aeabi_dcmpun
00000000 g     F .text.__aeabi_cdcmpeq_check_nan	00000028 .hidden __aeabi_cdcmpeq_check_nan



Disassembly of section .text.__aeabi_cdcmpeq_check_nan:

00000000 <__aeabi_cdcmpeq_check_nan>:
__aeabi_cdcmpeq_check_nan():
   0:	b538      	push	{r3, r4, r5, lr}
   2:	4614      	mov	r4, r2
   4:	461d      	mov	r5, r3
   6:	4602      	mov	r2, r0
   8:	460b      	mov	r3, r1
   a:	f7ff fffe 	bl	0 <__aeabi_dcmpun>
   e:	b948      	cbnz	r0, 24 <__aeabi_cdcmpeq_check_nan+0x24>
  10:	4622      	mov	r2, r4
  12:	462b      	mov	r3, r5
  14:	4620      	mov	r0, r4
  16:	4629      	mov	r1, r5
  18:	f7ff fffe 	bl	0 <__aeabi_dcmpun>
  1c:	3000      	adds	r0, #0
  1e:	bf18      	it	ne
  20:	2001      	movne	r0, #1
  22:	bd38      	pop	{r3, r4, r5, pc}
  24:	2001      	movs	r0, #1
  26:	bd38      	pop	{r3, r4, r5, pc}

aeabi_cfcmpeq_check_nan.o:     file format elf32-littlearm

SYMBOL TABLE:
00000000 l    df *ABS*	00000000 aeabi_cfcmpeq_check_nan.c
00000000 l    d  .text	00000000 .text
00000000 l    d  .data	00000000 .data
00000000 l    d  .bss	00000000 .bss
00000000 l    d  .text.__aeabi_cfcmpeq_check_nan	00000000 .text.__aeabi_cfcmpeq_check_nan
00000000 l    d  .comment	00000000 .comment
00000000 l    d  .ARM.attributes	00000000 .ARM.attributes
00000000         *UND*	00000000 __aeabi_fcmpun
00000000 g     F .text.__aeabi_cfcmpeq_check_nan	00000020 .hidden __aeabi_cfcmpeq_check_nan



Disassembly of section .text.__aeabi_cfcmpeq_check_nan:

00000000 <__aeabi_cfcmpeq_check_nan>:
__aeabi_cfcmpeq_check_nan():
   0:	b510      	push	{r4, lr}
   2:	460c      	mov	r4, r1
   4:	4601      	mov	r1, r0
   6:	f7ff fffe 	bl	0 <__aeabi_fcmpun>
   a:	b938      	cbnz	r0, 1c <__aeabi_cfcmpeq_check_nan+0x1c>
   c:	4621      	mov	r1, r4
   e:	4620      	mov	r0, r4
  10:	f7ff fffe 	bl	0 <__aeabi_fcmpun>
  14:	3000      	adds	r0, #0
  16:	bf18      	it	ne
  18:	2001      	movne	r0, #1
  1a:	bd10      	pop	{r4, pc}
  1c:	2001      	movs	r0, #1
  1e:	bd10      	pop	{r4, pc}

aeabi_div0.o:     file format elf32-littlearm

SYMBOL TABLE:
00000000 l    df *ABS*	00000000 aeabi_div0.c
00000000 l    d  .text	00000000 .text
00000000 l    d  .data	00000000 .data
00000000 l    d  .bss	00000000 .bss
00000000 l    d  .text.__aeabi_idiv0	00000000 .text.__aeabi_idiv0
00000000 l    d  .text.__aeabi_ldiv0	00000000 .text.__aeabi_ldiv0
00000000 l    d  .comment	00000000 .comment
00000000 l    d  .ARM.attributes	00000000 .ARM.attributes
00000000  w    F .text.__aeabi_idiv0	00000002 .hidden __aeabi_idiv0
00000000  w    F .text.__aeabi_ldiv0	00000002 .hidden __aeabi_ldiv0



Disassembly of section .text.__aeabi_idiv0:

00000000 <__aeabi_idiv0>:
__aeabi_idiv0():
   0:	4770      	bx	lr
   2:	bf00      	nop

Disassembly of section .text.__aeabi_ldiv0:

00000000 <__aeabi_ldiv0>:
__aeabi_ldiv0():
   0:	4770      	bx	lr
   2:	bf00      	nop

aeabi_drsub.o:     file format elf32-littlearm

SYMBOL TABLE:
00000000 l    df *ABS*	00000000 aeabi_drsub.c
00000000 l    d  .text	00000000 .text
00000000 l    d  .data	00000000 .data
00000000 l    d  .bss	00000000 .bss
00000000 l    d  .text.__aeabi_drsub	00000000 .text.__aeabi_drsub
00000000 l    d  .comment	00000000 .comment
00000000 l    d  .ARM.attributes	00000000 .ARM.attributes
00000000 g     F .text.__aeabi_drsub	00000014 .hidden __aeabi_drsub
00000000         *UND*	00000000 __aeabi_dsub



Disassembly of section .text.__aeabi_drsub:

00000000 <__aeabi_drsub>:
__aeabi_drsub():
   0:	b430      	push	{r4, r5}
   2:	4614      	mov	r4, r2
   4:	461d      	mov	r5, r3
   6:	4602      	mov	r2, r0
   8:	460b      	mov	r3, r1
   a:	4620      	mov	r0, r4
   c:	4629      	mov	r1, r5
   e:	bc30      	pop	{r4, r5}
  10:	f7ff bffe 	b.w	0 <__aeabi_dsub>

aeabi_frsub.o:     file format elf32-littlearm

SYMBOL TABLE:
00000000 l    df *ABS*	00000000 aeabi_frsub.c
00000000 l    d  .text	00000000 .text
00000000 l    d  .data	00000000 .data
00000000 l    d  .bss	00000000 .bss
00000000 l    d  .text.__aeabi_frsub	00000000 .text.__aeabi_frsub
00000000 l    d  .comment	00000000 .comment
00000000 l    d  .ARM.attributes	00000000 .ARM.attributes
00000000 g     F .text.__aeabi_frsub	0000000a .hidden __aeabi_frsub
00000000         *UND*	00000000 __aeabi_fsub



Disassembly of section .text.__aeabi_frsub:

00000000 <__aeabi_frsub>:
__aeabi_frsub():
   0:	460b      	mov	r3, r1
   2:	4601      	mov	r1, r0
   4:	4618      	mov	r0, r3
   6:	f7ff bffe 	b.w	0 <__aeabi_fsub>
   a:	bf00      	nop

apple_versioning.o:     file format elf32-littlearm

SYMBOL TABLE:
00000000 l    df *ABS*	00000000 apple_versioning.c
00000000 l    d  .text	00000000 .text
00000000 l    d  .data	00000000 .data
00000000 l    d  .bss	00000000 .bss
00000000 l    d  .comment	00000000 .comment
00000000 l    d  .ARM.attributes	00000000 .ARM.attributes



bswapdi2.o:     file format elf32-littlearm

SYMBOL TABLE:
00000000 l    d  .text	00000000 .text
00000000 l    d  .data	00000000 .data
00000000 l    d  .bss	00000000 .bss
00000000 l    d  .ARM.attributes	00000000 .ARM.attributes
00000000 g     F .text	00000008 .hidden __bswapdi2



Disassembly of section .text:

00000000 <__bswapdi2>:
__bswapdi2():
   0:	ba02      	rev	r2, r0
   2:	ba08      	rev	r0, r1
   4:	4611      	mov	r1, r2
   6:	4770      	bx	lr

bswapsi2.o:     file format elf32-littlearm

SYMBOL TABLE:
00000000 l    d  .text	00000000 .text
00000000 l    d  .data	00000000 .data
00000000 l    d  .bss	00000000 .bss
00000000 l    d  .ARM.attributes	00000000 .ARM.attributes
00000000 g     F .text	00000004 .hidden __bswapsi2



Disassembly of section .text:

00000000 <__bswapsi2>:
__bswapsi2():
   0:	ba00      	rev	r0, r0
   2:	4770      	bx	lr

clzdi2.o:     file format elf32-littlearm

SYMBOL TABLE:
00000000 l    d  .text	00000000 .text
00000000 l    d  .data	00000000 .data
00000000 l    d  .bss	00000000 .bss
00000000 l    d  .ARM.attributes	00000000 .ARM.attributes
00000000 g     F .text	00000010 .hidden __clzdi2



Disassembly of section .text:

00000000 <__clzdi2>:
__clzdi2():
   0:	2900      	cmp	r1, #0
   2:	bf12      	itee	ne
   4:	fab1 f081 	clzne	r0, r1
   8:	fab0 f080 	clzeq	r0, r0
   c:	3020      	addeq	r0, #32
   e:	4770      	bx	lr

clzsi2.o:     file format elf32-littlearm

SYMBOL TABLE:
00000000 l    d  .text	00000000 .text
00000000 l    d  .data	00000000 .data
00000000 l    d  .bss	00000000 .bss
00000000 l    d  .ARM.attributes	00000000 .ARM.attributes
00000000 g     F .text	00000006 .hidden __clzsi2



Disassembly of section .text:

00000000 <__clzsi2>:
__clzsi2():
   0:	fab0 f080 	clz	r0, r0
   4:	4770      	bx	lr
   6:	bf00      	nop

clzti2.o:     file format elf32-littlearm

SYMBOL TABLE:
00000000 l    df *ABS*	00000000 absvti2.c
00000000 l    d  .text	00000000 .text
00000000 l    d  .data	00000000 .data
00000000 l    d  .bss	00000000 .bss
00000000 l    d  .comment	00000000 .comment
00000000 l    d  .ARM.attributes	00000000 .ARM.attributes



cmpdi2.o:     file format elf32-littlearm

SYMBOL TABLE:
00000000 l    df *ABS*	00000000 cmpdi2.c
00000000 l    d  .text	00000000 .text
00000000 l    d  .data	00000000 .data
00000000 l    d  .bss	00000000 .bss
00000000 l    d  .text.__cmpdi2	00000000 .text.__cmpdi2
00000000 l    d  .text.__aeabi_lcmp	00000000 .text.__aeabi_lcmp
00000000 l    d  .comment	00000000 .comment
00000000 l    d  .ARM.attributes	00000000 .ARM.attributes
00000000 g     F .text.__cmpdi2	00000018 .hidden __cmpdi2
00000000 g     F .text.__aeabi_lcmp	0000001c .hidden __aeabi_lcmp



Disassembly of section .text.__cmpdi2:

00000000 <__cmpdi2>:
__cmpdi2():
   0:	4299      	cmp	r1, r3
   2:	db05      	blt.n	10 <__cmpdi2+0x10>
   4:	dc06      	bgt.n	14 <__cmpdi2+0x14>
   6:	4290      	cmp	r0, r2
   8:	d302      	bcc.n	10 <__cmpdi2+0x10>
   a:	d803      	bhi.n	14 <__cmpdi2+0x14>
   c:	2001      	movs	r0, #1
   e:	4770      	bx	lr
  10:	2000      	movs	r0, #0
  12:	4770      	bx	lr
  14:	2002      	movs	r0, #2
  16:	4770      	bx	lr

Disassembly of section .text.__aeabi_lcmp:

00000000 <__aeabi_lcmp>:
__aeabi_lcmp():
   0:	4299      	cmp	r1, r3
   2:	db06      	blt.n	12 <__aeabi_lcmp+0x12>
   4:	dc08      	bgt.n	18 <__aeabi_lcmp+0x18>
   6:	4290      	cmp	r0, r2
   8:	d303      	bcc.n	12 <__aeabi_lcmp+0x12>
   a:	bf8c      	ite	hi
   c:	2001      	movhi	r0, #1
   e:	2000      	movls	r0, #0
  10:	4770      	bx	lr
  12:	f04f 30ff 	mov.w	r0, #4294967295	; 0xffffffff
  16:	4770      	bx	lr
  18:	2001      	movs	r0, #1
  1a:	4770      	bx	lr

cmpti2.o:     file format elf32-littlearm

SYMBOL TABLE:
00000000 l    df *ABS*	00000000 absvti2.c
00000000 l    d  .text	00000000 .text
00000000 l    d  .data	00000000 .data
00000000 l    d  .bss	00000000 .bss
00000000 l    d  .comment	00000000 .comment
00000000 l    d  .ARM.attributes	00000000 .ARM.attributes



ctzdi2.o:     file format elf32-littlearm

SYMBOL TABLE:
00000000 l    df *ABS*	00000000 ctzdi2.c
00000000 l    d  .text	00000000 .text
00000000 l    d  .data	00000000 .data
00000000 l    d  .bss	00000000 .bss
00000000 l    d  .text.__ctzdi2	00000000 .text.__ctzdi2
00000000 l    d  .comment	00000000 .comment
00000000 l    d  .ARM.attributes	00000000 .ARM.attributes
00000000 g     F .text.__ctzdi2	00000020 .hidden __ctzdi2



Disassembly of section .text.__ctzdi2:

00000000 <__ctzdi2>:
__ctzdi2():
   0:	fab0 f380 	clz	r3, r0
   4:	095b      	lsrs	r3, r3, #5
   6:	425a      	negs	r2, r3
   8:	3b01      	subs	r3, #1
   a:	4011      	ands	r1, r2
   c:	4003      	ands	r3, r0
   e:	430b      	orrs	r3, r1
  10:	fa93 f3a3 	rbit	r3, r3
  14:	fab3 f383 	clz	r3, r3
  18:	f002 0020 	and.w	r0, r2, #32
  1c:	4418      	add	r0, r3
  1e:	4770      	bx	lr

ctzsi2.o:     file format elf32-littlearm

SYMBOL TABLE:
00000000 l    df *ABS*	00000000 ctzsi2.c
00000000 l    d  .text	00000000 .text
00000000 l    d  .data	00000000 .data
00000000 l    d  .bss	00000000 .bss
00000000 l    d  .text.__ctzsi2	00000000 .text.__ctzsi2
00000000 l    d  .comment	00000000 .comment
00000000 l    d  .ARM.attributes	00000000 .ARM.attributes
00000000 g     F .text.__ctzsi2	0000003e .hidden __ctzsi2



Disassembly of section .text.__ctzsi2:

00000000 <__ctzsi2>:
__ctzsi2():
   0:	b283      	uxth	r3, r0
   2:	b9d3      	cbnz	r3, 3a <__ctzsi2+0x3a>
   4:	2310      	movs	r3, #16
   6:	0c00      	lsrs	r0, r0, #16
   8:	f010 0fff 	tst.w	r0, #255	; 0xff
   c:	bf04      	itt	eq
   e:	0a00      	lsreq	r0, r0, #8
  10:	3308      	addeq	r3, #8
  12:	0701      	lsls	r1, r0, #28
  14:	bf04      	itt	eq
  16:	0900      	lsreq	r0, r0, #4
  18:	3304      	addeq	r3, #4
  1a:	0782      	lsls	r2, r0, #30
  1c:	bf08      	it	eq
  1e:	0880      	lsreq	r0, r0, #2
  20:	ea6f 0200 	mvn.w	r2, r0
  24:	f3c0 0040 	ubfx	r0, r0, #1, #1
  28:	f342 0200 	sbfx	r2, r2, #0, #1
  2c:	f1c0 0002 	rsb	r0, r0, #2
  30:	bf08      	it	eq
  32:	3302      	addeq	r3, #2
  34:	4010      	ands	r0, r2
  36:	4418      	add	r0, r3
  38:	4770      	bx	lr
  3a:	2300      	movs	r3, #0
  3c:	e7e4      	b.n	8 <__ctzsi2+0x8>
  3e:	bf00      	nop

ctzti2.o:     file format elf32-littlearm

SYMBOL TABLE:
00000000 l    df *ABS*	00000000 absvti2.c
00000000 l    d  .text	00000000 .text
00000000 l    d  .data	00000000 .data
00000000 l    d  .bss	00000000 .bss
00000000 l    d  .comment	00000000 .comment
00000000 l    d  .ARM.attributes	00000000 .ARM.attributes



divdc3.o:     file format elf32-littlearm

SYMBOL TABLE:
00000000 l    df *ABS*	00000000 divdc3.c
00000000 l    d  .text	00000000 .text
00000000 l    d  .data	00000000 .data
00000000 l    d  .bss	00000000 .bss
00000000 l    d  .text.__divdc3	00000000 .text.__divdc3
00000000 l    d  .comment	00000000 .comment
00000000 l    d  .ARM.attributes	00000000 .ARM.attributes
00000000         *UND*	00000000 __aeabi_dcmpeq
00000000         *UND*	00000000 __aeabi_i2d
00000000         *UND*	00000000 __aeabi_dcmpun
00000000         *UND*	00000000 __aeabi_dcmple
00000000         *UND*	00000000 __aeabi_d2iz
00000000         *UND*	00000000 __aeabi_dmul
00000000         *UND*	00000000 __aeabi_dadd
00000000         *UND*	00000000 __aeabi_ddiv
00000000         *UND*	00000000 __aeabi_dsub
00000000         *UND*	00000000 __aeabi_dcmpgt
00000000 g     F .text.__divdc3	00000604 .hidden __divdc3
00000000         *UND*	00000000 fmax
00000000         *UND*	00000000 scalbn



Disassembly of section .text.__divdc3:

00000000 <__divdc3>:
__divdc3():
   0:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
   4:	b08d      	sub	sp, #52	; 0x34
   6:	9c19      	ldr	r4, [sp, #100]	; 0x64
   8:	9d18      	ldr	r5, [sp, #96]	; 0x60
   a:	e9dd ab1a 	ldrd	sl, fp, [sp, #104]	; 0x68
   e:	f024 4900 	bic.w	r9, r4, #2147483648	; 0x80000000
  12:	f02b 4700 	bic.w	r7, fp, #2147483648	; 0x80000000
  16:	e9cd 2302 	strd	r2, r3, [sp, #8]
  1a:	900a      	str	r0, [sp, #40]	; 0x28
  1c:	463b      	mov	r3, r7
  1e:	4652      	mov	r2, sl
  20:	4628      	mov	r0, r5
  22:	4649      	mov	r1, r9
  24:	f7ff fffe 	bl	0 <fmax>
  28:	4602      	mov	r2, r0
  2a:	460b      	mov	r3, r1
  2c:	e9cd 2300 	strd	r2, r3, [sp]
  30:	f240 73ff 	movw	r3, #2047	; 0x7ff
  34:	9a16      	ldr	r2, [sp, #88]	; 0x58
  36:	f3c1 580a 	ubfx	r8, r1, #20, #11
  3a:	9204      	str	r2, [sp, #16]
  3c:	9a17      	ldr	r2, [sp, #92]	; 0x5c
  3e:	4598      	cmp	r8, r3
  40:	4606      	mov	r6, r0
  42:	460f      	mov	r7, r1
  44:	9205      	str	r2, [sp, #20]
  46:	f000 8097 	beq.w	178 <__divdc3+0x178>
  4a:	2200      	movs	r2, #0
  4c:	2300      	movs	r3, #0
  4e:	f7ff fffe 	bl	0 <__aeabi_dcmpeq>
  52:	bb38      	cbnz	r0, a4 <__divdc3+0xa4>
  54:	f1b8 0f00 	cmp.w	r8, #0
  58:	f040 80ca 	bne.w	1f0 <__divdc3+0x1f0>
  5c:	2200      	movs	r2, #0
  5e:	f027 4300 	bic.w	r3, r7, #2147483648	; 0x80000000
  62:	4313      	orrs	r3, r2
  64:	bf08      	it	eq
  66:	fab6 f286 	clzeq	r2, r6
  6a:	f027 4100 	bic.w	r1, r7, #2147483648	; 0x80000000
  6e:	bf14      	ite	ne
  70:	fab1 f281 	clzne	r2, r1
  74:	3220      	addeq	r2, #32
  76:	f1a2 000b 	sub.w	r0, r2, #11
  7a:	3a2b      	subs	r2, #43	; 0x2b
  7c:	fa01 f300 	lsl.w	r3, r1, r0
  80:	fa06 f202 	lsl.w	r2, r6, r2
  84:	f1c0 0120 	rsb	r1, r0, #32
  88:	4313      	orrs	r3, r2
  8a:	fa26 f101 	lsr.w	r1, r6, r1
  8e:	430b      	orrs	r3, r1
  90:	f3c3 530a 	ubfx	r3, r3, #20, #11
  94:	f2a3 33ff 	subw	r3, r3, #1023	; 0x3ff
  98:	1a18      	subs	r0, r3, r0
  9a:	f7ff fffe 	bl	0 <__aeabi_i2d>
  9e:	e9cd 0100 	strd	r0, r1, [sp]
  a2:	e06f      	b.n	184 <__divdc3+0x184>
  a4:	2600      	movs	r6, #0
  a6:	2200      	movs	r2, #0
  a8:	4637      	mov	r7, r6
  aa:	4b71      	ldr	r3, [pc, #452]	; (270 <__divdc3+0x270>)
  ac:	e9cd 2300 	strd	r2, r3, [sp]
  b0:	4b70      	ldr	r3, [pc, #448]	; (274 <__divdc3+0x274>)
  b2:	930b      	str	r3, [sp, #44]	; 0x2c
  b4:	462a      	mov	r2, r5
  b6:	4623      	mov	r3, r4
  b8:	4628      	mov	r0, r5
  ba:	4621      	mov	r1, r4
  bc:	f7ff fffe 	bl	0 <__aeabi_dmul>
  c0:	4652      	mov	r2, sl
  c2:	4680      	mov	r8, r0
  c4:	4689      	mov	r9, r1
  c6:	465b      	mov	r3, fp
  c8:	4650      	mov	r0, sl
  ca:	4659      	mov	r1, fp
  cc:	f7ff fffe 	bl	0 <__aeabi_dmul>
  d0:	4602      	mov	r2, r0
  d2:	460b      	mov	r3, r1
  d4:	4640      	mov	r0, r8
  d6:	4649      	mov	r1, r9
  d8:	f7ff fffe 	bl	0 <__aeabi_dadd>
  dc:	9a02      	ldr	r2, [sp, #8]
  de:	e9cd 0106 	strd	r0, r1, [sp, #24]
  e2:	9b03      	ldr	r3, [sp, #12]
  e4:	4628      	mov	r0, r5
  e6:	4621      	mov	r1, r4
  e8:	f7ff fffe 	bl	0 <__aeabi_dmul>
  ec:	9a04      	ldr	r2, [sp, #16]
  ee:	4680      	mov	r8, r0
  f0:	4689      	mov	r9, r1
  f2:	9b05      	ldr	r3, [sp, #20]
  f4:	4650      	mov	r0, sl
  f6:	4659      	mov	r1, fp
  f8:	f7ff fffe 	bl	0 <__aeabi_dmul>
  fc:	4602      	mov	r2, r0
  fe:	460b      	mov	r3, r1
 100:	4640      	mov	r0, r8
 102:	4649      	mov	r1, r9
 104:	f7ff fffe 	bl	0 <__aeabi_dadd>
 108:	e9dd 2306 	ldrd	r2, r3, [sp, #24]
 10c:	f7ff fffe 	bl	0 <__aeabi_ddiv>
 110:	4632      	mov	r2, r6
 112:	f7ff fffe 	bl	0 <scalbn>
 116:	9a04      	ldr	r2, [sp, #16]
 118:	4680      	mov	r8, r0
 11a:	4689      	mov	r9, r1
 11c:	9b05      	ldr	r3, [sp, #20]
 11e:	4628      	mov	r0, r5
 120:	4621      	mov	r1, r4
 122:	f7ff fffe 	bl	0 <__aeabi_dmul>
 126:	9a02      	ldr	r2, [sp, #8]
 128:	e9cd 0108 	strd	r0, r1, [sp, #32]
 12c:	9b03      	ldr	r3, [sp, #12]
 12e:	4650      	mov	r0, sl
 130:	4659      	mov	r1, fp
 132:	f7ff fffe 	bl	0 <__aeabi_dmul>
 136:	4602      	mov	r2, r0
 138:	460b      	mov	r3, r1
 13a:	e9dd 0108 	ldrd	r0, r1, [sp, #32]
 13e:	f7ff fffe 	bl	0 <__aeabi_dsub>
 142:	e9dd 2306 	ldrd	r2, r3, [sp, #24]
 146:	f7ff fffe 	bl	0 <__aeabi_ddiv>
 14a:	4632      	mov	r2, r6
 14c:	f7ff fffe 	bl	0 <scalbn>
 150:	4642      	mov	r2, r8
 152:	e9cd 0108 	strd	r0, r1, [sp, #32]
 156:	464b      	mov	r3, r9
 158:	4640      	mov	r0, r8
 15a:	4649      	mov	r1, r9
 15c:	f7ff fffe 	bl	0 <__aeabi_dcmpun>
 160:	2800      	cmp	r0, #0
 162:	d157      	bne.n	214 <__divdc3+0x214>
 164:	e9dd 2308 	ldrd	r2, r3, [sp, #32]
 168:	980a      	ldr	r0, [sp, #40]	; 0x28
 16a:	e9c0 8900 	strd	r8, r9, [r0]
 16e:	e9c0 2302 	strd	r2, r3, [r0, #8]
 172:	b00d      	add	sp, #52	; 0x34
 174:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
 178:	460b      	mov	r3, r1
 17a:	2800      	cmp	r0, #0
 17c:	f173 0300 	sbcs.w	r3, r3, #0
 180:	4602      	mov	r2, r0
 182:	db3c      	blt.n	1fe <__divdc3+0x1fe>
 184:	e9dd 2300 	ldrd	r2, r3, [sp]
 188:	f023 4300 	bic.w	r3, r3, #2147483648	; 0x80000000
 18c:	4617      	mov	r7, r2
 18e:	4610      	mov	r0, r2
 190:	461e      	mov	r6, r3
 192:	930b      	str	r3, [sp, #44]	; 0x2c
 194:	4619      	mov	r1, r3
 196:	f04f 32ff 	mov.w	r2, #4294967295	; 0xffffffff
 19a:	4b37      	ldr	r3, [pc, #220]	; (e0 <__aeabi_dcmpun+0xe0>)
 19c:	f7ff fffe 	bl	0 <__aeabi_dcmpun>
 1a0:	b938      	cbnz	r0, 1b2 <__divdc3+0x1b2>
 1a2:	4638      	mov	r0, r7
 1a4:	4631      	mov	r1, r6
 1a6:	f04f 32ff 	mov.w	r2, #4294967295	; 0xffffffff
 1aa:	4b33      	ldr	r3, [pc, #204]	; (d0 <__aeabi_dcmple+0xd0>)
 1ac:	f7ff fffe 	bl	0 <__aeabi_dcmple>
 1b0:	b1e0      	cbz	r0, 1ec <__divdc3+0x1ec>
 1b2:	e9dd 8900 	ldrd	r8, r9, [sp]
 1b6:	4642      	mov	r2, r8
 1b8:	464b      	mov	r3, r9
 1ba:	4640      	mov	r0, r8
 1bc:	4649      	mov	r1, r9
 1be:	f7ff fffe 	bl	0 <__aeabi_dcmpun>
 1c2:	b998      	cbnz	r0, 1ec <__divdc3+0x1ec>
 1c4:	4649      	mov	r1, r9
 1c6:	4640      	mov	r0, r8
 1c8:	f7ff fffe 	bl	0 <__aeabi_d2iz>
 1cc:	4246      	negs	r6, r0
 1ce:	4632      	mov	r2, r6
 1d0:	4628      	mov	r0, r5
 1d2:	4621      	mov	r1, r4
 1d4:	f7ff fffe 	bl	0 <scalbn>
 1d8:	4632      	mov	r2, r6
 1da:	4605      	mov	r5, r0
 1dc:	460c      	mov	r4, r1
 1de:	4650      	mov	r0, sl
 1e0:	4659      	mov	r1, fp
 1e2:	f7ff fffe 	bl	0 <scalbn>
 1e6:	4682      	mov	sl, r0
 1e8:	468b      	mov	fp, r1
 1ea:	e763      	b.n	b4 <__divdc3+0xb4>
 1ec:	2600      	movs	r6, #0
 1ee:	e761      	b.n	b4 <__divdc3+0xb4>
 1f0:	f2a8 30ff 	subw	r0, r8, #1023	; 0x3ff
 1f4:	f7ff fffe 	bl	0 <__aeabi_i2d>
 1f8:	e9cd 0100 	strd	r0, r1, [sp]
 1fc:	e7c2      	b.n	184 <__divdc3+0x184>
 1fe:	460b      	mov	r3, r1
 200:	f7ff fffe 	bl	0 <__aeabi_dcmpeq>
 204:	2800      	cmp	r0, #0
 206:	d0bd      	beq.n	184 <__divdc3+0x184>
 208:	4632      	mov	r2, r6
 20a:	f107 4300 	add.w	r3, r7, #2147483648	; 0x80000000
 20e:	e9cd 2300 	strd	r2, r3, [sp]
 212:	e7b7      	b.n	184 <__divdc3+0x184>
 214:	e9dd 0108 	ldrd	r0, r1, [sp, #32]
 218:	4602      	mov	r2, r0
 21a:	460b      	mov	r3, r1
 21c:	f7ff fffe 	bl	0 <__aeabi_dcmpun>
 220:	2800      	cmp	r0, #0
 222:	d09f      	beq.n	164 <__divdc3+0x164>
 224:	e9dd 0106 	ldrd	r0, r1, [sp, #24]
 228:	2200      	movs	r2, #0
 22a:	2300      	movs	r3, #0
 22c:	f7ff fffe 	bl	0 <__aeabi_dcmpeq>
 230:	b370      	cbz	r0, 290 <__divdc3+0x290>
 232:	9e02      	ldr	r6, [sp, #8]
 234:	4632      	mov	r2, r6
 236:	4630      	mov	r0, r6
 238:	9e03      	ldr	r6, [sp, #12]
 23a:	4633      	mov	r3, r6
 23c:	4631      	mov	r1, r6
 23e:	f7ff fffe 	bl	0 <__aeabi_dcmpun>
 242:	b9d8      	cbnz	r0, 27c <__divdc3+0x27c>
 244:	2500      	movs	r5, #0
 246:	0fe6      	lsrs	r6, r4, #31
 248:	4c0a      	ldr	r4, [pc, #40]	; (274 <__divdc3+0x274>)
 24a:	9a02      	ldr	r2, [sp, #8]
 24c:	f366 74df 	bfi	r4, r6, #31, #1
 250:	9b03      	ldr	r3, [sp, #12]
 252:	4628      	mov	r0, r5
 254:	4621      	mov	r1, r4
 256:	f7ff fffe 	bl	0 <__aeabi_dmul>
 25a:	9a04      	ldr	r2, [sp, #16]
 25c:	4680      	mov	r8, r0
 25e:	4689      	mov	r9, r1
 260:	4628      	mov	r0, r5
 262:	4621      	mov	r1, r4
 264:	9b05      	ldr	r3, [sp, #20]
 266:	f7ff fffe 	bl	0 <__aeabi_dmul>
 26a:	e9cd 0108 	strd	r0, r1, [sp, #32]
 26e:	e779      	b.n	164 <__divdc3+0x164>
 270:	fff00000 	.word	0xfff00000
 274:	7ff00000 	.word	0x7ff00000
 278:	7fefffff 	.word	0x7fefffff
 27c:	9e04      	ldr	r6, [sp, #16]
 27e:	4632      	mov	r2, r6
 280:	4630      	mov	r0, r6
 282:	9e05      	ldr	r6, [sp, #20]
 284:	4633      	mov	r3, r6
 286:	4631      	mov	r1, r6
 288:	f7ff fffe 	bl	0 <__aeabi_dcmpun>
 28c:	2800      	cmp	r0, #0
 28e:	d0d9      	beq.n	244 <__divdc3+0x244>
 290:	e9dd 0302 	ldrd	r0, r3, [sp, #8]
 294:	f023 4300 	bic.w	r3, r3, #2147483648	; 0x80000000
 298:	461e      	mov	r6, r3
 29a:	9306      	str	r3, [sp, #24]
 29c:	4619      	mov	r1, r3
 29e:	f04f 32ff 	mov.w	r2, #4294967295	; 0xffffffff
 2a2:	4b68      	ldr	r3, [pc, #416]	; (1a4 <__aeabi_dcmpun+0x1a4>)
 2a4:	f7ff fffe 	bl	0 <__aeabi_dcmpun>
 2a8:	b938      	cbnz	r0, 2ba <__divdc3+0x2ba>
 2aa:	9802      	ldr	r0, [sp, #8]
 2ac:	4631      	mov	r1, r6
 2ae:	f04f 32ff 	mov.w	r2, #4294967295	; 0xffffffff
 2b2:	4b64      	ldr	r3, [pc, #400]	; (194 <__aeabi_dcmple+0x194>)
 2b4:	f7ff fffe 	bl	0 <__aeabi_dcmple>
 2b8:	b1b0      	cbz	r0, 2e8 <__divdc3+0x2e8>
 2ba:	e9dd 0304 	ldrd	r0, r3, [sp, #16]
 2be:	f023 4600 	bic.w	r6, r3, #2147483648	; 0x80000000
 2c2:	4631      	mov	r1, r6
 2c4:	f04f 32ff 	mov.w	r2, #4294967295	; 0xffffffff
 2c8:	4b5e      	ldr	r3, [pc, #376]	; (17c <__aeabi_dcmpun+0x17c>)
 2ca:	f7ff fffe 	bl	0 <__aeabi_dcmpun>
 2ce:	2800      	cmp	r0, #0
 2d0:	f040 80be 	bne.w	450 <__divdc3+0x450>
 2d4:	9804      	ldr	r0, [sp, #16]
 2d6:	4631      	mov	r1, r6
 2d8:	f04f 32ff 	mov.w	r2, #4294967295	; 0xffffffff
 2dc:	4b59      	ldr	r3, [pc, #356]	; (168 <__aeabi_dcmple+0x168>)
 2de:	f7ff fffe 	bl	0 <__aeabi_dcmple>
 2e2:	2800      	cmp	r0, #0
 2e4:	f040 80b4 	bne.w	450 <__divdc3+0x450>
 2e8:	f024 4600 	bic.w	r6, r4, #2147483648	; 0x80000000
 2ec:	4628      	mov	r0, r5
 2ee:	4631      	mov	r1, r6
 2f0:	f04f 32ff 	mov.w	r2, #4294967295	; 0xffffffff
 2f4:	4b53      	ldr	r3, [pc, #332]	; (150 <__aeabi_dcmpun+0x150>)
 2f6:	f7ff fffe 	bl	0 <__aeabi_dcmpun>
 2fa:	b948      	cbnz	r0, 310 <__divdc3+0x310>
 2fc:	4628      	mov	r0, r5
 2fe:	4631      	mov	r1, r6
 300:	f04f 32ff 	mov.w	r2, #4294967295	; 0xffffffff
 304:	4b4f      	ldr	r3, [pc, #316]	; (140 <__aeabi_dcmple+0x140>)
 306:	f7ff fffe 	bl	0 <__aeabi_dcmple>
 30a:	2800      	cmp	r0, #0
 30c:	f000 80a0 	beq.w	450 <__divdc3+0x450>
 310:	462a      	mov	r2, r5
 312:	4628      	mov	r0, r5
 314:	4623      	mov	r3, r4
 316:	4621      	mov	r1, r4
 318:	f7ff fffe 	bl	0 <__aeabi_dcmpun>
 31c:	2800      	cmp	r0, #0
 31e:	f040 8097 	bne.w	450 <__divdc3+0x450>
 322:	f02b 4600 	bic.w	r6, fp, #2147483648	; 0x80000000
 326:	4650      	mov	r0, sl
 328:	4631      	mov	r1, r6
 32a:	f04f 32ff 	mov.w	r2, #4294967295	; 0xffffffff
 32e:	4b45      	ldr	r3, [pc, #276]	; (118 <__aeabi_dcmpun+0x118>)
 330:	f7ff fffe 	bl	0 <__aeabi_dcmpun>
 334:	b948      	cbnz	r0, 34a <__divdc3+0x34a>
 336:	4650      	mov	r0, sl
 338:	4631      	mov	r1, r6
 33a:	f04f 32ff 	mov.w	r2, #4294967295	; 0xffffffff
 33e:	4b41      	ldr	r3, [pc, #260]	; (108 <__aeabi_dcmple+0x108>)
 340:	f7ff fffe 	bl	0 <__aeabi_dcmple>
 344:	2800      	cmp	r0, #0
 346:	f000 8083 	beq.w	450 <__divdc3+0x450>
 34a:	4652      	mov	r2, sl
 34c:	4650      	mov	r0, sl
 34e:	465b      	mov	r3, fp
 350:	4659      	mov	r1, fp
 352:	f7ff fffe 	bl	0 <__aeabi_dcmpun>
 356:	2800      	cmp	r0, #0
 358:	d17a      	bne.n	450 <__divdc3+0x450>
 35a:	9f02      	ldr	r7, [sp, #8]
 35c:	9e06      	ldr	r6, [sp, #24]
 35e:	4638      	mov	r0, r7
 360:	4631      	mov	r1, r6
 362:	f04f 32ff 	mov.w	r2, #4294967295	; 0xffffffff
 366:	4b37      	ldr	r3, [pc, #220]	; (e0 <__aeabi_dcmpun+0xe0>)
 368:	f7ff fffe 	bl	0 <__aeabi_dcmpun>
 36c:	b948      	cbnz	r0, 382 <__divdc3+0x382>
 36e:	4638      	mov	r0, r7
 370:	4631      	mov	r1, r6
 372:	f04f 32ff 	mov.w	r2, #4294967295	; 0xffffffff
 376:	4b33      	ldr	r3, [pc, #204]	; (d0 <__aeabi_dcmple+0xd0>)
 378:	f7ff fffe 	bl	0 <__aeabi_dcmple>
 37c:	2800      	cmp	r0, #0
 37e:	f000 8133 	beq.w	5e8 <__divdc3+0x5e8>
 382:	f04f 0900 	mov.w	r9, #0
 386:	464f      	mov	r7, r9
 388:	9b05      	ldr	r3, [sp, #20]
 38a:	f8dd 8010 	ldr.w	r8, [sp, #16]
 38e:	f023 4600 	bic.w	r6, r3, #2147483648	; 0x80000000
 392:	9b03      	ldr	r3, [sp, #12]
 394:	4640      	mov	r0, r8
 396:	ea4f 7cd3 	mov.w	ip, r3, lsr #31
 39a:	4631      	mov	r1, r6
 39c:	f04f 32ff 	mov.w	r2, #4294967295	; 0xffffffff
 3a0:	4b28      	ldr	r3, [pc, #160]	; (444 <__divdc3+0x444>)
 3a2:	f36c 77df 	bfi	r7, ip, #31, #1
 3a6:	f7ff fffe 	bl	0 <__aeabi_dcmpun>
 3aa:	2800      	cmp	r0, #0
 3ac:	f040 8118 	bne.w	5e0 <__divdc3+0x5e0>
 3b0:	4640      	mov	r0, r8
 3b2:	4631      	mov	r1, r6
 3b4:	f04f 32ff 	mov.w	r2, #4294967295	; 0xffffffff
 3b8:	4b22      	ldr	r3, [pc, #136]	; (8c <__aeabi_dcmple+0x8c>)
 3ba:	f7ff fffe 	bl	0 <__aeabi_dcmple>
 3be:	2800      	cmp	r0, #0
 3c0:	f040 810e 	bne.w	5e0 <__divdc3+0x5e0>
 3c4:	4680      	mov	r8, r0
 3c6:	4e20      	ldr	r6, [pc, #128]	; (448 <__divdc3+0x448>)
 3c8:	46b6      	mov	lr, r6
 3ca:	9e05      	ldr	r6, [sp, #20]
 3cc:	464a      	mov	r2, r9
 3ce:	ea4f 7cd6 	mov.w	ip, r6, lsr #31
 3d2:	4676      	mov	r6, lr
 3d4:	4628      	mov	r0, r5
 3d6:	463b      	mov	r3, r7
 3d8:	4621      	mov	r1, r4
 3da:	f36c 76df 	bfi	r6, ip, #31, #1
 3de:	f7ff fffe 	bl	0 <__aeabi_dmul>
 3e2:	4642      	mov	r2, r8
 3e4:	e9cd 0100 	strd	r0, r1, [sp]
 3e8:	4633      	mov	r3, r6
 3ea:	4650      	mov	r0, sl
 3ec:	4659      	mov	r1, fp
 3ee:	f7ff fffe 	bl	0 <__aeabi_dmul>
 3f2:	4602      	mov	r2, r0
 3f4:	460b      	mov	r3, r1
 3f6:	e9dd 0100 	ldrd	r0, r1, [sp]
 3fa:	f7ff fffe 	bl	0 <__aeabi_dadd>
 3fe:	2200      	movs	r2, #0
 400:	4b12      	ldr	r3, [pc, #72]	; (44c <__divdc3+0x44c>)
 402:	f7ff fffe 	bl	0 <__aeabi_dmul>
 406:	4642      	mov	r2, r8
 408:	e9cd 0100 	strd	r0, r1, [sp]
 40c:	4633      	mov	r3, r6
 40e:	4628      	mov	r0, r5
 410:	4621      	mov	r1, r4
 412:	f7ff fffe 	bl	0 <__aeabi_dmul>
 416:	464a      	mov	r2, r9
 418:	4604      	mov	r4, r0
 41a:	460d      	mov	r5, r1
 41c:	463b      	mov	r3, r7
 41e:	4650      	mov	r0, sl
 420:	4659      	mov	r1, fp
 422:	f7ff fffe 	bl	0 <__aeabi_dmul>
 426:	4602      	mov	r2, r0
 428:	460b      	mov	r3, r1
 42a:	4620      	mov	r0, r4
 42c:	4629      	mov	r1, r5
 42e:	f7ff fffe 	bl	0 <__aeabi_dsub>
 432:	2200      	movs	r2, #0
 434:	4b05      	ldr	r3, [pc, #20]	; (44c <__divdc3+0x44c>)
 436:	f7ff fffe 	bl	0 <__aeabi_dmul>
 43a:	e9dd 8900 	ldrd	r8, r9, [sp]
 43e:	e9cd 0108 	strd	r0, r1, [sp, #32]
 442:	e68f      	b.n	164 <__divdc3+0x164>
 444:	7fefffff 	.word	0x7fefffff
 448:	3ff00000 	.word	0x3ff00000
 44c:	7ff00000 	.word	0x7ff00000
 450:	9e0b      	ldr	r6, [sp, #44]	; 0x2c
 452:	4638      	mov	r0, r7
 454:	4631      	mov	r1, r6
 456:	f04f 32ff 	mov.w	r2, #4294967295	; 0xffffffff
 45a:	4b68      	ldr	r3, [pc, #416]	; (1a4 <__aeabi_dcmpun+0x1a4>)
 45c:	f7ff fffe 	bl	0 <__aeabi_dcmpun>
 460:	2800      	cmp	r0, #0
 462:	f47f ae7f 	bne.w	164 <__divdc3+0x164>
 466:	4638      	mov	r0, r7
 468:	4631      	mov	r1, r6
 46a:	f04f 32ff 	mov.w	r2, #4294967295	; 0xffffffff
 46e:	4b63      	ldr	r3, [pc, #396]	; (190 <__aeabi_dcmple+0x190>)
 470:	f7ff fffe 	bl	0 <__aeabi_dcmple>
 474:	2800      	cmp	r0, #0
 476:	f47f ae75 	bne.w	164 <__divdc3+0x164>
 47a:	e9dd 0100 	ldrd	r0, r1, [sp]
 47e:	2200      	movs	r2, #0
 480:	2300      	movs	r3, #0
 482:	f7ff fffe 	bl	0 <__aeabi_dcmpgt>
 486:	2800      	cmp	r0, #0
 488:	f43f ae6c 	beq.w	164 <__divdc3+0x164>
 48c:	9f02      	ldr	r7, [sp, #8]
 48e:	9e06      	ldr	r6, [sp, #24]
 490:	4638      	mov	r0, r7
 492:	4631      	mov	r1, r6
 494:	f04f 32ff 	mov.w	r2, #4294967295	; 0xffffffff
 498:	4b58      	ldr	r3, [pc, #352]	; (164 <__aeabi_dcmpun+0x164>)
 49a:	f7ff fffe 	bl	0 <__aeabi_dcmpun>
 49e:	b948      	cbnz	r0, 4b4 <__divdc3+0x4b4>
 4a0:	4638      	mov	r0, r7
 4a2:	4631      	mov	r1, r6
 4a4:	f04f 32ff 	mov.w	r2, #4294967295	; 0xffffffff
 4a8:	4b54      	ldr	r3, [pc, #336]	; (154 <__aeabi_dcmple+0x154>)
 4aa:	f7ff fffe 	bl	0 <__aeabi_dcmple>
 4ae:	2800      	cmp	r0, #0
 4b0:	f43f ae58 	beq.w	164 <__divdc3+0x164>
 4b4:	9e02      	ldr	r6, [sp, #8]
 4b6:	4632      	mov	r2, r6
 4b8:	4630      	mov	r0, r6
 4ba:	9e03      	ldr	r6, [sp, #12]
 4bc:	4633      	mov	r3, r6
 4be:	4631      	mov	r1, r6
 4c0:	f7ff fffe 	bl	0 <__aeabi_dcmpun>
 4c4:	2800      	cmp	r0, #0
 4c6:	f47f ae4d 	bne.w	164 <__divdc3+0x164>
 4ca:	9b05      	ldr	r3, [sp, #20]
 4cc:	9f04      	ldr	r7, [sp, #16]
 4ce:	f023 4600 	bic.w	r6, r3, #2147483648	; 0x80000000
 4d2:	4638      	mov	r0, r7
 4d4:	4631      	mov	r1, r6
 4d6:	f04f 32ff 	mov.w	r2, #4294967295	; 0xffffffff
 4da:	4b48      	ldr	r3, [pc, #288]	; (124 <__aeabi_dcmpun+0x124>)
 4dc:	f7ff fffe 	bl	0 <__aeabi_dcmpun>
 4e0:	b948      	cbnz	r0, 4f6 <__divdc3+0x4f6>
 4e2:	4638      	mov	r0, r7
 4e4:	4631      	mov	r1, r6
 4e6:	f04f 32ff 	mov.w	r2, #4294967295	; 0xffffffff
 4ea:	4b44      	ldr	r3, [pc, #272]	; (114 <__aeabi_dcmple+0x114>)
 4ec:	f7ff fffe 	bl	0 <__aeabi_dcmple>
 4f0:	2800      	cmp	r0, #0
 4f2:	f43f ae37 	beq.w	164 <__divdc3+0x164>
 4f6:	9e04      	ldr	r6, [sp, #16]
 4f8:	4632      	mov	r2, r6
 4fa:	4630      	mov	r0, r6
 4fc:	9e05      	ldr	r6, [sp, #20]
 4fe:	4633      	mov	r3, r6
 500:	4631      	mov	r1, r6
 502:	f7ff fffe 	bl	0 <__aeabi_dcmpun>
 506:	2800      	cmp	r0, #0
 508:	f47f ae2c 	bne.w	164 <__divdc3+0x164>
 50c:	f024 4600 	bic.w	r6, r4, #2147483648	; 0x80000000
 510:	4628      	mov	r0, r5
 512:	4631      	mov	r1, r6
 514:	f04f 32ff 	mov.w	r2, #4294967295	; 0xffffffff
 518:	4b38      	ldr	r3, [pc, #224]	; (e4 <__aeabi_dcmpun+0xe4>)
 51a:	f7ff fffe 	bl	0 <__aeabi_dcmpun>
 51e:	b940      	cbnz	r0, 532 <__divdc3+0x532>
 520:	4628      	mov	r0, r5
 522:	4631      	mov	r1, r6
 524:	f04f 32ff 	mov.w	r2, #4294967295	; 0xffffffff
 528:	4b34      	ldr	r3, [pc, #208]	; (d4 <__aeabi_dcmple+0xd4>)
 52a:	f7ff fffe 	bl	0 <__aeabi_dcmple>
 52e:	2800      	cmp	r0, #0
 530:	d060      	beq.n	5f4 <__divdc3+0x5f4>
 532:	f04f 0800 	mov.w	r8, #0
 536:	4647      	mov	r7, r8
 538:	f02b 4500 	bic.w	r5, fp, #2147483648	; 0x80000000
 53c:	0fe4      	lsrs	r4, r4, #31
 53e:	4650      	mov	r0, sl
 540:	4629      	mov	r1, r5
 542:	f04f 32ff 	mov.w	r2, #4294967295	; 0xffffffff
 546:	4b2d      	ldr	r3, [pc, #180]	; (5fc <__divdc3+0x5fc>)
 548:	f364 77df 	bfi	r7, r4, #31, #1
 54c:	f7ff fffe 	bl	0 <__aeabi_dcmpun>
 550:	b940      	cbnz	r0, 564 <__divdc3+0x564>
 552:	4650      	mov	r0, sl
 554:	4629      	mov	r1, r5
 556:	f04f 32ff 	mov.w	r2, #4294967295	; 0xffffffff
 55a:	4b28      	ldr	r3, [pc, #160]	; (a4 <__aeabi_dcmple+0xa4>)
 55c:	f7ff fffe 	bl	0 <__aeabi_dcmple>
 560:	2800      	cmp	r0, #0
 562:	d044      	beq.n	5ee <__divdc3+0x5ee>
 564:	f04f 0900 	mov.w	r9, #0
 568:	464e      	mov	r6, r9
 56a:	4642      	mov	r2, r8
 56c:	463b      	mov	r3, r7
 56e:	9802      	ldr	r0, [sp, #8]
 570:	9903      	ldr	r1, [sp, #12]
 572:	f7ff fffe 	bl	0 <__aeabi_dmul>
 576:	ea4f 7bdb 	mov.w	fp, fp, lsr #31
 57a:	f36b 76df 	bfi	r6, fp, #31, #1
 57e:	4604      	mov	r4, r0
 580:	460d      	mov	r5, r1
 582:	464a      	mov	r2, r9
 584:	4633      	mov	r3, r6
 586:	9804      	ldr	r0, [sp, #16]
 588:	9905      	ldr	r1, [sp, #20]
 58a:	f7ff fffe 	bl	0 <__aeabi_dmul>
 58e:	4602      	mov	r2, r0
 590:	460b      	mov	r3, r1
 592:	4620      	mov	r0, r4
 594:	4629      	mov	r1, r5
 596:	f7ff fffe 	bl	0 <__aeabi_dadd>
 59a:	2200      	movs	r2, #0
 59c:	2300      	movs	r3, #0
 59e:	f7ff fffe 	bl	0 <__aeabi_dmul>
 5a2:	4642      	mov	r2, r8
 5a4:	4682      	mov	sl, r0
 5a6:	468b      	mov	fp, r1
 5a8:	463b      	mov	r3, r7
 5aa:	9804      	ldr	r0, [sp, #16]
 5ac:	9905      	ldr	r1, [sp, #20]
 5ae:	f7ff fffe 	bl	0 <__aeabi_dmul>
 5b2:	464a      	mov	r2, r9
 5b4:	4604      	mov	r4, r0
 5b6:	460d      	mov	r5, r1
 5b8:	4633      	mov	r3, r6
 5ba:	9802      	ldr	r0, [sp, #8]
 5bc:	9903      	ldr	r1, [sp, #12]
 5be:	f7ff fffe 	bl	0 <__aeabi_dmul>
 5c2:	4602      	mov	r2, r0
 5c4:	460b      	mov	r3, r1
 5c6:	4620      	mov	r0, r4
 5c8:	4629      	mov	r1, r5
 5ca:	f7ff fffe 	bl	0 <__aeabi_dsub>
 5ce:	2200      	movs	r2, #0
 5d0:	2300      	movs	r3, #0
 5d2:	f7ff fffe 	bl	0 <__aeabi_dmul>
 5d6:	46d0      	mov	r8, sl
 5d8:	46d9      	mov	r9, fp
 5da:	e9cd 0108 	strd	r0, r1, [sp, #32]
 5de:	e5c1      	b.n	164 <__divdc3+0x164>
 5e0:	f04f 0800 	mov.w	r8, #0
 5e4:	4646      	mov	r6, r8
 5e6:	e6ef      	b.n	3c8 <__divdc3+0x3c8>
 5e8:	4681      	mov	r9, r0
 5ea:	4f05      	ldr	r7, [pc, #20]	; (600 <__divdc3+0x600>)
 5ec:	e6cc      	b.n	388 <__divdc3+0x388>
 5ee:	4681      	mov	r9, r0
 5f0:	4e03      	ldr	r6, [pc, #12]	; (600 <__divdc3+0x600>)
 5f2:	e7ba      	b.n	56a <__divdc3+0x56a>
 5f4:	4680      	mov	r8, r0
 5f6:	4f02      	ldr	r7, [pc, #8]	; (600 <__divdc3+0x600>)
 5f8:	e79e      	b.n	538 <__divdc3+0x538>
 5fa:	bf00      	nop
 5fc:	7fefffff 	.word	0x7fefffff
 600:	3ff00000 	.word	0x3ff00000

divmodsi4.o:     file format elf32-littlearm

SYMBOL TABLE:
00000000 l    d  .text	00000000 .text
00000000 l    d  .data	00000000 .data
00000000 l    d  .bss	00000000 .bss
00000000 l    d  .ARM.attributes	00000000 .ARM.attributes
00000000 g     F .text	00000018 .hidden __divmodsi4



Disassembly of section .text:

00000000 <__divmodsi4>:
__divmodsi4():
   0:	4209      	tst	r1, r1
   2:	d006      	beq.n	12 <__divmodsi4+0x12>
   4:	4603      	mov	r3, r0
   6:	fb93 f0f1 	sdiv	r0, r3, r1
   a:	fb00 3111 	mls	r1, r0, r1, r3
   e:	6011      	str	r1, [r2, #0]
  10:	4770      	bx	lr
  12:	f04f 0000 	mov.w	r0, #0
  16:	4770      	bx	lr

divsc3.o:     file format elf32-littlearm

SYMBOL TABLE:
00000000 l    df *ABS*	00000000 divsc3.c
00000000 l    d  .text	00000000 .text
00000000 l    d  .data	00000000 .data
00000000 l    d  .bss	00000000 .bss
00000000 l    d  .text.__divsc3	00000000 .text.__divsc3
00000000 l    d  .comment	00000000 .comment
00000000 l    d  .ARM.attributes	00000000 .ARM.attributes
00000000         *UND*	00000000 __aeabi_fcmpeq
00000000         *UND*	00000000 __aeabi_i2f
00000000         *UND*	00000000 __aeabi_fcmpun
00000000         *UND*	00000000 __aeabi_fcmple
00000000         *UND*	00000000 __aeabi_f2iz
00000000         *UND*	00000000 __aeabi_fmul
00000000         *UND*	00000000 __aeabi_fadd
00000000         *UND*	00000000 __aeabi_fdiv
00000000         *UND*	00000000 __aeabi_fsub
00000000         *UND*	00000000 __aeabi_fcmpgt
00000000 g     F .text.__divsc3	00000400 .hidden __divsc3
00000000         *UND*	00000000 fmaxf
00000000         *UND*	00000000 scalbnf



Disassembly of section .text.__divsc3:

00000000 <__divsc3>:
__divsc3():
   0:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
   4:	b085      	sub	sp, #20
   6:	9d0e      	ldr	r5, [sp, #56]	; 0x38
   8:	f023 4600 	bic.w	r6, r3, #2147483648	; 0x80000000
   c:	461c      	mov	r4, r3
   e:	f025 4300 	bic.w	r3, r5, #2147483648	; 0x80000000
  12:	4680      	mov	r8, r0
  14:	4689      	mov	r9, r1
  16:	4630      	mov	r0, r6
  18:	4619      	mov	r1, r3
  1a:	4692      	mov	sl, r2
  1c:	f7ff fffe 	bl	0 <fmaxf>
  20:	f3c0 5bc7 	ubfx	fp, r0, #23, #8
  24:	f1bb 0fff 	cmp.w	fp, #255	; 0xff
  28:	4606      	mov	r6, r0
  2a:	d063      	beq.n	f4 <__divsc3+0xf4>
  2c:	2100      	movs	r1, #0
  2e:	f7ff fffe 	bl	0 <__aeabi_fcmpeq>
  32:	b988      	cbnz	r0, 58 <__divsc3+0x58>
  34:	f1bb 0f00 	cmp.w	fp, #0
  38:	f040 8083 	bne.w	142 <__divsc3+0x142>
  3c:	f026 4600 	bic.w	r6, r6, #2147483648	; 0x80000000
  40:	fab6 f086 	clz	r0, r6
  44:	3808      	subs	r0, #8
  46:	4086      	lsls	r6, r0
  48:	f3c6 56c7 	ubfx	r6, r6, #23, #8
  4c:	3e7f      	subs	r6, #127	; 0x7f
  4e:	1a30      	subs	r0, r6, r0
  50:	f7ff fffe 	bl	0 <__aeabi_i2f>
  54:	4607      	mov	r7, r0
  56:	e050      	b.n	fa <__divsc3+0xfa>
  58:	f04f 43ff 	mov.w	r3, #2139095040	; 0x7f800000
  5c:	2600      	movs	r6, #0
  5e:	4f9e      	ldr	r7, [pc, #632]	; (2d8 <__divsc3+0x2d8>)
  60:	9303      	str	r3, [sp, #12]
  62:	4621      	mov	r1, r4
  64:	4620      	mov	r0, r4
  66:	f7ff fffe 	bl	0 <__aeabi_fmul>
  6a:	4629      	mov	r1, r5
  6c:	4683      	mov	fp, r0
  6e:	4628      	mov	r0, r5
  70:	f7ff fffe 	bl	0 <__aeabi_fmul>
  74:	4601      	mov	r1, r0
  76:	4658      	mov	r0, fp
  78:	f7ff fffe 	bl	0 <__aeabi_fadd>
  7c:	4649      	mov	r1, r9
  7e:	4683      	mov	fp, r0
  80:	4620      	mov	r0, r4
  82:	f7ff fffe 	bl	0 <__aeabi_fmul>
  86:	4651      	mov	r1, sl
  88:	9001      	str	r0, [sp, #4]
  8a:	4628      	mov	r0, r5
  8c:	f7ff fffe 	bl	0 <__aeabi_fmul>
  90:	9b01      	ldr	r3, [sp, #4]
  92:	4601      	mov	r1, r0
  94:	4618      	mov	r0, r3
  96:	f7ff fffe 	bl	0 <__aeabi_fadd>
  9a:	4659      	mov	r1, fp
  9c:	f7ff fffe 	bl	0 <__aeabi_fdiv>
  a0:	4631      	mov	r1, r6
  a2:	f7ff fffe 	bl	0 <scalbnf>
  a6:	4651      	mov	r1, sl
  a8:	9002      	str	r0, [sp, #8]
  aa:	4620      	mov	r0, r4
  ac:	f7ff fffe 	bl	0 <__aeabi_fmul>
  b0:	4649      	mov	r1, r9
  b2:	9001      	str	r0, [sp, #4]
  b4:	4628      	mov	r0, r5
  b6:	f7ff fffe 	bl	0 <__aeabi_fmul>
  ba:	9a01      	ldr	r2, [sp, #4]
  bc:	4601      	mov	r1, r0
  be:	4610      	mov	r0, r2
  c0:	f7ff fffe 	bl	0 <__aeabi_fsub>
  c4:	4659      	mov	r1, fp
  c6:	f7ff fffe 	bl	0 <__aeabi_fdiv>
  ca:	9b02      	ldr	r3, [sp, #8]
  cc:	4631      	mov	r1, r6
  ce:	461e      	mov	r6, r3
  d0:	f7ff fffe 	bl	0 <scalbnf>
  d4:	4631      	mov	r1, r6
  d6:	9001      	str	r0, [sp, #4]
  d8:	4630      	mov	r0, r6
  da:	f7ff fffe 	bl	0 <__aeabi_fcmpun>
  de:	2800      	cmp	r0, #0
  e0:	d13d      	bne.n	15e <__divsc3+0x15e>
  e2:	4640      	mov	r0, r8
  e4:	9b01      	ldr	r3, [sp, #4]
  e6:	f8c8 6000 	str.w	r6, [r8]
  ea:	f8c8 3004 	str.w	r3, [r8, #4]
  ee:	b005      	add	sp, #20
  f0:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
  f4:	2800      	cmp	r0, #0
  f6:	4607      	mov	r7, r0
  f8:	db29      	blt.n	14e <__divsc3+0x14e>
  fa:	f027 4300 	bic.w	r3, r7, #2147483648	; 0x80000000
  fe:	4618      	mov	r0, r3
 100:	4976      	ldr	r1, [pc, #472]	; (2dc <__divsc3+0x2dc>)
 102:	461e      	mov	r6, r3
 104:	9303      	str	r3, [sp, #12]
 106:	f7ff fffe 	bl	0 <__aeabi_fcmpun>
 10a:	b920      	cbnz	r0, 116 <__divsc3+0x116>
 10c:	4973      	ldr	r1, [pc, #460]	; (2dc <__divsc3+0x2dc>)
 10e:	4630      	mov	r0, r6
 110:	f7ff fffe 	bl	0 <__aeabi_fcmple>
 114:	b198      	cbz	r0, 13e <__divsc3+0x13e>
 116:	4639      	mov	r1, r7
 118:	4638      	mov	r0, r7
 11a:	f7ff fffe 	bl	0 <__aeabi_fcmpun>
 11e:	b970      	cbnz	r0, 13e <__divsc3+0x13e>
 120:	4638      	mov	r0, r7
 122:	f7ff fffe 	bl	0 <__aeabi_f2iz>
 126:	4246      	negs	r6, r0
 128:	4631      	mov	r1, r6
 12a:	4620      	mov	r0, r4
 12c:	f7ff fffe 	bl	0 <scalbnf>
 130:	4631      	mov	r1, r6
 132:	4604      	mov	r4, r0
 134:	4628      	mov	r0, r5
 136:	f7ff fffe 	bl	0 <scalbnf>
 13a:	4605      	mov	r5, r0
 13c:	e791      	b.n	62 <__divsc3+0x62>
 13e:	2600      	movs	r6, #0
 140:	e78f      	b.n	62 <__divsc3+0x62>
 142:	f1ab 007f 	sub.w	r0, fp, #127	; 0x7f
 146:	f7ff fffe 	bl	0 <__aeabi_i2f>
 14a:	4607      	mov	r7, r0
 14c:	e7d5      	b.n	fa <__divsc3+0xfa>
 14e:	4601      	mov	r1, r0
 150:	f7ff fffe 	bl	0 <__aeabi_fcmpeq>
 154:	2800      	cmp	r0, #0
 156:	d0d0      	beq.n	fa <__divsc3+0xfa>
 158:	f106 4700 	add.w	r7, r6, #2147483648	; 0x80000000
 15c:	e7cd      	b.n	fa <__divsc3+0xfa>
 15e:	9801      	ldr	r0, [sp, #4]
 160:	4601      	mov	r1, r0
 162:	f7ff fffe 	bl	0 <__aeabi_fcmpun>
 166:	2800      	cmp	r0, #0
 168:	d0bb      	beq.n	e2 <__divsc3+0xe2>
 16a:	4658      	mov	r0, fp
 16c:	2100      	movs	r1, #0
 16e:	f7ff fffe 	bl	0 <__aeabi_fcmpeq>
 172:	b1c8      	cbz	r0, 1a8 <__divsc3+0x1a8>
 174:	4649      	mov	r1, r9
 176:	4648      	mov	r0, r9
 178:	f7ff fffe 	bl	0 <__aeabi_fcmpun>
 17c:	b970      	cbnz	r0, 19c <__divsc3+0x19c>
 17e:	f04f 43ff 	mov.w	r3, #2139095040	; 0x7f800000
 182:	f363 041e 	bfi	r4, r3, #0, #31
 186:	4649      	mov	r1, r9
 188:	4620      	mov	r0, r4
 18a:	f7ff fffe 	bl	0 <__aeabi_fmul>
 18e:	4651      	mov	r1, sl
 190:	4606      	mov	r6, r0
 192:	4620      	mov	r0, r4
 194:	f7ff fffe 	bl	0 <__aeabi_fmul>
 198:	9001      	str	r0, [sp, #4]
 19a:	e7a2      	b.n	e2 <__divsc3+0xe2>
 19c:	4651      	mov	r1, sl
 19e:	4650      	mov	r0, sl
 1a0:	f7ff fffe 	bl	0 <__aeabi_fcmpun>
 1a4:	2800      	cmp	r0, #0
 1a6:	d0ea      	beq.n	17e <__divsc3+0x17e>
 1a8:	f029 4b00 	bic.w	fp, r9, #2147483648	; 0x80000000
 1ac:	4658      	mov	r0, fp
 1ae:	494b      	ldr	r1, [pc, #300]	; (2dc <__divsc3+0x2dc>)
 1b0:	f7ff fffe 	bl	0 <__aeabi_fcmpun>
 1b4:	b920      	cbnz	r0, 1c0 <__divsc3+0x1c0>
 1b6:	4949      	ldr	r1, [pc, #292]	; (2dc <__divsc3+0x2dc>)
 1b8:	4658      	mov	r0, fp
 1ba:	f7ff fffe 	bl	0 <__aeabi_fcmple>
 1be:	b180      	cbz	r0, 1e2 <__divsc3+0x1e2>
 1c0:	f02a 4300 	bic.w	r3, sl, #2147483648	; 0x80000000
 1c4:	4618      	mov	r0, r3
 1c6:	4945      	ldr	r1, [pc, #276]	; (2dc <__divsc3+0x2dc>)
 1c8:	9302      	str	r3, [sp, #8]
 1ca:	f7ff fffe 	bl	0 <__aeabi_fcmpun>
 1ce:	2800      	cmp	r0, #0
 1d0:	f040 8086 	bne.w	2e0 <__divsc3+0x2e0>
 1d4:	9b02      	ldr	r3, [sp, #8]
 1d6:	4941      	ldr	r1, [pc, #260]	; (2dc <__divsc3+0x2dc>)
 1d8:	4618      	mov	r0, r3
 1da:	f7ff fffe 	bl	0 <__aeabi_fcmple>
 1de:	2800      	cmp	r0, #0
 1e0:	d17e      	bne.n	2e0 <__divsc3+0x2e0>
 1e2:	f024 4300 	bic.w	r3, r4, #2147483648	; 0x80000000
 1e6:	4618      	mov	r0, r3
 1e8:	493c      	ldr	r1, [pc, #240]	; (2dc <__divsc3+0x2dc>)
 1ea:	9302      	str	r3, [sp, #8]
 1ec:	f7ff fffe 	bl	0 <__aeabi_fcmpun>
 1f0:	b930      	cbnz	r0, 200 <__divsc3+0x200>
 1f2:	9b02      	ldr	r3, [sp, #8]
 1f4:	4939      	ldr	r1, [pc, #228]	; (2dc <__divsc3+0x2dc>)
 1f6:	4618      	mov	r0, r3
 1f8:	f7ff fffe 	bl	0 <__aeabi_fcmple>
 1fc:	2800      	cmp	r0, #0
 1fe:	d06f      	beq.n	2e0 <__divsc3+0x2e0>
 200:	4621      	mov	r1, r4
 202:	4620      	mov	r0, r4
 204:	f7ff fffe 	bl	0 <__aeabi_fcmpun>
 208:	2800      	cmp	r0, #0
 20a:	d169      	bne.n	2e0 <__divsc3+0x2e0>
 20c:	f025 4300 	bic.w	r3, r5, #2147483648	; 0x80000000
 210:	4618      	mov	r0, r3
 212:	4932      	ldr	r1, [pc, #200]	; (2dc <__divsc3+0x2dc>)
 214:	9302      	str	r3, [sp, #8]
 216:	f7ff fffe 	bl	0 <__aeabi_fcmpun>
 21a:	b930      	cbnz	r0, 22a <__divsc3+0x22a>
 21c:	9b02      	ldr	r3, [sp, #8]
 21e:	492f      	ldr	r1, [pc, #188]	; (2dc <__divsc3+0x2dc>)
 220:	4618      	mov	r0, r3
 222:	f7ff fffe 	bl	0 <__aeabi_fcmple>
 226:	2800      	cmp	r0, #0
 228:	d05a      	beq.n	2e0 <__divsc3+0x2e0>
 22a:	4629      	mov	r1, r5
 22c:	4628      	mov	r0, r5
 22e:	f7ff fffe 	bl	0 <__aeabi_fcmpun>
 232:	2800      	cmp	r0, #0
 234:	d154      	bne.n	2e0 <__divsc3+0x2e0>
 236:	4929      	ldr	r1, [pc, #164]	; (2dc <__divsc3+0x2dc>)
 238:	4658      	mov	r0, fp
 23a:	f04f 0601 	mov.w	r6, #1
 23e:	f7ff fffe 	bl	0 <__aeabi_fcmpun>
 242:	b928      	cbnz	r0, 250 <__divsc3+0x250>
 244:	4658      	mov	r0, fp
 246:	4925      	ldr	r1, [pc, #148]	; (2dc <__divsc3+0x2dc>)
 248:	f7ff fffe 	bl	0 <__aeabi_fcmple>
 24c:	b900      	cbnz	r0, 250 <__divsc3+0x250>
 24e:	4606      	mov	r6, r0
 250:	f086 0001 	eor.w	r0, r6, #1
 254:	f000 0001 	and.w	r0, r0, #1
 258:	f7ff fffe 	bl	0 <__aeabi_i2f>
 25c:	f02a 4700 	bic.w	r7, sl, #2147483648	; 0x80000000
 260:	f360 091e 	bfi	r9, r0, #0, #31
 264:	491d      	ldr	r1, [pc, #116]	; (2dc <__divsc3+0x2dc>)
 266:	4638      	mov	r0, r7
 268:	f04f 0601 	mov.w	r6, #1
 26c:	f7ff fffe 	bl	0 <__aeabi_fcmpun>
 270:	b928      	cbnz	r0, 27e <__divsc3+0x27e>
 272:	4638      	mov	r0, r7
 274:	4919      	ldr	r1, [pc, #100]	; (2dc <__divsc3+0x2dc>)
 276:	f7ff fffe 	bl	0 <__aeabi_fcmple>
 27a:	b900      	cbnz	r0, 27e <__divsc3+0x27e>
 27c:	4606      	mov	r6, r0
 27e:	f086 0001 	eor.w	r0, r6, #1
 282:	f000 0001 	and.w	r0, r0, #1
 286:	f7ff fffe 	bl	0 <__aeabi_i2f>
 28a:	4649      	mov	r1, r9
 28c:	f360 0a1e 	bfi	sl, r0, #0, #31
 290:	4620      	mov	r0, r4
 292:	f7ff fffe 	bl	0 <__aeabi_fmul>
 296:	4651      	mov	r1, sl
 298:	4606      	mov	r6, r0
 29a:	4628      	mov	r0, r5
 29c:	f7ff fffe 	bl	0 <__aeabi_fmul>
 2a0:	4601      	mov	r1, r0
 2a2:	4630      	mov	r0, r6
 2a4:	f7ff fffe 	bl	0 <__aeabi_fadd>
 2a8:	f04f 41ff 	mov.w	r1, #2139095040	; 0x7f800000
 2ac:	f7ff fffe 	bl	0 <__aeabi_fmul>
 2b0:	4651      	mov	r1, sl
 2b2:	4606      	mov	r6, r0
 2b4:	4620      	mov	r0, r4
 2b6:	f7ff fffe 	bl	0 <__aeabi_fmul>
 2ba:	4649      	mov	r1, r9
 2bc:	4604      	mov	r4, r0
 2be:	4628      	mov	r0, r5
 2c0:	f7ff fffe 	bl	0 <__aeabi_fmul>
 2c4:	4601      	mov	r1, r0
 2c6:	4620      	mov	r0, r4
 2c8:	f7ff fffe 	bl	0 <__aeabi_fsub>
 2cc:	f04f 41ff 	mov.w	r1, #2139095040	; 0x7f800000
 2d0:	f7ff fffe 	bl	0 <__aeabi_fmul>
 2d4:	9001      	str	r0, [sp, #4]
 2d6:	e704      	b.n	e2 <__divsc3+0xe2>
 2d8:	ff800000 	.word	0xff800000
 2dc:	7f7fffff 	.word	0x7f7fffff
 2e0:	4946      	ldr	r1, [pc, #280]	; (3fc <__divsc3+0x3fc>)
 2e2:	9803      	ldr	r0, [sp, #12]
 2e4:	f7ff fffe 	bl	0 <__aeabi_fcmpun>
 2e8:	2800      	cmp	r0, #0
 2ea:	f47f aefa 	bne.w	e2 <__divsc3+0xe2>
 2ee:	9803      	ldr	r0, [sp, #12]
 2f0:	4942      	ldr	r1, [pc, #264]	; (3fc <__divsc3+0x3fc>)
 2f2:	f7ff fffe 	bl	0 <__aeabi_fcmple>
 2f6:	2800      	cmp	r0, #0
 2f8:	f47f aef3 	bne.w	e2 <__divsc3+0xe2>
 2fc:	4638      	mov	r0, r7
 2fe:	2100      	movs	r1, #0
 300:	f7ff fffe 	bl	0 <__aeabi_fcmpgt>
 304:	2800      	cmp	r0, #0
 306:	f43f aeec 	beq.w	e2 <__divsc3+0xe2>
 30a:	493c      	ldr	r1, [pc, #240]	; (3fc <__divsc3+0x3fc>)
 30c:	4658      	mov	r0, fp
 30e:	f7ff fffe 	bl	0 <__aeabi_fcmpun>
 312:	b930      	cbnz	r0, 322 <__divsc3+0x322>
 314:	4658      	mov	r0, fp
 316:	4939      	ldr	r1, [pc, #228]	; (3fc <__divsc3+0x3fc>)
 318:	f7ff fffe 	bl	0 <__aeabi_fcmple>
 31c:	2800      	cmp	r0, #0
 31e:	f43f aee0 	beq.w	e2 <__divsc3+0xe2>
 322:	4649      	mov	r1, r9
 324:	4648      	mov	r0, r9
 326:	f7ff fffe 	bl	0 <__aeabi_fcmpun>
 32a:	2800      	cmp	r0, #0
 32c:	f47f aed9 	bne.w	e2 <__divsc3+0xe2>
 330:	f02a 4700 	bic.w	r7, sl, #2147483648	; 0x80000000
 334:	4638      	mov	r0, r7
 336:	4931      	ldr	r1, [pc, #196]	; (3fc <__divsc3+0x3fc>)
 338:	f7ff fffe 	bl	0 <__aeabi_fcmpun>
 33c:	b930      	cbnz	r0, 34c <__divsc3+0x34c>
 33e:	4638      	mov	r0, r7
 340:	492e      	ldr	r1, [pc, #184]	; (3fc <__divsc3+0x3fc>)
 342:	f7ff fffe 	bl	0 <__aeabi_fcmple>
 346:	2800      	cmp	r0, #0
 348:	f43f aecb 	beq.w	e2 <__divsc3+0xe2>
 34c:	4651      	mov	r1, sl
 34e:	4650      	mov	r0, sl
 350:	f7ff fffe 	bl	0 <__aeabi_fcmpun>
 354:	2800      	cmp	r0, #0
 356:	f47f aec4 	bne.w	e2 <__divsc3+0xe2>
 35a:	f024 4700 	bic.w	r7, r4, #2147483648	; 0x80000000
 35e:	4638      	mov	r0, r7
 360:	4926      	ldr	r1, [pc, #152]	; (3fc <__divsc3+0x3fc>)
 362:	f04f 0601 	mov.w	r6, #1
 366:	f7ff fffe 	bl	0 <__aeabi_fcmpun>
 36a:	b928      	cbnz	r0, 378 <__divsc3+0x378>
 36c:	4638      	mov	r0, r7
 36e:	4923      	ldr	r1, [pc, #140]	; (3fc <__divsc3+0x3fc>)
 370:	f7ff fffe 	bl	0 <__aeabi_fcmple>
 374:	b900      	cbnz	r0, 378 <__divsc3+0x378>
 376:	4606      	mov	r6, r0
 378:	f086 0001 	eor.w	r0, r6, #1
 37c:	f000 0001 	and.w	r0, r0, #1
 380:	f7ff fffe 	bl	0 <__aeabi_i2f>
 384:	f025 4700 	bic.w	r7, r5, #2147483648	; 0x80000000
 388:	f360 041e 	bfi	r4, r0, #0, #31
 38c:	491b      	ldr	r1, [pc, #108]	; (3fc <__divsc3+0x3fc>)
 38e:	4638      	mov	r0, r7
 390:	f04f 0601 	mov.w	r6, #1
 394:	f7ff fffe 	bl	0 <__aeabi_fcmpun>
 398:	b928      	cbnz	r0, 3a6 <__divsc3+0x3a6>
 39a:	4638      	mov	r0, r7
 39c:	4917      	ldr	r1, [pc, #92]	; (3fc <__divsc3+0x3fc>)
 39e:	f7ff fffe 	bl	0 <__aeabi_fcmple>
 3a2:	b900      	cbnz	r0, 3a6 <__divsc3+0x3a6>
 3a4:	4606      	mov	r6, r0
 3a6:	f086 0001 	eor.w	r0, r6, #1
 3aa:	f000 0001 	and.w	r0, r0, #1
 3ae:	f7ff fffe 	bl	0 <__aeabi_i2f>
 3b2:	4621      	mov	r1, r4
 3b4:	f360 051e 	bfi	r5, r0, #0, #31
 3b8:	4648      	mov	r0, r9
 3ba:	f7ff fffe 	bl	0 <__aeabi_fmul>
 3be:	4629      	mov	r1, r5
 3c0:	4606      	mov	r6, r0
 3c2:	4650      	mov	r0, sl
 3c4:	f7ff fffe 	bl	0 <__aeabi_fmul>
 3c8:	4601      	mov	r1, r0
 3ca:	4630      	mov	r0, r6
 3cc:	f7ff fffe 	bl	0 <__aeabi_fadd>
 3d0:	2100      	movs	r1, #0
 3d2:	f7ff fffe 	bl	0 <__aeabi_fmul>
 3d6:	4621      	mov	r1, r4
 3d8:	4606      	mov	r6, r0
 3da:	4650      	mov	r0, sl
 3dc:	f7ff fffe 	bl	0 <__aeabi_fmul>
 3e0:	4629      	mov	r1, r5
 3e2:	4604      	mov	r4, r0
 3e4:	4648      	mov	r0, r9
 3e6:	f7ff fffe 	bl	0 <__aeabi_fmul>
 3ea:	4601      	mov	r1, r0
 3ec:	4620      	mov	r0, r4
 3ee:	f7ff fffe 	bl	0 <__aeabi_fsub>
 3f2:	2100      	movs	r1, #0
 3f4:	f7ff fffe 	bl	0 <__aeabi_fmul>
 3f8:	9001      	str	r0, [sp, #4]
 3fa:	e672      	b.n	e2 <__divsc3+0xe2>
 3fc:	7f7fffff 	.word	0x7f7fffff

divxc3.o:     file format elf32-littlearm

SYMBOL TABLE:
00000000 l    df *ABS*	00000000 divxc3.c
00000000 l    d  .text	00000000 .text
00000000 l    d  .data	00000000 .data
00000000 l    d  .bss	00000000 .bss
00000000 l    d  .text.__divxc3	00000000 .text.__divxc3
00000000 l    d  .comment	00000000 .comment
00000000 l    d  .ARM.attributes	00000000 .ARM.attributes
00000000         *UND*	00000000 __aeabi_dcmpun
00000000         *UND*	00000000 __aeabi_dcmple
00000000         *UND*	00000000 __aeabi_d2iz
00000000         *UND*	00000000 __aeabi_dmul
00000000         *UND*	00000000 __aeabi_dadd
00000000         *UND*	00000000 __aeabi_ddiv
00000000         *UND*	00000000 __aeabi_dsub
00000000         *UND*	00000000 __aeabi_dcmpeq
00000000         *UND*	00000000 __aeabi_i2d
00000000         *UND*	00000000 __aeabi_dcmpgt
00000000 g     F .text.__divxc3	0000055c .hidden __divxc3
00000000         *UND*	00000000 fmaxl
00000000         *UND*	00000000 logbl
00000000         *UND*	00000000 scalbnl



Disassembly of section .text.__divxc3:

00000000 <__divxc3>:
__divxc3():
   0:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
   4:	b08f      	sub	sp, #60	; 0x3c
   6:	9c1b      	ldr	r4, [sp, #108]	; 0x6c
   8:	9d1a      	ldr	r5, [sp, #104]	; 0x68
   a:	e9dd ab1c 	ldrd	sl, fp, [sp, #112]	; 0x70
   e:	f024 4900 	bic.w	r9, r4, #2147483648	; 0x80000000
  12:	f02b 4700 	bic.w	r7, fp, #2147483648	; 0x80000000
  16:	e9cd 2301 	strd	r2, r3, [sp, #4]
  1a:	900b      	str	r0, [sp, #44]	; 0x2c
  1c:	4652      	mov	r2, sl
  1e:	463b      	mov	r3, r7
  20:	4628      	mov	r0, r5
  22:	4649      	mov	r1, r9
  24:	f7ff fffe 	bl	0 <fmaxl>
  28:	9b18      	ldr	r3, [sp, #96]	; 0x60
  2a:	9304      	str	r3, [sp, #16]
  2c:	9b19      	ldr	r3, [sp, #100]	; 0x64
  2e:	930a      	str	r3, [sp, #40]	; 0x28
  30:	f7ff fffe 	bl	0 <logbl>
  34:	f021 4300 	bic.w	r3, r1, #2147483648	; 0x80000000
  38:	910c      	str	r1, [sp, #48]	; 0x30
  3a:	461e      	mov	r6, r3
  3c:	930d      	str	r3, [sp, #52]	; 0x34
  3e:	4619      	mov	r1, r3
  40:	f04f 32ff 	mov.w	r2, #4294967295	; 0xffffffff
  44:	4b5d      	ldr	r3, [pc, #372]	; (1bc <__divxc3+0x1bc>)
  46:	4607      	mov	r7, r0
  48:	f7ff fffe 	bl	0 <__aeabi_dcmpun>
  4c:	2800      	cmp	r0, #0
  4e:	d16a      	bne.n	126 <__divxc3+0x126>
  50:	4638      	mov	r0, r7
  52:	4631      	mov	r1, r6
  54:	f04f 32ff 	mov.w	r2, #4294967295	; 0xffffffff
  58:	4b58      	ldr	r3, [pc, #352]	; (164 <__aeabi_dcmple+0x164>)
  5a:	f7ff fffe 	bl	0 <__aeabi_dcmple>
  5e:	2800      	cmp	r0, #0
  60:	d161      	bne.n	126 <__divxc3+0x126>
  62:	2600      	movs	r6, #0
  64:	462a      	mov	r2, r5
  66:	4623      	mov	r3, r4
  68:	4628      	mov	r0, r5
  6a:	4621      	mov	r1, r4
  6c:	f7ff fffe 	bl	0 <__aeabi_dmul>
  70:	4652      	mov	r2, sl
  72:	4680      	mov	r8, r0
  74:	4689      	mov	r9, r1
  76:	465b      	mov	r3, fp
  78:	4650      	mov	r0, sl
  7a:	4659      	mov	r1, fp
  7c:	f7ff fffe 	bl	0 <__aeabi_dmul>
  80:	4602      	mov	r2, r0
  82:	460b      	mov	r3, r1
  84:	4640      	mov	r0, r8
  86:	4649      	mov	r1, r9
  88:	f7ff fffe 	bl	0 <__aeabi_dadd>
  8c:	9a01      	ldr	r2, [sp, #4]
  8e:	e9cd 0106 	strd	r0, r1, [sp, #24]
  92:	9b02      	ldr	r3, [sp, #8]
  94:	4628      	mov	r0, r5
  96:	4621      	mov	r1, r4
  98:	f7ff fffe 	bl	0 <__aeabi_dmul>
  9c:	9a04      	ldr	r2, [sp, #16]
  9e:	4680      	mov	r8, r0
  a0:	4689      	mov	r9, r1
  a2:	9b0a      	ldr	r3, [sp, #40]	; 0x28
  a4:	4650      	mov	r0, sl
  a6:	4659      	mov	r1, fp
  a8:	f7ff fffe 	bl	0 <__aeabi_dmul>
  ac:	4602      	mov	r2, r0
  ae:	460b      	mov	r3, r1
  b0:	4640      	mov	r0, r8
  b2:	4649      	mov	r1, r9
  b4:	f7ff fffe 	bl	0 <__aeabi_dadd>
  b8:	e9dd 2306 	ldrd	r2, r3, [sp, #24]
  bc:	f7ff fffe 	bl	0 <__aeabi_ddiv>
  c0:	4632      	mov	r2, r6
  c2:	f7ff fffe 	bl	0 <scalbnl>
  c6:	9a04      	ldr	r2, [sp, #16]
  c8:	4680      	mov	r8, r0
  ca:	4689      	mov	r9, r1
  cc:	9b0a      	ldr	r3, [sp, #40]	; 0x28
  ce:	4628      	mov	r0, r5
  d0:	4621      	mov	r1, r4
  d2:	f7ff fffe 	bl	0 <__aeabi_dmul>
  d6:	9a01      	ldr	r2, [sp, #4]
  d8:	e9cd 0108 	strd	r0, r1, [sp, #32]
  dc:	9b02      	ldr	r3, [sp, #8]
  de:	4650      	mov	r0, sl
  e0:	4659      	mov	r1, fp
  e2:	f7ff fffe 	bl	0 <__aeabi_dmul>
  e6:	4602      	mov	r2, r0
  e8:	460b      	mov	r3, r1
  ea:	e9dd 0108 	ldrd	r0, r1, [sp, #32]
  ee:	f7ff fffe 	bl	0 <__aeabi_dsub>
  f2:	e9dd 2306 	ldrd	r2, r3, [sp, #24]
  f6:	f7ff fffe 	bl	0 <__aeabi_ddiv>
  fa:	4632      	mov	r2, r6
  fc:	f7ff fffe 	bl	0 <scalbnl>
 100:	4642      	mov	r2, r8
 102:	e9cd 0108 	strd	r0, r1, [sp, #32]
 106:	464b      	mov	r3, r9
 108:	4640      	mov	r0, r8
 10a:	4649      	mov	r1, r9
 10c:	f7ff fffe 	bl	0 <__aeabi_dcmpun>
 110:	bb30      	cbnz	r0, 160 <__divxc3+0x160>
 112:	e9dd 2308 	ldrd	r2, r3, [sp, #32]
 116:	980b      	ldr	r0, [sp, #44]	; 0x2c
 118:	e9c0 8900 	strd	r8, r9, [r0]
 11c:	e9c0 2302 	strd	r2, r3, [r0, #8]
 120:	b00f      	add	sp, #60	; 0x3c
 122:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
 126:	9e0c      	ldr	r6, [sp, #48]	; 0x30
 128:	463a      	mov	r2, r7
 12a:	4638      	mov	r0, r7
 12c:	4633      	mov	r3, r6
 12e:	4631      	mov	r1, r6
 130:	f7ff fffe 	bl	0 <__aeabi_dcmpun>
 134:	2800      	cmp	r0, #0
 136:	d194      	bne.n	62 <__divxc3+0x62>
 138:	4631      	mov	r1, r6
 13a:	4638      	mov	r0, r7
 13c:	f7ff fffe 	bl	0 <__aeabi_d2iz>
 140:	4246      	negs	r6, r0
 142:	4632      	mov	r2, r6
 144:	4628      	mov	r0, r5
 146:	4621      	mov	r1, r4
 148:	f7ff fffe 	bl	0 <scalbnl>
 14c:	4632      	mov	r2, r6
 14e:	4605      	mov	r5, r0
 150:	460c      	mov	r4, r1
 152:	4650      	mov	r0, sl
 154:	4659      	mov	r1, fp
 156:	f7ff fffe 	bl	0 <scalbnl>
 15a:	4682      	mov	sl, r0
 15c:	468b      	mov	fp, r1
 15e:	e781      	b.n	64 <__divxc3+0x64>
 160:	e9dd 0108 	ldrd	r0, r1, [sp, #32]
 164:	4602      	mov	r2, r0
 166:	460b      	mov	r3, r1
 168:	f7ff fffe 	bl	0 <__aeabi_dcmpun>
 16c:	2800      	cmp	r0, #0
 16e:	d0d0      	beq.n	112 <__divxc3+0x112>
 170:	e9dd 0106 	ldrd	r0, r1, [sp, #24]
 174:	2200      	movs	r2, #0
 176:	2300      	movs	r3, #0
 178:	f7ff fffe 	bl	0 <__aeabi_dcmpeq>
 17c:	b360      	cbz	r0, 1d8 <__divxc3+0x1d8>
 17e:	9e01      	ldr	r6, [sp, #4]
 180:	4632      	mov	r2, r6
 182:	4630      	mov	r0, r6
 184:	9e02      	ldr	r6, [sp, #8]
 186:	4633      	mov	r3, r6
 188:	4631      	mov	r1, r6
 18a:	f7ff fffe 	bl	0 <__aeabi_dcmpun>
 18e:	b9c8      	cbnz	r0, 1c4 <__divxc3+0x1c4>
 190:	2500      	movs	r5, #0
 192:	0fe6      	lsrs	r6, r4, #31
 194:	4c0a      	ldr	r4, [pc, #40]	; (1c0 <__divxc3+0x1c0>)
 196:	9a01      	ldr	r2, [sp, #4]
 198:	f366 74df 	bfi	r4, r6, #31, #1
 19c:	9b02      	ldr	r3, [sp, #8]
 19e:	4628      	mov	r0, r5
 1a0:	4621      	mov	r1, r4
 1a2:	f7ff fffe 	bl	0 <__aeabi_dmul>
 1a6:	9a04      	ldr	r2, [sp, #16]
 1a8:	4680      	mov	r8, r0
 1aa:	4689      	mov	r9, r1
 1ac:	4628      	mov	r0, r5
 1ae:	4621      	mov	r1, r4
 1b0:	9b0a      	ldr	r3, [sp, #40]	; 0x28
 1b2:	f7ff fffe 	bl	0 <__aeabi_dmul>
 1b6:	e9cd 0108 	strd	r0, r1, [sp, #32]
 1ba:	e7aa      	b.n	112 <__divxc3+0x112>
 1bc:	7fefffff 	.word	0x7fefffff
 1c0:	7ff00000 	.word	0x7ff00000
 1c4:	9e04      	ldr	r6, [sp, #16]
 1c6:	4632      	mov	r2, r6
 1c8:	4630      	mov	r0, r6
 1ca:	9e0a      	ldr	r6, [sp, #40]	; 0x28
 1cc:	4633      	mov	r3, r6
 1ce:	4631      	mov	r1, r6
 1d0:	f7ff fffe 	bl	0 <__aeabi_dcmpun>
 1d4:	2800      	cmp	r0, #0
 1d6:	d0db      	beq.n	190 <__divxc3+0x190>
 1d8:	e9dd 0301 	ldrd	r0, r3, [sp, #4]
 1dc:	f023 4300 	bic.w	r3, r3, #2147483648	; 0x80000000
 1e0:	461e      	mov	r6, r3
 1e2:	9306      	str	r3, [sp, #24]
 1e4:	4619      	mov	r1, r3
 1e6:	f04f 32ff 	mov.w	r2, #4294967295	; 0xffffffff
 1ea:	4b6c      	ldr	r3, [pc, #432]	; (1b4 <__aeabi_dcmpun+0x1b4>)
 1ec:	f7ff fffe 	bl	0 <__aeabi_dcmpun>
 1f0:	b938      	cbnz	r0, 202 <__divxc3+0x202>
 1f2:	9801      	ldr	r0, [sp, #4]
 1f4:	4631      	mov	r1, r6
 1f6:	f04f 32ff 	mov.w	r2, #4294967295	; 0xffffffff
 1fa:	4b68      	ldr	r3, [pc, #416]	; (1a4 <__aeabi_dcmple+0x1a4>)
 1fc:	f7ff fffe 	bl	0 <__aeabi_dcmple>
 200:	b1b0      	cbz	r0, 230 <__divxc3+0x230>
 202:	9b0a      	ldr	r3, [sp, #40]	; 0x28
 204:	9804      	ldr	r0, [sp, #16]
 206:	f023 4600 	bic.w	r6, r3, #2147483648	; 0x80000000
 20a:	4631      	mov	r1, r6
 20c:	f04f 32ff 	mov.w	r2, #4294967295	; 0xffffffff
 210:	4b62      	ldr	r3, [pc, #392]	; (18c <__aeabi_dcmpun+0x18c>)
 212:	f7ff fffe 	bl	0 <__aeabi_dcmpun>
 216:	2800      	cmp	r0, #0
 218:	f040 80c4 	bne.w	3a4 <__divxc3+0x3a4>
 21c:	9804      	ldr	r0, [sp, #16]
 21e:	4631      	mov	r1, r6
 220:	f04f 32ff 	mov.w	r2, #4294967295	; 0xffffffff
 224:	4b5d      	ldr	r3, [pc, #372]	; (178 <__aeabi_dcmple+0x178>)
 226:	f7ff fffe 	bl	0 <__aeabi_dcmple>
 22a:	2800      	cmp	r0, #0
 22c:	f040 80ba 	bne.w	3a4 <__divxc3+0x3a4>
 230:	f024 4600 	bic.w	r6, r4, #2147483648	; 0x80000000
 234:	4628      	mov	r0, r5
 236:	4631      	mov	r1, r6
 238:	f04f 32ff 	mov.w	r2, #4294967295	; 0xffffffff
 23c:	4b57      	ldr	r3, [pc, #348]	; (160 <__aeabi_dcmpun+0x160>)
 23e:	f7ff fffe 	bl	0 <__aeabi_dcmpun>
 242:	b948      	cbnz	r0, 258 <__divxc3+0x258>
 244:	4628      	mov	r0, r5
 246:	4631      	mov	r1, r6
 248:	f04f 32ff 	mov.w	r2, #4294967295	; 0xffffffff
 24c:	4b53      	ldr	r3, [pc, #332]	; (150 <__aeabi_dcmple+0x150>)
 24e:	f7ff fffe 	bl	0 <__aeabi_dcmple>
 252:	2800      	cmp	r0, #0
 254:	f000 80a6 	beq.w	3a4 <__divxc3+0x3a4>
 258:	462a      	mov	r2, r5
 25a:	4628      	mov	r0, r5
 25c:	4623      	mov	r3, r4
 25e:	4621      	mov	r1, r4
 260:	f7ff fffe 	bl	0 <__aeabi_dcmpun>
 264:	2800      	cmp	r0, #0
 266:	f040 809d 	bne.w	3a4 <__divxc3+0x3a4>
 26a:	f02b 4600 	bic.w	r6, fp, #2147483648	; 0x80000000
 26e:	4650      	mov	r0, sl
 270:	4631      	mov	r1, r6
 272:	f04f 32ff 	mov.w	r2, #4294967295	; 0xffffffff
 276:	4b49      	ldr	r3, [pc, #292]	; (128 <__aeabi_dcmpun+0x128>)
 278:	f7ff fffe 	bl	0 <__aeabi_dcmpun>
 27c:	b948      	cbnz	r0, 292 <__divxc3+0x292>
 27e:	4650      	mov	r0, sl
 280:	4631      	mov	r1, r6
 282:	f04f 32ff 	mov.w	r2, #4294967295	; 0xffffffff
 286:	4b45      	ldr	r3, [pc, #276]	; (118 <__aeabi_dcmple+0x118>)
 288:	f7ff fffe 	bl	0 <__aeabi_dcmple>
 28c:	2800      	cmp	r0, #0
 28e:	f000 8089 	beq.w	3a4 <__divxc3+0x3a4>
 292:	4652      	mov	r2, sl
 294:	4650      	mov	r0, sl
 296:	465b      	mov	r3, fp
 298:	4659      	mov	r1, fp
 29a:	f7ff fffe 	bl	0 <__aeabi_dcmpun>
 29e:	2800      	cmp	r0, #0
 2a0:	f040 8080 	bne.w	3a4 <__divxc3+0x3a4>
 2a4:	f8dd 8004 	ldr.w	r8, [sp, #4]
 2a8:	9f06      	ldr	r7, [sp, #24]
 2aa:	4640      	mov	r0, r8
 2ac:	4639      	mov	r1, r7
 2ae:	f04f 32ff 	mov.w	r2, #4294967295	; 0xffffffff
 2b2:	4b3a      	ldr	r3, [pc, #232]	; (39c <__divxc3+0x39c>)
 2b4:	f04f 0601 	mov.w	r6, #1
 2b8:	f7ff fffe 	bl	0 <__aeabi_dcmpun>
 2bc:	b940      	cbnz	r0, 2d0 <__divxc3+0x2d0>
 2be:	4640      	mov	r0, r8
 2c0:	4639      	mov	r1, r7
 2c2:	f04f 32ff 	mov.w	r2, #4294967295	; 0xffffffff
 2c6:	4b35      	ldr	r3, [pc, #212]	; (d8 <__aeabi_dcmple+0xd8>)
 2c8:	f7ff fffe 	bl	0 <__aeabi_dcmple>
 2cc:	b900      	cbnz	r0, 2d0 <__divxc3+0x2d0>
 2ce:	4606      	mov	r6, r0
 2d0:	f086 0001 	eor.w	r0, r6, #1
 2d4:	f000 0001 	and.w	r0, r0, #1
 2d8:	f7ff fffe 	bl	0 <__aeabi_i2d>
 2dc:	4688      	mov	r8, r1
 2de:	9b0a      	ldr	r3, [sp, #40]	; 0x28
 2e0:	4681      	mov	r9, r0
 2e2:	f023 4700 	bic.w	r7, r3, #2147483648	; 0x80000000
 2e6:	9b02      	ldr	r3, [sp, #8]
 2e8:	9804      	ldr	r0, [sp, #16]
 2ea:	0fde      	lsrs	r6, r3, #31
 2ec:	4639      	mov	r1, r7
 2ee:	f04f 32ff 	mov.w	r2, #4294967295	; 0xffffffff
 2f2:	4b2a      	ldr	r3, [pc, #168]	; (39c <__divxc3+0x39c>)
 2f4:	f366 78df 	bfi	r8, r6, #31, #1
 2f8:	f04f 0601 	mov.w	r6, #1
 2fc:	f7ff fffe 	bl	0 <__aeabi_dcmpun>
 300:	b940      	cbnz	r0, 314 <__divxc3+0x314>
 302:	9804      	ldr	r0, [sp, #16]
 304:	4639      	mov	r1, r7
 306:	f04f 32ff 	mov.w	r2, #4294967295	; 0xffffffff
 30a:	4b24      	ldr	r3, [pc, #144]	; (94 <__aeabi_dcmple+0x94>)
 30c:	f7ff fffe 	bl	0 <__aeabi_dcmple>
 310:	b900      	cbnz	r0, 314 <__divxc3+0x314>
 312:	4606      	mov	r6, r0
 314:	f086 0001 	eor.w	r0, r6, #1
 318:	f000 0001 	and.w	r0, r0, #1
 31c:	f7ff fffe 	bl	0 <__aeabi_i2d>
 320:	460e      	mov	r6, r1
 322:	9f0a      	ldr	r7, [sp, #40]	; 0x28
 324:	464a      	mov	r2, r9
 326:	ea4f 7cd7 	mov.w	ip, r7, lsr #31
 32a:	4643      	mov	r3, r8
 32c:	9001      	str	r0, [sp, #4]
 32e:	4621      	mov	r1, r4
 330:	4628      	mov	r0, r5
 332:	f36c 76df 	bfi	r6, ip, #31, #1
 336:	f7ff fffe 	bl	0 <__aeabi_dmul>
 33a:	9a01      	ldr	r2, [sp, #4]
 33c:	e9cd 0102 	strd	r0, r1, [sp, #8]
 340:	4633      	mov	r3, r6
 342:	4650      	mov	r0, sl
 344:	4659      	mov	r1, fp
 346:	f7ff fffe 	bl	0 <__aeabi_dmul>
 34a:	4602      	mov	r2, r0
 34c:	460b      	mov	r3, r1
 34e:	e9dd 0102 	ldrd	r0, r1, [sp, #8]
 352:	f7ff fffe 	bl	0 <__aeabi_dadd>
 356:	2200      	movs	r2, #0
 358:	4b11      	ldr	r3, [pc, #68]	; (3a0 <__divxc3+0x3a0>)
 35a:	f7ff fffe 	bl	0 <__aeabi_dmul>
 35e:	9a01      	ldr	r2, [sp, #4]
 360:	e9cd 0102 	strd	r0, r1, [sp, #8]
 364:	4633      	mov	r3, r6
 366:	4628      	mov	r0, r5
 368:	4621      	mov	r1, r4
 36a:	f7ff fffe 	bl	0 <__aeabi_dmul>
 36e:	464a      	mov	r2, r9
 370:	4643      	mov	r3, r8
 372:	4604      	mov	r4, r0
 374:	460d      	mov	r5, r1
 376:	4650      	mov	r0, sl
 378:	4659      	mov	r1, fp
 37a:	f7ff fffe 	bl	0 <__aeabi_dmul>
 37e:	4602      	mov	r2, r0
 380:	460b      	mov	r3, r1
 382:	4620      	mov	r0, r4
 384:	4629      	mov	r1, r5
 386:	f7ff fffe 	bl	0 <__aeabi_dsub>
 38a:	2200      	movs	r2, #0
 38c:	4b04      	ldr	r3, [pc, #16]	; (3a0 <__divxc3+0x3a0>)
 38e:	f7ff fffe 	bl	0 <__aeabi_dmul>
 392:	e9dd 8902 	ldrd	r8, r9, [sp, #8]
 396:	e9cd 0108 	strd	r0, r1, [sp, #32]
 39a:	e6ba      	b.n	112 <__divxc3+0x112>
 39c:	7fefffff 	.word	0x7fefffff
 3a0:	7ff00000 	.word	0x7ff00000
 3a4:	9e0d      	ldr	r6, [sp, #52]	; 0x34
 3a6:	4638      	mov	r0, r7
 3a8:	4631      	mov	r1, r6
 3aa:	f04f 32ff 	mov.w	r2, #4294967295	; 0xffffffff
 3ae:	4b6a      	ldr	r3, [pc, #424]	; (1ac <__aeabi_dcmpun+0x1ac>)
 3b0:	f7ff fffe 	bl	0 <__aeabi_dcmpun>
 3b4:	2800      	cmp	r0, #0
 3b6:	f47f aeac 	bne.w	112 <__divxc3+0x112>
 3ba:	4638      	mov	r0, r7
 3bc:	4631      	mov	r1, r6
 3be:	f04f 32ff 	mov.w	r2, #4294967295	; 0xffffffff
 3c2:	4b65      	ldr	r3, [pc, #404]	; (198 <__aeabi_dcmple+0x198>)
 3c4:	f7ff fffe 	bl	0 <__aeabi_dcmple>
 3c8:	2800      	cmp	r0, #0
 3ca:	f47f aea2 	bne.w	112 <__divxc3+0x112>
 3ce:	4638      	mov	r0, r7
 3d0:	990c      	ldr	r1, [sp, #48]	; 0x30
 3d2:	2200      	movs	r2, #0
 3d4:	2300      	movs	r3, #0
 3d6:	f7ff fffe 	bl	0 <__aeabi_dcmpgt>
 3da:	2800      	cmp	r0, #0
 3dc:	f43f ae99 	beq.w	112 <__divxc3+0x112>
 3e0:	9f01      	ldr	r7, [sp, #4]
 3e2:	9e06      	ldr	r6, [sp, #24]
 3e4:	4638      	mov	r0, r7
 3e6:	4631      	mov	r1, r6
 3e8:	f04f 32ff 	mov.w	r2, #4294967295	; 0xffffffff
 3ec:	4b5a      	ldr	r3, [pc, #360]	; (16c <__aeabi_dcmpun+0x16c>)
 3ee:	f7ff fffe 	bl	0 <__aeabi_dcmpun>
 3f2:	b948      	cbnz	r0, 408 <__divxc3+0x408>
 3f4:	4638      	mov	r0, r7
 3f6:	4631      	mov	r1, r6
 3f8:	f04f 32ff 	mov.w	r2, #4294967295	; 0xffffffff
 3fc:	4b56      	ldr	r3, [pc, #344]	; (15c <__aeabi_dcmple+0x15c>)
 3fe:	f7ff fffe 	bl	0 <__aeabi_dcmple>
 402:	2800      	cmp	r0, #0
 404:	f43f ae85 	beq.w	112 <__divxc3+0x112>
 408:	9e01      	ldr	r6, [sp, #4]
 40a:	4632      	mov	r2, r6
 40c:	4630      	mov	r0, r6
 40e:	9e02      	ldr	r6, [sp, #8]
 410:	4633      	mov	r3, r6
 412:	4631      	mov	r1, r6
 414:	f7ff fffe 	bl	0 <__aeabi_dcmpun>
 418:	2800      	cmp	r0, #0
 41a:	f47f ae7a 	bne.w	112 <__divxc3+0x112>
 41e:	9b0a      	ldr	r3, [sp, #40]	; 0x28
 420:	9f04      	ldr	r7, [sp, #16]
 422:	f023 4600 	bic.w	r6, r3, #2147483648	; 0x80000000
 426:	4638      	mov	r0, r7
 428:	4631      	mov	r1, r6
 42a:	f04f 32ff 	mov.w	r2, #4294967295	; 0xffffffff
 42e:	4b4a      	ldr	r3, [pc, #296]	; (12c <__aeabi_dcmpun+0x12c>)
 430:	f7ff fffe 	bl	0 <__aeabi_dcmpun>
 434:	b948      	cbnz	r0, 44a <__divxc3+0x44a>
 436:	4638      	mov	r0, r7
 438:	4631      	mov	r1, r6
 43a:	f04f 32ff 	mov.w	r2, #4294967295	; 0xffffffff
 43e:	4b46      	ldr	r3, [pc, #280]	; (11c <__aeabi_dcmple+0x11c>)
 440:	f7ff fffe 	bl	0 <__aeabi_dcmple>
 444:	2800      	cmp	r0, #0
 446:	f43f ae64 	beq.w	112 <__divxc3+0x112>
 44a:	9e04      	ldr	r6, [sp, #16]
 44c:	4632      	mov	r2, r6
 44e:	4630      	mov	r0, r6
 450:	9e0a      	ldr	r6, [sp, #40]	; 0x28
 452:	4633      	mov	r3, r6
 454:	4631      	mov	r1, r6
 456:	f7ff fffe 	bl	0 <__aeabi_dcmpun>
 45a:	2800      	cmp	r0, #0
 45c:	f47f ae59 	bne.w	112 <__divxc3+0x112>
 460:	f024 4600 	bic.w	r6, r4, #2147483648	; 0x80000000
 464:	4628      	mov	r0, r5
 466:	4631      	mov	r1, r6
 468:	f04f 32ff 	mov.w	r2, #4294967295	; 0xffffffff
 46c:	4b3a      	ldr	r3, [pc, #232]	; (558 <__divxc3+0x558>)
 46e:	f04f 0701 	mov.w	r7, #1
 472:	f7ff fffe 	bl	0 <__aeabi_dcmpun>
 476:	b940      	cbnz	r0, 48a <__divxc3+0x48a>
 478:	4628      	mov	r0, r5
 47a:	4631      	mov	r1, r6
 47c:	f04f 32ff 	mov.w	r2, #4294967295	; 0xffffffff
 480:	4b35      	ldr	r3, [pc, #212]	; (d8 <__aeabi_dcmple+0xd8>)
 482:	f7ff fffe 	bl	0 <__aeabi_dcmple>
 486:	b900      	cbnz	r0, 48a <__divxc3+0x48a>
 488:	4607      	mov	r7, r0
 48a:	f087 0001 	eor.w	r0, r7, #1
 48e:	f000 0001 	and.w	r0, r0, #1
 492:	f7ff fffe 	bl	0 <__aeabi_i2d>
 496:	460f      	mov	r7, r1
 498:	f02b 4500 	bic.w	r5, fp, #2147483648	; 0x80000000
 49c:	0fe4      	lsrs	r4, r4, #31
 49e:	4680      	mov	r8, r0
 4a0:	4629      	mov	r1, r5
 4a2:	4650      	mov	r0, sl
 4a4:	f04f 32ff 	mov.w	r2, #4294967295	; 0xffffffff
 4a8:	4b2b      	ldr	r3, [pc, #172]	; (558 <__divxc3+0x558>)
 4aa:	f364 77df 	bfi	r7, r4, #31, #1
 4ae:	f04f 0401 	mov.w	r4, #1
 4b2:	f7ff fffe 	bl	0 <__aeabi_dcmpun>
 4b6:	b940      	cbnz	r0, 4ca <__divxc3+0x4ca>
 4b8:	4650      	mov	r0, sl
 4ba:	4629      	mov	r1, r5
 4bc:	f04f 32ff 	mov.w	r2, #4294967295	; 0xffffffff
 4c0:	4b25      	ldr	r3, [pc, #148]	; (98 <__aeabi_dcmple+0x98>)
 4c2:	f7ff fffe 	bl	0 <__aeabi_dcmple>
 4c6:	b900      	cbnz	r0, 4ca <__divxc3+0x4ca>
 4c8:	4604      	mov	r4, r0
 4ca:	f084 0001 	eor.w	r0, r4, #1
 4ce:	f000 0001 	and.w	r0, r0, #1
 4d2:	f7ff fffe 	bl	0 <__aeabi_i2d>
 4d6:	460e      	mov	r6, r1
 4d8:	4682      	mov	sl, r0
 4da:	4642      	mov	r2, r8
 4dc:	463b      	mov	r3, r7
 4de:	9801      	ldr	r0, [sp, #4]
 4e0:	9902      	ldr	r1, [sp, #8]
 4e2:	f7ff fffe 	bl	0 <__aeabi_dmul>
 4e6:	ea4f 7bdb 	mov.w	fp, fp, lsr #31
 4ea:	f36b 76df 	bfi	r6, fp, #31, #1
 4ee:	f8dd 9028 	ldr.w	r9, [sp, #40]	; 0x28
 4f2:	f8dd b010 	ldr.w	fp, [sp, #16]
 4f6:	4604      	mov	r4, r0
 4f8:	460d      	mov	r5, r1
 4fa:	4652      	mov	r2, sl
 4fc:	4633      	mov	r3, r6
 4fe:	4649      	mov	r1, r9
 500:	4658      	mov	r0, fp
 502:	f7ff fffe 	bl	0 <__aeabi_dmul>
 506:	4602      	mov	r2, r0
 508:	460b      	mov	r3, r1
 50a:	4620      	mov	r0, r4
 50c:	4629      	mov	r1, r5
 50e:	f7ff fffe 	bl	0 <__aeabi_dadd>
 512:	2200      	movs	r2, #0
 514:	2300      	movs	r3, #0
 516:	f7ff fffe 	bl	0 <__aeabi_dmul>
 51a:	4642      	mov	r2, r8
 51c:	e9cd 0104 	strd	r0, r1, [sp, #16]
 520:	463b      	mov	r3, r7
 522:	4649      	mov	r1, r9
 524:	4658      	mov	r0, fp
 526:	f7ff fffe 	bl	0 <__aeabi_dmul>
 52a:	4652      	mov	r2, sl
 52c:	4604      	mov	r4, r0
 52e:	460d      	mov	r5, r1
 530:	4633      	mov	r3, r6
 532:	9801      	ldr	r0, [sp, #4]
 534:	9902      	ldr	r1, [sp, #8]
 536:	f7ff fffe 	bl	0 <__aeabi_dmul>
 53a:	4602      	mov	r2, r0
 53c:	460b      	mov	r3, r1
 53e:	4620      	mov	r0, r4
 540:	4629      	mov	r1, r5
 542:	f7ff fffe 	bl	0 <__aeabi_dsub>
 546:	2200      	movs	r2, #0
 548:	2300      	movs	r3, #0
 54a:	f7ff fffe 	bl	0 <__aeabi_dmul>
 54e:	e9dd 8904 	ldrd	r8, r9, [sp, #16]
 552:	e9cd 0108 	strd	r0, r1, [sp, #32]
 556:	e5dc      	b.n	112 <__divxc3+0x112>
 558:	7fefffff 	.word	0x7fefffff

extendhfsf2.o:     file format elf32-littlearm

SYMBOL TABLE:
00000000 l    df *ABS*	00000000 extendhfsf2.c
00000000 l    d  .text	00000000 .text
00000000 l    d  .data	00000000 .data
00000000 l    d  .bss	00000000 .bss
00000000 l    d  .text.__extendhfsf2	00000000 .text.__extendhfsf2
00000000 l    d  .text.__gnu_h2f_ieee	00000000 .text.__gnu_h2f_ieee
00000000 l    d  .comment	00000000 .comment
00000000 l    d  .ARM.attributes	00000000 .ARM.attributes
00000000 g     F .text.__extendhfsf2	00000058 .hidden __extendhfsf2
00000000 g     F .text.__extendhfsf2	00000058 .hidden __aeabi_h2f
00000000 g     F .text.__gnu_h2f_ieee	00000004 .hidden __gnu_h2f_ieee



Disassembly of section .text.__extendhfsf2:

00000000 <__aeabi_h2f>:
__aeabi_h2f():
   0:	f3c0 030e 	ubfx	r3, r0, #0, #15
   4:	f5a3 6280 	sub.w	r2, r3, #1024	; 0x400
   8:	f5b2 4ff0 	cmp.w	r2, #30720	; 0x7800
   c:	f400 4000 	and.w	r0, r0, #32768	; 0x8000
  10:	d319      	bcc.n	46 <__aeabi_h2f+0x46>
  12:	f5b3 4ff8 	cmp.w	r3, #31744	; 0x7c00
  16:	d20e      	bcs.n	36 <__aeabi_h2f+0x36>
  18:	b193      	cbz	r3, 40 <__aeabi_h2f+0x40>
  1a:	fab3 f283 	clz	r2, r3
  1e:	f1a2 0108 	sub.w	r1, r2, #8
  22:	408b      	lsls	r3, r1
  24:	f1c2 0286 	rsb	r2, r2, #134	; 0x86
  28:	f483 0300 	eor.w	r3, r3, #8388608	; 0x800000
  2c:	ea43 53c2 	orr.w	r3, r3, r2, lsl #23
  30:	ea43 4000 	orr.w	r0, r3, r0, lsl #16
  34:	4770      	bx	lr
  36:	4a07      	ldr	r2, [pc, #28]	; (54 <__aeabi_h2f+0x54>)
  38:	ea02 3343 	and.w	r3, r2, r3, lsl #13
  3c:	f043 43ff 	orr.w	r3, r3, #2139095040	; 0x7f800000
  40:	ea43 4000 	orr.w	r0, r3, r0, lsl #16
  44:	4770      	bx	lr
  46:	035b      	lsls	r3, r3, #13
  48:	f103 5360 	add.w	r3, r3, #939524096	; 0x38000000
  4c:	ea43 4000 	orr.w	r0, r3, r0, lsl #16
  50:	4770      	bx	lr
  52:	bf00      	nop
  54:	007fe000 	.word	0x007fe000

Disassembly of section .text.__gnu_h2f_ieee:

00000000 <__gnu_h2f_ieee>:
__gnu_h2f_ieee():
   0:	f7ff bffe 	b.w	0 <__gnu_h2f_ieee>

ffsti2.o:     file format elf32-littlearm

SYMBOL TABLE:
00000000 l    df *ABS*	00000000 absvti2.c
00000000 l    d  .text	00000000 .text
00000000 l    d  .data	00000000 .data
00000000 l    d  .bss	00000000 .bss
00000000 l    d  .comment	00000000 .comment
00000000 l    d  .ARM.attributes	00000000 .ARM.attributes



int_util.o:     file format elf32-littlearm

SYMBOL TABLE:
00000000 l    df *ABS*	00000000 int_util.c
00000000 l    d  .text	00000000 .text
00000000 l    d  .data	00000000 .data
00000000 l    d  .bss	00000000 .bss
00000000 l    d  .text.__compilerrt_abort_impl	00000000 .text.__compilerrt_abort_impl
00000000 l    d  .comment	00000000 .comment
00000000 l    d  .ARM.attributes	00000000 .ARM.attributes
00000000  w    F .text.__compilerrt_abort_impl	00000006 .hidden __compilerrt_abort_impl
00000000         *UND*	00000000 abort



Disassembly of section .text.__compilerrt_abort_impl:

00000000 <__compilerrt_abort_impl>:
__compilerrt_abort_impl():
   0:	b508      	push	{r3, lr}
   2:	f7ff fffe 	bl	0 <abort>
   6:	bf00      	nop

modsi3.o:     file format elf32-littlearm

SYMBOL TABLE:
00000000 l    d  .text	00000000 .text
00000000 l    d  .data	00000000 .data
00000000 l    d  .bss	00000000 .bss
00000000 l    d  .ARM.attributes	00000000 .ARM.attributes
00000000 g     F .text	00000014 .hidden __modsi3



Disassembly of section .text:

00000000 <__modsi3>:
__modsi3():
   0:	4209      	tst	r1, r1
   2:	d004      	beq.n	e <__modsi3+0xe>
   4:	fb90 f2f1 	sdiv	r2, r0, r1
   8:	fb02 0011 	mls	r0, r2, r1, r0
   c:	4770      	bx	lr
   e:	f04f 0000 	mov.w	r0, #0
  12:	4770      	bx	lr

muldc3.o:     file format elf32-littlearm

SYMBOL TABLE:
00000000 l    df *ABS*	00000000 muldc3.c
00000000 l    d  .text	00000000 .text
00000000 l    d  .data	00000000 .data
00000000 l    d  .bss	00000000 .bss
00000000 l    d  .text.__muldc3	00000000 .text.__muldc3
00000000 l    d  .comment	00000000 .comment
00000000 l    d  .ARM.attributes	00000000 .ARM.attributes
00000000         *UND*	00000000 __aeabi_dmul
00000000         *UND*	00000000 __aeabi_dsub
00000000         *UND*	00000000 __aeabi_dadd
00000000         *UND*	00000000 __aeabi_dcmpun
00000000         *UND*	00000000 __aeabi_dcmple
00000000         *UND*	00000000 __aeabi_i2d
00000000 g     F .text.__muldc3	000004d4 .hidden __muldc3



Disassembly of section .text.__muldc3:

00000000 <__muldc3>:
__muldc3():
   0:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
   4:	4615      	mov	r5, r2
   6:	b093      	sub	sp, #76	; 0x4c
   8:	f8dd a078 	ldr.w	sl, [sp, #120]	; 0x78
   c:	f8dd b07c 	ldr.w	fp, [sp, #124]	; 0x7c
  10:	4619      	mov	r1, r3
  12:	4652      	mov	r2, sl
  14:	9303      	str	r3, [sp, #12]
  16:	4604      	mov	r4, r0
  18:	465b      	mov	r3, fp
  1a:	4628      	mov	r0, r5
  1c:	f7ff fffe 	bl	0 <__aeabi_dmul>
  20:	9f1c      	ldr	r7, [sp, #112]	; 0x70
  22:	4686      	mov	lr, r0
  24:	9702      	str	r7, [sp, #8]
  26:	4638      	mov	r0, r7
  28:	9f21      	ldr	r7, [sp, #132]	; 0x84
  2a:	468c      	mov	ip, r1
  2c:	463e      	mov	r6, r7
  2e:	9b20      	ldr	r3, [sp, #128]	; 0x80
  30:	9709      	str	r7, [sp, #36]	; 0x24
  32:	9f1d      	ldr	r7, [sp, #116]	; 0x74
  34:	4698      	mov	r8, r3
  36:	461a      	mov	r2, r3
  38:	9308      	str	r3, [sp, #32]
  3a:	4639      	mov	r1, r7
  3c:	4633      	mov	r3, r6
  3e:	46e1      	mov	r9, ip
  40:	f8cd e010 	str.w	lr, [sp, #16]
  44:	f8cd c028 	str.w	ip, [sp, #40]	; 0x28
  48:	f7ff fffe 	bl	0 <__aeabi_dmul>
  4c:	4686      	mov	lr, r0
  4e:	468c      	mov	ip, r1
  50:	4642      	mov	r2, r8
  52:	4633      	mov	r3, r6
  54:	4628      	mov	r0, r5
  56:	9903      	ldr	r1, [sp, #12]
  58:	46f0      	mov	r8, lr
  5a:	4666      	mov	r6, ip
  5c:	f8cd e02c 	str.w	lr, [sp, #44]	; 0x2c
  60:	f8cd c030 	str.w	ip, [sp, #48]	; 0x30
  64:	f7ff fffe 	bl	0 <__aeabi_dmul>
  68:	4686      	mov	lr, r0
  6a:	468c      	mov	ip, r1
  6c:	9a02      	ldr	r2, [sp, #8]
  6e:	463b      	mov	r3, r7
  70:	4650      	mov	r0, sl
  72:	4659      	mov	r1, fp
  74:	f8cd e014 	str.w	lr, [sp, #20]
  78:	f8cd c01c 	str.w	ip, [sp, #28]
  7c:	f7ff fffe 	bl	0 <__aeabi_dmul>
  80:	468c      	mov	ip, r1
  82:	4686      	mov	lr, r0
  84:	4642      	mov	r2, r8
  86:	4633      	mov	r3, r6
  88:	4649      	mov	r1, r9
  8a:	9804      	ldr	r0, [sp, #16]
  8c:	4666      	mov	r6, ip
  8e:	f8cd e018 	str.w	lr, [sp, #24]
  92:	f8cd c034 	str.w	ip, [sp, #52]	; 0x34
  96:	f7ff fffe 	bl	0 <__aeabi_dsub>
  9a:	4633      	mov	r3, r6
  9c:	4680      	mov	r8, r0
  9e:	e9dd 0205 	ldrd	r0, r2, [sp, #20]
  a2:	4689      	mov	r9, r1
  a4:	9907      	ldr	r1, [sp, #28]
  a6:	f7ff fffe 	bl	0 <__aeabi_dadd>
  aa:	4642      	mov	r2, r8
  ac:	e9cd 0100 	strd	r0, r1, [sp]
  b0:	464b      	mov	r3, r9
  b2:	4640      	mov	r0, r8
  b4:	4649      	mov	r1, r9
  b6:	f7ff fffe 	bl	0 <__aeabi_dcmpun>
  ba:	b948      	cbnz	r0, d0 <__muldc3+0xd0>
  bc:	e9dd 2300 	ldrd	r2, r3, [sp]
  c0:	4620      	mov	r0, r4
  c2:	e9c4 8900 	strd	r8, r9, [r4]
  c6:	e9c4 2302 	strd	r2, r3, [r4, #8]
  ca:	b013      	add	sp, #76	; 0x4c
  cc:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
  d0:	e9dd 0100 	ldrd	r0, r1, [sp]
  d4:	4602      	mov	r2, r0
  d6:	460b      	mov	r3, r1
  d8:	f7ff fffe 	bl	0 <__aeabi_dcmpun>
  dc:	2800      	cmp	r0, #0
  de:	d0ed      	beq.n	bc <__muldc3+0xbc>
  e0:	f04f 0c01 	mov.w	ip, #1
  e4:	9b03      	ldr	r3, [sp, #12]
  e6:	4628      	mov	r0, r5
  e8:	f023 4300 	bic.w	r3, r3, #2147483648	; 0x80000000
  ec:	461e      	mov	r6, r3
  ee:	930e      	str	r3, [sp, #56]	; 0x38
  f0:	4619      	mov	r1, r3
  f2:	f04f 32ff 	mov.w	r2, #4294967295	; 0xffffffff
  f6:	4b9f      	ldr	r3, [pc, #636]	; (374 <__muldc3+0x374>)
  f8:	f88d c040 	strb.w	ip, [sp, #64]	; 0x40
  fc:	f7ff fffe 	bl	0 <__aeabi_dcmpun>
 100:	b948      	cbnz	r0, 116 <__muldc3+0x116>
 102:	4628      	mov	r0, r5
 104:	4631      	mov	r1, r6
 106:	f04f 32ff 	mov.w	r2, #4294967295	; 0xffffffff
 10a:	4b9a      	ldr	r3, [pc, #616]	; (26c <__aeabi_dcmple+0x26c>)
 10c:	f7ff fffe 	bl	0 <__aeabi_dcmple>
 110:	b908      	cbnz	r0, 116 <__muldc3+0x116>
 112:	f88d 0040 	strb.w	r0, [sp, #64]	; 0x40
 116:	f89d 3040 	ldrb.w	r3, [sp, #64]	; 0x40
 11a:	4628      	mov	r0, r5
 11c:	f083 0c01 	eor.w	ip, r3, #1
 120:	fa5f f68c 	uxtb.w	r6, ip
 124:	9611      	str	r6, [sp, #68]	; 0x44
 126:	990e      	ldr	r1, [sp, #56]	; 0x38
 128:	f027 4600 	bic.w	r6, r7, #2147483648	; 0x80000000
 12c:	f04f 32ff 	mov.w	r2, #4294967295	; 0xffffffff
 130:	4b90      	ldr	r3, [pc, #576]	; (374 <__muldc3+0x374>)
 132:	9610      	str	r6, [sp, #64]	; 0x40
 134:	f7ff fffe 	bl	0 <__aeabi_dcmpun>
 138:	b948      	cbnz	r0, 14e <__muldc3+0x14e>
 13a:	4628      	mov	r0, r5
 13c:	990e      	ldr	r1, [sp, #56]	; 0x38
 13e:	f04f 32ff 	mov.w	r2, #4294967295	; 0xffffffff
 142:	4b8c      	ldr	r3, [pc, #560]	; (234 <__aeabi_dcmple+0x234>)
 144:	f7ff fffe 	bl	0 <__aeabi_dcmple>
 148:	2800      	cmp	r0, #0
 14a:	f000 8117 	beq.w	37c <__muldc3+0x37c>
 14e:	9e10      	ldr	r6, [sp, #64]	; 0x40
 150:	9802      	ldr	r0, [sp, #8]
 152:	4631      	mov	r1, r6
 154:	f04f 32ff 	mov.w	r2, #4294967295	; 0xffffffff
 158:	4b86      	ldr	r3, [pc, #536]	; (21c <__aeabi_dcmpun+0x21c>)
 15a:	f7ff fffe 	bl	0 <__aeabi_dcmpun>
 15e:	b948      	cbnz	r0, 174 <__muldc3+0x174>
 160:	9802      	ldr	r0, [sp, #8]
 162:	4631      	mov	r1, r6
 164:	f04f 32ff 	mov.w	r2, #4294967295	; 0xffffffff
 168:	4b82      	ldr	r3, [pc, #520]	; (20c <__aeabi_dcmple+0x20c>)
 16a:	f7ff fffe 	bl	0 <__aeabi_dcmple>
 16e:	2800      	cmp	r0, #0
 170:	f000 8104 	beq.w	37c <__muldc3+0x37c>
 174:	2300      	movs	r3, #0
 176:	9311      	str	r3, [sp, #68]	; 0x44
 178:	f04f 0c01 	mov.w	ip, #1
 17c:	f02b 4300 	bic.w	r3, fp, #2147483648	; 0x80000000
 180:	461e      	mov	r6, r3
 182:	930e      	str	r3, [sp, #56]	; 0x38
 184:	4619      	mov	r1, r3
 186:	4650      	mov	r0, sl
 188:	f04f 32ff 	mov.w	r2, #4294967295	; 0xffffffff
 18c:	4b79      	ldr	r3, [pc, #484]	; (374 <__muldc3+0x374>)
 18e:	f88d c040 	strb.w	ip, [sp, #64]	; 0x40
 192:	f7ff fffe 	bl	0 <__aeabi_dcmpun>
 196:	b948      	cbnz	r0, 1ac <__muldc3+0x1ac>
 198:	4650      	mov	r0, sl
 19a:	4631      	mov	r1, r6
 19c:	f04f 32ff 	mov.w	r2, #4294967295	; 0xffffffff
 1a0:	4b74      	ldr	r3, [pc, #464]	; (1d4 <__aeabi_dcmple+0x1d4>)
 1a2:	f7ff fffe 	bl	0 <__aeabi_dcmple>
 1a6:	b908      	cbnz	r0, 1ac <__muldc3+0x1ac>
 1a8:	f88d 0040 	strb.w	r0, [sp, #64]	; 0x40
 1ac:	f89d 3040 	ldrb.w	r3, [sp, #64]	; 0x40
 1b0:	4650      	mov	r0, sl
 1b2:	f083 0c01 	eor.w	ip, r3, #1
 1b6:	fa5f f68c 	uxtb.w	r6, ip
 1ba:	9610      	str	r6, [sp, #64]	; 0x40
 1bc:	9e09      	ldr	r6, [sp, #36]	; 0x24
 1be:	990e      	ldr	r1, [sp, #56]	; 0x38
 1c0:	f04f 32ff 	mov.w	r2, #4294967295	; 0xffffffff
 1c4:	4b6b      	ldr	r3, [pc, #428]	; (374 <__muldc3+0x374>)
 1c6:	f026 4600 	bic.w	r6, r6, #2147483648	; 0x80000000
 1ca:	f7ff fffe 	bl	0 <__aeabi_dcmpun>
 1ce:	b948      	cbnz	r0, 1e4 <__muldc3+0x1e4>
 1d0:	4650      	mov	r0, sl
 1d2:	990e      	ldr	r1, [sp, #56]	; 0x38
 1d4:	f04f 32ff 	mov.w	r2, #4294967295	; 0xffffffff
 1d8:	4b66      	ldr	r3, [pc, #408]	; (19c <__aeabi_dcmple+0x19c>)
 1da:	f7ff fffe 	bl	0 <__aeabi_dcmple>
 1de:	2800      	cmp	r0, #0
 1e0:	f000 810d 	beq.w	3fe <__muldc3+0x3fe>
 1e4:	9808      	ldr	r0, [sp, #32]
 1e6:	4631      	mov	r1, r6
 1e8:	f04f 32ff 	mov.w	r2, #4294967295	; 0xffffffff
 1ec:	4b61      	ldr	r3, [pc, #388]	; (188 <__aeabi_dcmpun+0x188>)
 1ee:	f7ff fffe 	bl	0 <__aeabi_dcmpun>
 1f2:	b948      	cbnz	r0, 208 <__muldc3+0x208>
 1f4:	9808      	ldr	r0, [sp, #32]
 1f6:	4631      	mov	r1, r6
 1f8:	f04f 32ff 	mov.w	r2, #4294967295	; 0xffffffff
 1fc:	4b5d      	ldr	r3, [pc, #372]	; (178 <__aeabi_dcmple+0x178>)
 1fe:	f7ff fffe 	bl	0 <__aeabi_dcmple>
 202:	2800      	cmp	r0, #0
 204:	f000 80fb 	beq.w	3fe <__muldc3+0x3fe>
 208:	9b11      	ldr	r3, [sp, #68]	; 0x44
 20a:	2b00      	cmp	r3, #0
 20c:	d17c      	bne.n	308 <__muldc3+0x308>
 20e:	9b0a      	ldr	r3, [sp, #40]	; 0x28
 210:	9804      	ldr	r0, [sp, #16]
 212:	f023 4300 	bic.w	r3, r3, #2147483648	; 0x80000000
 216:	461e      	mov	r6, r3
 218:	4619      	mov	r1, r3
 21a:	f04f 32ff 	mov.w	r2, #4294967295	; 0xffffffff
 21e:	4b55      	ldr	r3, [pc, #340]	; (158 <__aeabi_dcmpun+0x158>)
 220:	f7ff fffe 	bl	0 <__aeabi_dcmpun>
 224:	b940      	cbnz	r0, 238 <__muldc3+0x238>
 226:	9804      	ldr	r0, [sp, #16]
 228:	4631      	mov	r1, r6
 22a:	f04f 32ff 	mov.w	r2, #4294967295	; 0xffffffff
 22e:	4b51      	ldr	r3, [pc, #324]	; (148 <__aeabi_dcmple+0x148>)
 230:	f7ff fffe 	bl	0 <__aeabi_dcmple>
 234:	2800      	cmp	r0, #0
 236:	d03f      	beq.n	2b8 <__muldc3+0x2b8>
 238:	e9dd 030b 	ldrd	r0, r3, [sp, #44]	; 0x2c
 23c:	f023 4300 	bic.w	r3, r3, #2147483648	; 0x80000000
 240:	461e      	mov	r6, r3
 242:	4619      	mov	r1, r3
 244:	f04f 32ff 	mov.w	r2, #4294967295	; 0xffffffff
 248:	4b4a      	ldr	r3, [pc, #296]	; (12c <__aeabi_dcmpun+0x12c>)
 24a:	f7ff fffe 	bl	0 <__aeabi_dcmpun>
 24e:	b938      	cbnz	r0, 260 <__muldc3+0x260>
 250:	980b      	ldr	r0, [sp, #44]	; 0x2c
 252:	4631      	mov	r1, r6
 254:	f04f 32ff 	mov.w	r2, #4294967295	; 0xffffffff
 258:	4b46      	ldr	r3, [pc, #280]	; (11c <__aeabi_dcmple+0x11c>)
 25a:	f7ff fffe 	bl	0 <__aeabi_dcmple>
 25e:	b358      	cbz	r0, 2b8 <__muldc3+0x2b8>
 260:	9b07      	ldr	r3, [sp, #28]
 262:	9805      	ldr	r0, [sp, #20]
 264:	f023 4300 	bic.w	r3, r3, #2147483648	; 0x80000000
 268:	461e      	mov	r6, r3
 26a:	4619      	mov	r1, r3
 26c:	f04f 32ff 	mov.w	r2, #4294967295	; 0xffffffff
 270:	4b40      	ldr	r3, [pc, #256]	; (104 <__aeabi_dcmpun+0x104>)
 272:	f7ff fffe 	bl	0 <__aeabi_dcmpun>
 276:	b938      	cbnz	r0, 288 <__muldc3+0x288>
 278:	9805      	ldr	r0, [sp, #20]
 27a:	4631      	mov	r1, r6
 27c:	f04f 32ff 	mov.w	r2, #4294967295	; 0xffffffff
 280:	4b3c      	ldr	r3, [pc, #240]	; (f4 <__aeabi_dcmple+0xf4>)
 282:	f7ff fffe 	bl	0 <__aeabi_dcmple>
 286:	b1b8      	cbz	r0, 2b8 <__muldc3+0x2b8>
 288:	9b0d      	ldr	r3, [sp, #52]	; 0x34
 28a:	9806      	ldr	r0, [sp, #24]
 28c:	f023 4300 	bic.w	r3, r3, #2147483648	; 0x80000000
 290:	461e      	mov	r6, r3
 292:	4619      	mov	r1, r3
 294:	f04f 32ff 	mov.w	r2, #4294967295	; 0xffffffff
 298:	4b36      	ldr	r3, [pc, #216]	; (dc <__aeabi_dcmpun+0xdc>)
 29a:	f7ff fffe 	bl	0 <__aeabi_dcmpun>
 29e:	2800      	cmp	r0, #0
 2a0:	f47f af0c 	bne.w	bc <__muldc3+0xbc>
 2a4:	9806      	ldr	r0, [sp, #24]
 2a6:	4631      	mov	r1, r6
 2a8:	f04f 32ff 	mov.w	r2, #4294967295	; 0xffffffff
 2ac:	4b31      	ldr	r3, [pc, #196]	; (c8 <__aeabi_dcmple+0xc8>)
 2ae:	f7ff fffe 	bl	0 <__aeabi_dcmple>
 2b2:	2800      	cmp	r0, #0
 2b4:	f47f af02 	bne.w	bc <__muldc3+0xbc>
 2b8:	9e03      	ldr	r6, [sp, #12]
 2ba:	462a      	mov	r2, r5
 2bc:	4628      	mov	r0, r5
 2be:	4633      	mov	r3, r6
 2c0:	4631      	mov	r1, r6
 2c2:	f7ff fffe 	bl	0 <__aeabi_dcmpun>
 2c6:	2800      	cmp	r0, #0
 2c8:	f040 80fb 	bne.w	4c2 <__muldc3+0x4c2>
 2cc:	9e02      	ldr	r6, [sp, #8]
 2ce:	463b      	mov	r3, r7
 2d0:	4632      	mov	r2, r6
 2d2:	4630      	mov	r0, r6
 2d4:	4639      	mov	r1, r7
 2d6:	f7ff fffe 	bl	0 <__aeabi_dcmpun>
 2da:	2800      	cmp	r0, #0
 2dc:	f040 80ec 	bne.w	4b8 <__muldc3+0x4b8>
 2e0:	4652      	mov	r2, sl
 2e2:	4650      	mov	r0, sl
 2e4:	465b      	mov	r3, fp
 2e6:	4659      	mov	r1, fp
 2e8:	f7ff fffe 	bl	0 <__aeabi_dcmpun>
 2ec:	2800      	cmp	r0, #0
 2ee:	f040 80de 	bne.w	4ae <__muldc3+0x4ae>
 2f2:	9e08      	ldr	r6, [sp, #32]
 2f4:	4632      	mov	r2, r6
 2f6:	4630      	mov	r0, r6
 2f8:	9e09      	ldr	r6, [sp, #36]	; 0x24
 2fa:	4633      	mov	r3, r6
 2fc:	4631      	mov	r1, r6
 2fe:	f7ff fffe 	bl	0 <__aeabi_dcmpun>
 302:	2800      	cmp	r0, #0
 304:	f040 80cc 	bne.w	4a0 <__muldc3+0x4a0>
 308:	4652      	mov	r2, sl
 30a:	4628      	mov	r0, r5
 30c:	465b      	mov	r3, fp
 30e:	9903      	ldr	r1, [sp, #12]
 310:	f7ff fffe 	bl	0 <__aeabi_dmul>
 314:	9e09      	ldr	r6, [sp, #36]	; 0x24
 316:	4680      	mov	r8, r0
 318:	4689      	mov	r9, r1
 31a:	4633      	mov	r3, r6
 31c:	9a08      	ldr	r2, [sp, #32]
 31e:	9802      	ldr	r0, [sp, #8]
 320:	4639      	mov	r1, r7
 322:	f7ff fffe 	bl	0 <__aeabi_dmul>
 326:	4602      	mov	r2, r0
 328:	460b      	mov	r3, r1
 32a:	4640      	mov	r0, r8
 32c:	4649      	mov	r1, r9
 32e:	f7ff fffe 	bl	0 <__aeabi_dsub>
 332:	2200      	movs	r2, #0
 334:	4b10      	ldr	r3, [pc, #64]	; (378 <__muldc3+0x378>)
 336:	f7ff fffe 	bl	0 <__aeabi_dmul>
 33a:	4633      	mov	r3, r6
 33c:	9a08      	ldr	r2, [sp, #32]
 33e:	4680      	mov	r8, r0
 340:	4689      	mov	r9, r1
 342:	4628      	mov	r0, r5
 344:	9903      	ldr	r1, [sp, #12]
 346:	f7ff fffe 	bl	0 <__aeabi_dmul>
 34a:	4652      	mov	r2, sl
 34c:	4605      	mov	r5, r0
 34e:	460e      	mov	r6, r1
 350:	465b      	mov	r3, fp
 352:	9802      	ldr	r0, [sp, #8]
 354:	4639      	mov	r1, r7
 356:	f7ff fffe 	bl	0 <__aeabi_dmul>
 35a:	4602      	mov	r2, r0
 35c:	460b      	mov	r3, r1
 35e:	4628      	mov	r0, r5
 360:	4631      	mov	r1, r6
 362:	f7ff fffe 	bl	0 <__aeabi_dadd>
 366:	2200      	movs	r2, #0
 368:	4b03      	ldr	r3, [pc, #12]	; (378 <__muldc3+0x378>)
 36a:	f7ff fffe 	bl	0 <__aeabi_dmul>
 36e:	e9cd 0100 	strd	r0, r1, [sp]
 372:	e6a3      	b.n	bc <__muldc3+0xbc>
 374:	7fefffff 	.word	0x7fefffff
 378:	7ff00000 	.word	0x7ff00000
 37c:	9811      	ldr	r0, [sp, #68]	; 0x44
 37e:	f7ff fffe 	bl	0 <__aeabi_i2d>
 382:	9b02      	ldr	r3, [sp, #8]
 384:	9a10      	ldr	r2, [sp, #64]	; 0x40
 386:	930e      	str	r3, [sp, #56]	; 0x38
 388:	9b03      	ldr	r3, [sp, #12]
 38a:	920f      	str	r2, [sp, #60]	; 0x3c
 38c:	f361 031e 	bfi	r3, r1, #0, #31
 390:	4605      	mov	r5, r0
 392:	e9dd 010e 	ldrd	r0, r1, [sp, #56]	; 0x38
 396:	9303      	str	r3, [sp, #12]
 398:	f04f 32ff 	mov.w	r2, #4294967295	; 0xffffffff
 39c:	4b4c      	ldr	r3, [pc, #304]	; (4d0 <__muldc3+0x4d0>)
 39e:	f04f 0601 	mov.w	r6, #1
 3a2:	f7ff fffe 	bl	0 <__aeabi_dcmpun>
 3a6:	b940      	cbnz	r0, 3ba <__muldc3+0x3ba>
 3a8:	9802      	ldr	r0, [sp, #8]
 3aa:	9910      	ldr	r1, [sp, #64]	; 0x40
 3ac:	f04f 32ff 	mov.w	r2, #4294967295	; 0xffffffff
 3b0:	4b47      	ldr	r3, [pc, #284]	; (120 <__aeabi_dcmple+0x120>)
 3b2:	f7ff fffe 	bl	0 <__aeabi_dcmple>
 3b6:	b900      	cbnz	r0, 3ba <__muldc3+0x3ba>
 3b8:	4606      	mov	r6, r0
 3ba:	f086 0001 	eor.w	r0, r6, #1
 3be:	f000 0001 	and.w	r0, r0, #1
 3c2:	f7ff fffe 	bl	0 <__aeabi_i2d>
 3c6:	f8cd a038 	str.w	sl, [sp, #56]	; 0x38
 3ca:	f8cd b03c 	str.w	fp, [sp, #60]	; 0x3c
 3ce:	9002      	str	r0, [sp, #8]
 3d0:	f361 071e 	bfi	r7, r1, #0, #31
 3d4:	4652      	mov	r2, sl
 3d6:	e9dd 010e 	ldrd	r0, r1, [sp, #56]	; 0x38
 3da:	465b      	mov	r3, fp
 3dc:	f7ff fffe 	bl	0 <__aeabi_dcmpun>
 3e0:	2800      	cmp	r0, #0
 3e2:	d152      	bne.n	48a <__muldc3+0x48a>
 3e4:	9e08      	ldr	r6, [sp, #32]
 3e6:	4632      	mov	r2, r6
 3e8:	4630      	mov	r0, r6
 3ea:	9e09      	ldr	r6, [sp, #36]	; 0x24
 3ec:	4633      	mov	r3, r6
 3ee:	4631      	mov	r1, r6
 3f0:	f7ff fffe 	bl	0 <__aeabi_dcmpun>
 3f4:	2800      	cmp	r0, #0
 3f6:	d13f      	bne.n	478 <__muldc3+0x478>
 3f8:	2301      	movs	r3, #1
 3fa:	9311      	str	r3, [sp, #68]	; 0x44
 3fc:	e6bc      	b.n	178 <__muldc3+0x178>
 3fe:	9810      	ldr	r0, [sp, #64]	; 0x40
 400:	f7ff fffe 	bl	0 <__aeabi_i2d>
 404:	f8dd 8020 	ldr.w	r8, [sp, #32]
 408:	4682      	mov	sl, r0
 40a:	f361 0b1e 	bfi	fp, r1, #0, #31
 40e:	4640      	mov	r0, r8
 410:	f04f 32ff 	mov.w	r2, #4294967295	; 0xffffffff
 414:	4b2e      	ldr	r3, [pc, #184]	; (4d0 <__muldc3+0x4d0>)
 416:	4631      	mov	r1, r6
 418:	f04f 0801 	mov.w	r8, #1
 41c:	f7ff fffe 	bl	0 <__aeabi_dcmpun>
 420:	b940      	cbnz	r0, 434 <__muldc3+0x434>
 422:	9808      	ldr	r0, [sp, #32]
 424:	4631      	mov	r1, r6
 426:	f04f 32ff 	mov.w	r2, #4294967295	; 0xffffffff
 42a:	4b29      	ldr	r3, [pc, #164]	; (a8 <__aeabi_dcmple+0xa8>)
 42c:	f7ff fffe 	bl	0 <__aeabi_dcmple>
 430:	b900      	cbnz	r0, 434 <__muldc3+0x434>
 432:	4680      	mov	r8, r0
 434:	f088 0001 	eor.w	r0, r8, #1
 438:	f000 0001 	and.w	r0, r0, #1
 43c:	f7ff fffe 	bl	0 <__aeabi_i2d>
 440:	9008      	str	r0, [sp, #32]
 442:	9803      	ldr	r0, [sp, #12]
 444:	462a      	mov	r2, r5
 446:	4603      	mov	r3, r0
 448:	9809      	ldr	r0, [sp, #36]	; 0x24
 44a:	f361 001e 	bfi	r0, r1, #0, #31
 44e:	9009      	str	r0, [sp, #36]	; 0x24
 450:	4619      	mov	r1, r3
 452:	4628      	mov	r0, r5
 454:	f7ff fffe 	bl	0 <__aeabi_dcmpun>
 458:	b9e0      	cbnz	r0, 494 <__muldc3+0x494>
 45a:	9e02      	ldr	r6, [sp, #8]
 45c:	463b      	mov	r3, r7
 45e:	4632      	mov	r2, r6
 460:	4630      	mov	r0, r6
 462:	4639      	mov	r1, r7
 464:	f7ff fffe 	bl	0 <__aeabi_dcmpun>
 468:	2800      	cmp	r0, #0
 46a:	f43f af4d 	beq.w	308 <__muldc3+0x308>
 46e:	2300      	movs	r3, #0
 470:	f007 4700 	and.w	r7, r7, #2147483648	; 0x80000000
 474:	9302      	str	r3, [sp, #8]
 476:	e747      	b.n	308 <__muldc3+0x308>
 478:	9b09      	ldr	r3, [sp, #36]	; 0x24
 47a:	f003 4300 	and.w	r3, r3, #2147483648	; 0x80000000
 47e:	9309      	str	r3, [sp, #36]	; 0x24
 480:	2300      	movs	r3, #0
 482:	9308      	str	r3, [sp, #32]
 484:	2301      	movs	r3, #1
 486:	9311      	str	r3, [sp, #68]	; 0x44
 488:	e676      	b.n	178 <__muldc3+0x178>
 48a:	f04f 0a00 	mov.w	sl, #0
 48e:	f00b 4b00 	and.w	fp, fp, #2147483648	; 0x80000000
 492:	e7a7      	b.n	3e4 <__muldc3+0x3e4>
 494:	9b03      	ldr	r3, [sp, #12]
 496:	2500      	movs	r5, #0
 498:	f003 4300 	and.w	r3, r3, #2147483648	; 0x80000000
 49c:	9303      	str	r3, [sp, #12]
 49e:	e7dc      	b.n	45a <__muldc3+0x45a>
 4a0:	2300      	movs	r3, #0
 4a2:	9308      	str	r3, [sp, #32]
 4a4:	9b09      	ldr	r3, [sp, #36]	; 0x24
 4a6:	f003 4300 	and.w	r3, r3, #2147483648	; 0x80000000
 4aa:	9309      	str	r3, [sp, #36]	; 0x24
 4ac:	e72c      	b.n	308 <__muldc3+0x308>
 4ae:	f04f 0a00 	mov.w	sl, #0
 4b2:	f00b 4b00 	and.w	fp, fp, #2147483648	; 0x80000000
 4b6:	e71c      	b.n	2f2 <__muldc3+0x2f2>
 4b8:	2300      	movs	r3, #0
 4ba:	f007 4700 	and.w	r7, r7, #2147483648	; 0x80000000
 4be:	9302      	str	r3, [sp, #8]
 4c0:	e70e      	b.n	2e0 <__muldc3+0x2e0>
 4c2:	9b03      	ldr	r3, [sp, #12]
 4c4:	2500      	movs	r5, #0
 4c6:	f003 4300 	and.w	r3, r3, #2147483648	; 0x80000000
 4ca:	9303      	str	r3, [sp, #12]
 4cc:	e6fe      	b.n	2cc <__muldc3+0x2cc>
 4ce:	bf00      	nop
 4d0:	7fefffff 	.word	0x7fefffff

mulsc3.o:     file format elf32-littlearm

SYMBOL TABLE:
00000000 l    df *ABS*	00000000 mulsc3.c
00000000 l    d  .text	00000000 .text
00000000 l    d  .data	00000000 .data
00000000 l    d  .bss	00000000 .bss
00000000 l    d  .text.__mulsc3	00000000 .text.__mulsc3
00000000 l    d  .comment	00000000 .comment
00000000 l    d  .ARM.attributes	00000000 .ARM.attributes
00000000         *UND*	00000000 __aeabi_fmul
00000000         *UND*	00000000 __aeabi_fsub
00000000         *UND*	00000000 __aeabi_fadd
00000000         *UND*	00000000 __aeabi_fcmpun
00000000         *UND*	00000000 __aeabi_fcmple
00000000         *UND*	00000000 __aeabi_i2f
00000000 g     F .text.__mulsc3	00000328 .hidden __mulsc3



Disassembly of section .text.__mulsc3:

00000000 <__mulsc3>:
__mulsc3():
   0:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
   4:	460f      	mov	r7, r1
   6:	b087      	sub	sp, #28
   8:	4619      	mov	r1, r3
   a:	4683      	mov	fp, r0
   c:	4638      	mov	r0, r7
   e:	4615      	mov	r5, r2
  10:	461e      	mov	r6, r3
  12:	f7ff fffe 	bl	0 <__aeabi_fmul>
  16:	9910      	ldr	r1, [sp, #64]	; 0x40
  18:	4681      	mov	r9, r0
  1a:	4628      	mov	r0, r5
  1c:	f7ff fffe 	bl	0 <__aeabi_fmul>
  20:	9910      	ldr	r1, [sp, #64]	; 0x40
  22:	4682      	mov	sl, r0
  24:	4638      	mov	r0, r7
  26:	f7ff fffe 	bl	0 <__aeabi_fmul>
  2a:	4629      	mov	r1, r5
  2c:	9000      	str	r0, [sp, #0]
  2e:	4630      	mov	r0, r6
  30:	f7ff fffe 	bl	0 <__aeabi_fmul>
  34:	4651      	mov	r1, sl
  36:	4680      	mov	r8, r0
  38:	9001      	str	r0, [sp, #4]
  3a:	4648      	mov	r0, r9
  3c:	f7ff fffe 	bl	0 <__aeabi_fsub>
  40:	4641      	mov	r1, r8
  42:	4604      	mov	r4, r0
  44:	9800      	ldr	r0, [sp, #0]
  46:	f7ff fffe 	bl	0 <__aeabi_fadd>
  4a:	4621      	mov	r1, r4
  4c:	4680      	mov	r8, r0
  4e:	4620      	mov	r0, r4
  50:	f7ff fffe 	bl	0 <__aeabi_fcmpun>
  54:	b938      	cbnz	r0, 66 <__mulsc3+0x66>
  56:	4658      	mov	r0, fp
  58:	f8cb 4000 	str.w	r4, [fp]
  5c:	f8cb 8004 	str.w	r8, [fp, #4]
  60:	b007      	add	sp, #28
  62:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
  66:	4641      	mov	r1, r8
  68:	4640      	mov	r0, r8
  6a:	f7ff fffe 	bl	0 <__aeabi_fcmpun>
  6e:	2800      	cmp	r0, #0
  70:	d0f1      	beq.n	56 <__mulsc3+0x56>
  72:	f04f 0201 	mov.w	r2, #1
  76:	f027 4300 	bic.w	r3, r7, #2147483648	; 0x80000000
  7a:	4618      	mov	r0, r3
  7c:	49a2      	ldr	r1, [pc, #648]	; (308 <__mulsc3+0x308>)
  7e:	9302      	str	r3, [sp, #8]
  80:	f88d 200c 	strb.w	r2, [sp, #12]
  84:	f7ff fffe 	bl	0 <__aeabi_fcmpun>
  88:	b930      	cbnz	r0, 98 <__mulsc3+0x98>
  8a:	499f      	ldr	r1, [pc, #636]	; (308 <__mulsc3+0x308>)
  8c:	9802      	ldr	r0, [sp, #8]
  8e:	f7ff fffe 	bl	0 <__aeabi_fcmple>
  92:	b908      	cbnz	r0, 98 <__mulsc3+0x98>
  94:	f88d 000c 	strb.w	r0, [sp, #12]
  98:	f89d 300c 	ldrb.w	r3, [sp, #12]
  9c:	499a      	ldr	r1, [pc, #616]	; (308 <__mulsc3+0x308>)
  9e:	f083 0301 	eor.w	r3, r3, #1
  a2:	b2db      	uxtb	r3, r3
  a4:	9304      	str	r3, [sp, #16]
  a6:	9802      	ldr	r0, [sp, #8]
  a8:	f025 4300 	bic.w	r3, r5, #2147483648	; 0x80000000
  ac:	9303      	str	r3, [sp, #12]
  ae:	f7ff fffe 	bl	0 <__aeabi_fcmpun>
  b2:	b930      	cbnz	r0, c2 <__mulsc3+0xc2>
  b4:	9802      	ldr	r0, [sp, #8]
  b6:	4994      	ldr	r1, [pc, #592]	; (308 <__mulsc3+0x308>)
  b8:	f7ff fffe 	bl	0 <__aeabi_fcmple>
  bc:	2800      	cmp	r0, #0
  be:	f000 80bd 	beq.w	23c <__mulsc3+0x23c>
  c2:	4991      	ldr	r1, [pc, #580]	; (308 <__mulsc3+0x308>)
  c4:	9803      	ldr	r0, [sp, #12]
  c6:	f7ff fffe 	bl	0 <__aeabi_fcmpun>
  ca:	b930      	cbnz	r0, da <__mulsc3+0xda>
  cc:	498e      	ldr	r1, [pc, #568]	; (308 <__mulsc3+0x308>)
  ce:	9803      	ldr	r0, [sp, #12]
  d0:	f7ff fffe 	bl	0 <__aeabi_fcmple>
  d4:	2800      	cmp	r0, #0
  d6:	f000 80b1 	beq.w	23c <__mulsc3+0x23c>
  da:	2300      	movs	r3, #0
  dc:	9305      	str	r3, [sp, #20]
  de:	f04f 0201 	mov.w	r2, #1
  e2:	f026 4300 	bic.w	r3, r6, #2147483648	; 0x80000000
  e6:	4618      	mov	r0, r3
  e8:	4987      	ldr	r1, [pc, #540]	; (308 <__mulsc3+0x308>)
  ea:	9302      	str	r3, [sp, #8]
  ec:	f88d 200c 	strb.w	r2, [sp, #12]
  f0:	f7ff fffe 	bl	0 <__aeabi_fcmpun>
  f4:	b930      	cbnz	r0, 104 <__mulsc3+0x104>
  f6:	4984      	ldr	r1, [pc, #528]	; (308 <__mulsc3+0x308>)
  f8:	9802      	ldr	r0, [sp, #8]
  fa:	f7ff fffe 	bl	0 <__aeabi_fcmple>
  fe:	b908      	cbnz	r0, 104 <__mulsc3+0x104>
 100:	f88d 000c 	strb.w	r0, [sp, #12]
 104:	f89d 300c 	ldrb.w	r3, [sp, #12]
 108:	497f      	ldr	r1, [pc, #508]	; (308 <__mulsc3+0x308>)
 10a:	f083 0301 	eor.w	r3, r3, #1
 10e:	b2db      	uxtb	r3, r3
 110:	9304      	str	r3, [sp, #16]
 112:	9b10      	ldr	r3, [sp, #64]	; 0x40
 114:	9802      	ldr	r0, [sp, #8]
 116:	f023 4300 	bic.w	r3, r3, #2147483648	; 0x80000000
 11a:	9303      	str	r3, [sp, #12]
 11c:	f7ff fffe 	bl	0 <__aeabi_fcmpun>
 120:	b930      	cbnz	r0, 130 <__mulsc3+0x130>
 122:	9802      	ldr	r0, [sp, #8]
 124:	4978      	ldr	r1, [pc, #480]	; (308 <__mulsc3+0x308>)
 126:	f7ff fffe 	bl	0 <__aeabi_fcmple>
 12a:	2800      	cmp	r0, #0
 12c:	f000 80b3 	beq.w	296 <__mulsc3+0x296>
 130:	4975      	ldr	r1, [pc, #468]	; (308 <__mulsc3+0x308>)
 132:	9803      	ldr	r0, [sp, #12]
 134:	f7ff fffe 	bl	0 <__aeabi_fcmpun>
 138:	b930      	cbnz	r0, 148 <__mulsc3+0x148>
 13a:	4973      	ldr	r1, [pc, #460]	; (308 <__mulsc3+0x308>)
 13c:	9803      	ldr	r0, [sp, #12]
 13e:	f7ff fffe 	bl	0 <__aeabi_fcmple>
 142:	2800      	cmp	r0, #0
 144:	f000 80a7 	beq.w	296 <__mulsc3+0x296>
 148:	9b05      	ldr	r3, [sp, #20]
 14a:	2b00      	cmp	r3, #0
 14c:	d151      	bne.n	1f2 <__mulsc3+0x1f2>
 14e:	f029 4900 	bic.w	r9, r9, #2147483648	; 0x80000000
 152:	4648      	mov	r0, r9
 154:	496c      	ldr	r1, [pc, #432]	; (308 <__mulsc3+0x308>)
 156:	f7ff fffe 	bl	0 <__aeabi_fcmpun>
 15a:	b920      	cbnz	r0, 166 <__mulsc3+0x166>
 15c:	4648      	mov	r0, r9
 15e:	496a      	ldr	r1, [pc, #424]	; (308 <__mulsc3+0x308>)
 160:	f7ff fffe 	bl	0 <__aeabi_fcmple>
 164:	b348      	cbz	r0, 1ba <__mulsc3+0x1ba>
 166:	f02a 4900 	bic.w	r9, sl, #2147483648	; 0x80000000
 16a:	4648      	mov	r0, r9
 16c:	4966      	ldr	r1, [pc, #408]	; (308 <__mulsc3+0x308>)
 16e:	f7ff fffe 	bl	0 <__aeabi_fcmpun>
 172:	b920      	cbnz	r0, 17e <__mulsc3+0x17e>
 174:	4648      	mov	r0, r9
 176:	4964      	ldr	r1, [pc, #400]	; (308 <__mulsc3+0x308>)
 178:	f7ff fffe 	bl	0 <__aeabi_fcmple>
 17c:	b1e8      	cbz	r0, 1ba <__mulsc3+0x1ba>
 17e:	9b00      	ldr	r3, [sp, #0]
 180:	4961      	ldr	r1, [pc, #388]	; (308 <__mulsc3+0x308>)
 182:	f023 4a00 	bic.w	sl, r3, #2147483648	; 0x80000000
 186:	4650      	mov	r0, sl
 188:	f7ff fffe 	bl	0 <__aeabi_fcmpun>
 18c:	b920      	cbnz	r0, 198 <__mulsc3+0x198>
 18e:	4650      	mov	r0, sl
 190:	495d      	ldr	r1, [pc, #372]	; (308 <__mulsc3+0x308>)
 192:	f7ff fffe 	bl	0 <__aeabi_fcmple>
 196:	b180      	cbz	r0, 1ba <__mulsc3+0x1ba>
 198:	9b01      	ldr	r3, [sp, #4]
 19a:	495b      	ldr	r1, [pc, #364]	; (308 <__mulsc3+0x308>)
 19c:	f023 4900 	bic.w	r9, r3, #2147483648	; 0x80000000
 1a0:	4648      	mov	r0, r9
 1a2:	f7ff fffe 	bl	0 <__aeabi_fcmpun>
 1a6:	2800      	cmp	r0, #0
 1a8:	f47f af55 	bne.w	56 <__mulsc3+0x56>
 1ac:	4648      	mov	r0, r9
 1ae:	4956      	ldr	r1, [pc, #344]	; (308 <__mulsc3+0x308>)
 1b0:	f7ff fffe 	bl	0 <__aeabi_fcmple>
 1b4:	2800      	cmp	r0, #0
 1b6:	f47f af4e 	bne.w	56 <__mulsc3+0x56>
 1ba:	4639      	mov	r1, r7
 1bc:	4638      	mov	r0, r7
 1be:	f7ff fffe 	bl	0 <__aeabi_fcmpun>
 1c2:	2800      	cmp	r0, #0
 1c4:	f040 80ad 	bne.w	322 <__mulsc3+0x322>
 1c8:	4629      	mov	r1, r5
 1ca:	4628      	mov	r0, r5
 1cc:	f7ff fffe 	bl	0 <__aeabi_fcmpun>
 1d0:	2800      	cmp	r0, #0
 1d2:	f040 80a3 	bne.w	31c <__mulsc3+0x31c>
 1d6:	4631      	mov	r1, r6
 1d8:	4630      	mov	r0, r6
 1da:	f7ff fffe 	bl	0 <__aeabi_fcmpun>
 1de:	2800      	cmp	r0, #0
 1e0:	f040 8099 	bne.w	316 <__mulsc3+0x316>
 1e4:	9910      	ldr	r1, [sp, #64]	; 0x40
 1e6:	4608      	mov	r0, r1
 1e8:	f7ff fffe 	bl	0 <__aeabi_fcmpun>
 1ec:	2800      	cmp	r0, #0
 1ee:	f040 808d 	bne.w	30c <__mulsc3+0x30c>
 1f2:	4631      	mov	r1, r6
 1f4:	4638      	mov	r0, r7
 1f6:	f7ff fffe 	bl	0 <__aeabi_fmul>
 1fa:	9910      	ldr	r1, [sp, #64]	; 0x40
 1fc:	4604      	mov	r4, r0
 1fe:	4628      	mov	r0, r5
 200:	f7ff fffe 	bl	0 <__aeabi_fmul>
 204:	4601      	mov	r1, r0
 206:	4620      	mov	r0, r4
 208:	f7ff fffe 	bl	0 <__aeabi_fsub>
 20c:	f04f 41ff 	mov.w	r1, #2139095040	; 0x7f800000
 210:	f7ff fffe 	bl	0 <__aeabi_fmul>
 214:	9910      	ldr	r1, [sp, #64]	; 0x40
 216:	4604      	mov	r4, r0
 218:	4638      	mov	r0, r7
 21a:	f7ff fffe 	bl	0 <__aeabi_fmul>
 21e:	4631      	mov	r1, r6
 220:	4607      	mov	r7, r0
 222:	4628      	mov	r0, r5
 224:	f7ff fffe 	bl	0 <__aeabi_fmul>
 228:	4601      	mov	r1, r0
 22a:	4638      	mov	r0, r7
 22c:	f7ff fffe 	bl	0 <__aeabi_fadd>
 230:	f04f 41ff 	mov.w	r1, #2139095040	; 0x7f800000
 234:	f7ff fffe 	bl	0 <__aeabi_fmul>
 238:	4680      	mov	r8, r0
 23a:	e70c      	b.n	56 <__mulsc3+0x56>
 23c:	9804      	ldr	r0, [sp, #16]
 23e:	f7ff fffe 	bl	0 <__aeabi_i2f>
 242:	f04f 0301 	mov.w	r3, #1
 246:	f360 071e 	bfi	r7, r0, #0, #31
 24a:	492f      	ldr	r1, [pc, #188]	; (308 <__mulsc3+0x308>)
 24c:	9803      	ldr	r0, [sp, #12]
 24e:	f88d 3008 	strb.w	r3, [sp, #8]
 252:	f7ff fffe 	bl	0 <__aeabi_fcmpun>
 256:	b930      	cbnz	r0, 266 <__mulsc3+0x266>
 258:	9803      	ldr	r0, [sp, #12]
 25a:	492b      	ldr	r1, [pc, #172]	; (308 <__mulsc3+0x308>)
 25c:	f7ff fffe 	bl	0 <__aeabi_fcmple>
 260:	b908      	cbnz	r0, 266 <__mulsc3+0x266>
 262:	f88d 0008 	strb.w	r0, [sp, #8]
 266:	f89d 3008 	ldrb.w	r3, [sp, #8]
 26a:	f083 0001 	eor.w	r0, r3, #1
 26e:	f000 0001 	and.w	r0, r0, #1
 272:	f7ff fffe 	bl	0 <__aeabi_i2f>
 276:	4631      	mov	r1, r6
 278:	f360 051e 	bfi	r5, r0, #0, #31
 27c:	4630      	mov	r0, r6
 27e:	f7ff fffe 	bl	0 <__aeabi_fcmpun>
 282:	2800      	cmp	r0, #0
 284:	d13a      	bne.n	2fc <__mulsc3+0x2fc>
 286:	9910      	ldr	r1, [sp, #64]	; 0x40
 288:	4608      	mov	r0, r1
 28a:	f7ff fffe 	bl	0 <__aeabi_fcmpun>
 28e:	bb70      	cbnz	r0, 2ee <__mulsc3+0x2ee>
 290:	2301      	movs	r3, #1
 292:	9305      	str	r3, [sp, #20]
 294:	e723      	b.n	de <__mulsc3+0xde>
 296:	9804      	ldr	r0, [sp, #16]
 298:	f7ff fffe 	bl	0 <__aeabi_i2f>
 29c:	f8dd 800c 	ldr.w	r8, [sp, #12]
 2a0:	f360 061e 	bfi	r6, r0, #0, #31
 2a4:	4918      	ldr	r1, [pc, #96]	; (308 <__mulsc3+0x308>)
 2a6:	4640      	mov	r0, r8
 2a8:	f04f 0401 	mov.w	r4, #1
 2ac:	f7ff fffe 	bl	0 <__aeabi_fcmpun>
 2b0:	b928      	cbnz	r0, 2be <__mulsc3+0x2be>
 2b2:	4640      	mov	r0, r8
 2b4:	4914      	ldr	r1, [pc, #80]	; (308 <__mulsc3+0x308>)
 2b6:	f7ff fffe 	bl	0 <__aeabi_fcmple>
 2ba:	b900      	cbnz	r0, 2be <__mulsc3+0x2be>
 2bc:	4604      	mov	r4, r0
 2be:	f084 0001 	eor.w	r0, r4, #1
 2c2:	f000 0001 	and.w	r0, r0, #1
 2c6:	f7ff fffe 	bl	0 <__aeabi_i2f>
 2ca:	9b10      	ldr	r3, [sp, #64]	; 0x40
 2cc:	4639      	mov	r1, r7
 2ce:	f360 031e 	bfi	r3, r0, #0, #31
 2d2:	4638      	mov	r0, r7
 2d4:	9310      	str	r3, [sp, #64]	; 0x40
 2d6:	f7ff fffe 	bl	0 <__aeabi_fcmpun>
 2da:	b990      	cbnz	r0, 302 <__mulsc3+0x302>
 2dc:	4629      	mov	r1, r5
 2de:	4628      	mov	r0, r5
 2e0:	f7ff fffe 	bl	0 <__aeabi_fcmpun>
 2e4:	2800      	cmp	r0, #0
 2e6:	d084      	beq.n	1f2 <__mulsc3+0x1f2>
 2e8:	f36f 051e 	bfc	r5, #0, #31
 2ec:	e781      	b.n	1f2 <__mulsc3+0x1f2>
 2ee:	9b10      	ldr	r3, [sp, #64]	; 0x40
 2f0:	f36f 031e 	bfc	r3, #0, #31
 2f4:	9310      	str	r3, [sp, #64]	; 0x40
 2f6:	2301      	movs	r3, #1
 2f8:	9305      	str	r3, [sp, #20]
 2fa:	e6f0      	b.n	de <__mulsc3+0xde>
 2fc:	f36f 061e 	bfc	r6, #0, #31
 300:	e7c1      	b.n	286 <__mulsc3+0x286>
 302:	f36f 071e 	bfc	r7, #0, #31
 306:	e7e9      	b.n	2dc <__mulsc3+0x2dc>
 308:	7f7fffff 	.word	0x7f7fffff
 30c:	9b10      	ldr	r3, [sp, #64]	; 0x40
 30e:	f36f 031e 	bfc	r3, #0, #31
 312:	9310      	str	r3, [sp, #64]	; 0x40
 314:	e76d      	b.n	1f2 <__mulsc3+0x1f2>
 316:	f36f 061e 	bfc	r6, #0, #31
 31a:	e763      	b.n	1e4 <__mulsc3+0x1e4>
 31c:	f36f 051e 	bfc	r5, #0, #31
 320:	e759      	b.n	1d6 <__mulsc3+0x1d6>
 322:	f36f 071e 	bfc	r7, #0, #31
 326:	e74f      	b.n	1c8 <__mulsc3+0x1c8>

mulvdi3.o:     file format elf32-littlearm

SYMBOL TABLE:
00000000 l    df *ABS*	00000000 mulvdi3.c
00000000 l    d  .text	00000000 .text
00000000 l    d  .data	00000000 .data
00000000 l    d  .bss	00000000 .bss
00000000 l    d  .text.__mulvdi3	00000000 .text.__mulvdi3
00000000 l       .rodata.__mulvdi3.str1.4	00000000 .LC0
00000000 l    d  .rodata.__func__.3742	00000000 .rodata.__func__.3742
00000000 l     O .rodata.__func__.3742	0000000a __func__.3742
00000000 l    d  .rodata.__mulvdi3.str1.4	00000000 .rodata.__mulvdi3.str1.4
00000000 l    d  .comment	00000000 .comment
00000000 l    d  .ARM.attributes	00000000 .ARM.attributes
00000000         *UND*	00000000 __aeabi_ldivmod
00000000 g     F .text.__mulvdi3	00000130 .hidden __mulvdi3
00000000         *UND*	00000000 __compilerrt_abort_impl



Disassembly of section .text.__mulvdi3:

00000000 <__mulvdi3>:
__mulvdi3():
   0:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
   4:	460d      	mov	r5, r1
   6:	f04f 4100 	mov.w	r1, #2147483648	; 0x80000000
   a:	4604      	mov	r4, r0
   c:	2000      	movs	r0, #0
   e:	428d      	cmp	r5, r1
  10:	bf08      	it	eq
  12:	4284      	cmpeq	r4, r0
  14:	b085      	sub	sp, #20
  16:	4616      	mov	r6, r2
  18:	461f      	mov	r7, r3
  1a:	d047      	beq.n	ac <__mulvdi3+0xac>
  1c:	428b      	cmp	r3, r1
  1e:	bf08      	it	eq
  20:	4282      	cmpeq	r2, r0
  22:	d03a      	beq.n	9a <__mulvdi3+0x9a>
  24:	ea4f 78e5 	mov.w	r8, r5, asr #31
  28:	ea84 0208 	eor.w	r2, r4, r8
  2c:	ebb2 0208 	subs.w	r2, r2, r8
  30:	ea85 0308 	eor.w	r3, r5, r8
  34:	eb63 0308 	sbc.w	r3, r3, r8
  38:	2a02      	cmp	r2, #2
  3a:	e9cd 2300 	strd	r2, r3, [sp]
  3e:	f173 0300 	sbcs.w	r3, r3, #0
  42:	db20      	blt.n	86 <__mulvdi3+0x86>
  44:	ea4f 7ae7 	mov.w	sl, r7, asr #31
  48:	ea86 020a 	eor.w	r2, r6, sl
  4c:	ebb2 020a 	subs.w	r2, r2, sl
  50:	ea87 030a 	eor.w	r3, r7, sl
  54:	eb63 030a 	sbc.w	r3, r3, sl
  58:	2a02      	cmp	r2, #2
  5a:	e9cd 2302 	strd	r2, r3, [sp, #8]
  5e:	f173 0300 	sbcs.w	r3, r3, #0
  62:	db10      	blt.n	86 <__mulvdi3+0x86>
  64:	e9dd 2302 	ldrd	r2, r3, [sp, #8]
  68:	45d0      	cmp	r8, sl
  6a:	bf08      	it	eq
  6c:	45d0      	cmpeq	r8, sl
  6e:	d026      	beq.n	be <__mulvdi3+0xbe>
  70:	4252      	negs	r2, r2
  72:	eb63 0343 	sbc.w	r3, r3, r3, lsl #1
  76:	f7ff fffe 	bl	0 <__aeabi_ldivmod>
  7a:	e9dd 2300 	ldrd	r2, r3, [sp]
  7e:	4290      	cmp	r0, r2
  80:	eb71 0303 	sbcs.w	r3, r1, r3
  84:	db2e      	blt.n	e4 <__mulvdi3+0xe4>
  86:	fb04 f307 	mul.w	r3, r4, r7
  8a:	fba4 0106 	umull	r0, r1, r4, r6
  8e:	fb06 3305 	mla	r3, r6, r5, r3
  92:	4419      	add	r1, r3
  94:	b005      	add	sp, #20
  96:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
  9a:	2d00      	cmp	r5, #0
  9c:	bf08      	it	eq
  9e:	2c02      	cmpeq	r4, #2
  a0:	d227      	bcs.n	f2 <__mulvdi3+0xf2>
  a2:	2000      	movs	r0, #0
  a4:	07e1      	lsls	r1, r4, #31
  a6:	b005      	add	sp, #20
  a8:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
  ac:	2b00      	cmp	r3, #0
  ae:	bf08      	it	eq
  b0:	2a02      	cmpeq	r2, #2
  b2:	d225      	bcs.n	100 <__mulvdi3+0x100>
  b4:	2000      	movs	r0, #0
  b6:	07d1      	lsls	r1, r2, #31
  b8:	b005      	add	sp, #20
  ba:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
  be:	f04f 30ff 	mov.w	r0, #4294967295	; 0xffffffff
  c2:	f06f 4100 	mvn.w	r1, #2147483648	; 0x80000000
  c6:	f7ff fffe 	bl	0 <__aeabi_ldivmod>
  ca:	e9dd 2300 	ldrd	r2, r3, [sp]
  ce:	4290      	cmp	r0, r2
  d0:	eb71 0303 	sbcs.w	r3, r1, r3
  d4:	dad7      	bge.n	86 <__mulvdi3+0x86>
  d6:	4a0e      	ldr	r2, [pc, #56]	; (110 <__mulvdi3+0x110>)
  d8:	480e      	ldr	r0, [pc, #56]	; (114 <__mulvdi3+0x114>)
  da:	447a      	add	r2, pc
  dc:	2130      	movs	r1, #48	; 0x30
  de:	4478      	add	r0, pc
  e0:	f7ff fffe 	bl	0 <__compilerrt_abort_impl>
  e4:	4a0c      	ldr	r2, [pc, #48]	; (118 <__mulvdi3+0x118>)
  e6:	480d      	ldr	r0, [pc, #52]	; (11c <__mulvdi3+0x11c>)
  e8:	447a      	add	r2, pc
  ea:	2135      	movs	r1, #53	; 0x35
  ec:	4478      	add	r0, pc
  ee:	f7ff fffe 	bl	0 <__compilerrt_abort_impl>
  f2:	4a0b      	ldr	r2, [pc, #44]	; (120 <__mulvdi3+0x120>)
  f4:	480b      	ldr	r0, [pc, #44]	; (124 <__mulvdi3+0x124>)
  f6:	447a      	add	r2, pc
  f8:	2125      	movs	r1, #37	; 0x25
  fa:	4478      	add	r0, pc
  fc:	f7ff fffe 	bl	0 <__compilerrt_abort_impl>
 100:	4a09      	ldr	r2, [pc, #36]	; (128 <__mulvdi3+0x128>)
 102:	480a      	ldr	r0, [pc, #40]	; (12c <__mulvdi3+0x12c>)
 104:	447a      	add	r2, pc
 106:	211f      	movs	r1, #31
 108:	4478      	add	r0, pc
 10a:	f7ff fffe 	bl	0 <__compilerrt_abort_impl>
 10e:	bf00      	nop
 110:	00000032 	.word	0x00000032
 114:	00000032 	.word	0x00000032
 118:	0000002c 	.word	0x0000002c
 11c:	0000002c 	.word	0x0000002c
 120:	00000026 	.word	0x00000026
 124:	00000026 	.word	0x00000026
 128:	00000020 	.word	0x00000020
 12c:	00000020 	.word	0x00000020

mulvsi3.o:     file format elf32-littlearm

SYMBOL TABLE:
00000000 l    df *ABS*	00000000 mulvsi3.c
00000000 l    d  .text	00000000 .text
00000000 l    d  .data	00000000 .data
00000000 l    d  .bss	00000000 .bss
00000000 l    d  .text.__mulvsi3	00000000 .text.__mulvsi3
00000000 l       .rodata.__mulvsi3.str1.4	00000000 .LC0
00000000 l    d  .rodata.__func__.3742	00000000 .rodata.__func__.3742
00000000 l     O .rodata.__func__.3742	0000000a __func__.3742
00000000 l    d  .rodata.__mulvsi3.str1.4	00000000 .rodata.__mulvsi3.str1.4
00000000 l    d  .comment	00000000 .comment
00000000 l    d  .ARM.attributes	00000000 .ARM.attributes
00000000 g     F .text.__mulvsi3	000000b4 .hidden __mulvsi3
00000000         *UND*	00000000 __compilerrt_abort_impl



Disassembly of section .text.__mulvsi3:

00000000 <__mulvsi3>:
__mulvsi3():
   0:	f1b0 4f00 	cmp.w	r0, #2147483648	; 0x80000000
   4:	b538      	push	{r3, r4, r5, lr}
   6:	d01e      	beq.n	46 <__mulvsi3+0x46>
   8:	f1b1 4f00 	cmp.w	r1, #2147483648	; 0x80000000
   c:	d017      	beq.n	3e <__mulvsi3+0x3e>
   e:	17c4      	asrs	r4, r0, #31
  10:	ea80 0304 	eor.w	r3, r0, r4
  14:	1b1b      	subs	r3, r3, r4
  16:	2b01      	cmp	r3, #1
  18:	dd0e      	ble.n	38 <__mulvsi3+0x38>
  1a:	17cd      	asrs	r5, r1, #31
  1c:	ea81 0205 	eor.w	r2, r1, r5
  20:	1b52      	subs	r2, r2, r5
  22:	2a01      	cmp	r2, #1
  24:	dd08      	ble.n	38 <__mulvsi3+0x38>
  26:	42ac      	cmp	r4, r5
  28:	d011      	beq.n	4e <__mulvsi3+0x4e>
  2a:	f04f 4400 	mov.w	r4, #2147483648	; 0x80000000
  2e:	4252      	negs	r2, r2
  30:	fb94 f2f2 	sdiv	r2, r4, r2
  34:	429a      	cmp	r2, r3
  36:	db17      	blt.n	68 <__mulvsi3+0x68>
  38:	fb01 f000 	mul.w	r0, r1, r0
  3c:	bd38      	pop	{r3, r4, r5, pc}
  3e:	2801      	cmp	r0, #1
  40:	d819      	bhi.n	76 <__mulvsi3+0x76>
  42:	07c0      	lsls	r0, r0, #31
  44:	bd38      	pop	{r3, r4, r5, pc}
  46:	2901      	cmp	r1, #1
  48:	d81c      	bhi.n	84 <__mulvsi3+0x84>
  4a:	07c8      	lsls	r0, r1, #31
  4c:	bd38      	pop	{r3, r4, r5, pc}
  4e:	f06f 4400 	mvn.w	r4, #2147483648	; 0x80000000
  52:	fb94 f2f2 	sdiv	r2, r4, r2
  56:	429a      	cmp	r2, r3
  58:	daee      	bge.n	38 <__mulvsi3+0x38>
  5a:	4a0e      	ldr	r2, [pc, #56]	; (94 <__mulvsi3+0x94>)
  5c:	480e      	ldr	r0, [pc, #56]	; (98 <__mulvsi3+0x98>)
  5e:	447a      	add	r2, pc
  60:	2130      	movs	r1, #48	; 0x30
  62:	4478      	add	r0, pc
  64:	f7ff fffe 	bl	0 <__compilerrt_abort_impl>
  68:	4a0c      	ldr	r2, [pc, #48]	; (9c <__mulvsi3+0x9c>)
  6a:	480d      	ldr	r0, [pc, #52]	; (a0 <__mulvsi3+0xa0>)
  6c:	447a      	add	r2, pc
  6e:	2135      	movs	r1, #53	; 0x35
  70:	4478      	add	r0, pc
  72:	f7ff fffe 	bl	0 <__compilerrt_abort_impl>
  76:	4a0b      	ldr	r2, [pc, #44]	; (a4 <__mulvsi3+0xa4>)
  78:	480b      	ldr	r0, [pc, #44]	; (a8 <__mulvsi3+0xa8>)
  7a:	447a      	add	r2, pc
  7c:	2125      	movs	r1, #37	; 0x25
  7e:	4478      	add	r0, pc
  80:	f7ff fffe 	bl	0 <__compilerrt_abort_impl>
  84:	4a09      	ldr	r2, [pc, #36]	; (ac <__mulvsi3+0xac>)
  86:	480a      	ldr	r0, [pc, #40]	; (b0 <__mulvsi3+0xb0>)
  88:	447a      	add	r2, pc
  8a:	211f      	movs	r1, #31
  8c:	4478      	add	r0, pc
  8e:	f7ff fffe 	bl	0 <__compilerrt_abort_impl>
  92:	bf00      	nop
  94:	00000032 	.word	0x00000032
  98:	00000032 	.word	0x00000032
  9c:	0000002c 	.word	0x0000002c
  a0:	0000002c 	.word	0x0000002c
  a4:	00000026 	.word	0x00000026
  a8:	00000026 	.word	0x00000026
  ac:	00000020 	.word	0x00000020
  b0:	00000020 	.word	0x00000020

mulvti3.o:     file format elf32-littlearm

SYMBOL TABLE:
00000000 l    df *ABS*	00000000 absvti2.c
00000000 l    d  .text	00000000 .text
00000000 l    d  .data	00000000 .data
00000000 l    d  .bss	00000000 .bss
00000000 l    d  .comment	00000000 .comment
00000000 l    d  .ARM.attributes	00000000 .ARM.attributes



mulxc3.o:     file format elf32-littlearm

SYMBOL TABLE:
00000000 l    df *ABS*	00000000 mulxc3.c
00000000 l    d  .text	00000000 .text
00000000 l    d  .data	00000000 .data
00000000 l    d  .bss	00000000 .bss
00000000 l    d  .text.__mulxc3	00000000 .text.__mulxc3
00000000 l    d  .comment	00000000 .comment
00000000 l    d  .ARM.attributes	00000000 .ARM.attributes
00000000         *UND*	00000000 __aeabi_dmul
00000000         *UND*	00000000 __aeabi_dsub
00000000         *UND*	00000000 __aeabi_dadd
00000000         *UND*	00000000 __aeabi_dcmpun
00000000         *UND*	00000000 __aeabi_dcmple
00000000         *UND*	00000000 __aeabi_i2d
00000000 g     F .text.__mulxc3	000004d4 .hidden __mulxc3



Disassembly of section .text.__mulxc3:

00000000 <__mulxc3>:
__mulxc3():
   0:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
   4:	4615      	mov	r5, r2
   6:	b093      	sub	sp, #76	; 0x4c
   8:	f8dd a078 	ldr.w	sl, [sp, #120]	; 0x78
   c:	f8dd b07c 	ldr.w	fp, [sp, #124]	; 0x7c
  10:	4619      	mov	r1, r3
  12:	4652      	mov	r2, sl
  14:	9303      	str	r3, [sp, #12]
  16:	4604      	mov	r4, r0
  18:	465b      	mov	r3, fp
  1a:	4628      	mov	r0, r5
  1c:	f7ff fffe 	bl	0 <__aeabi_dmul>
  20:	9f1c      	ldr	r7, [sp, #112]	; 0x70
  22:	4686      	mov	lr, r0
  24:	9702      	str	r7, [sp, #8]
  26:	4638      	mov	r0, r7
  28:	9f21      	ldr	r7, [sp, #132]	; 0x84
  2a:	468c      	mov	ip, r1
  2c:	463e      	mov	r6, r7
  2e:	9b20      	ldr	r3, [sp, #128]	; 0x80
  30:	9709      	str	r7, [sp, #36]	; 0x24
  32:	9f1d      	ldr	r7, [sp, #116]	; 0x74
  34:	4698      	mov	r8, r3
  36:	461a      	mov	r2, r3
  38:	9308      	str	r3, [sp, #32]
  3a:	4639      	mov	r1, r7
  3c:	4633      	mov	r3, r6
  3e:	46e1      	mov	r9, ip
  40:	f8cd e010 	str.w	lr, [sp, #16]
  44:	f8cd c028 	str.w	ip, [sp, #40]	; 0x28
  48:	f7ff fffe 	bl	0 <__aeabi_dmul>
  4c:	4686      	mov	lr, r0
  4e:	468c      	mov	ip, r1
  50:	4642      	mov	r2, r8
  52:	4633      	mov	r3, r6
  54:	4628      	mov	r0, r5
  56:	9903      	ldr	r1, [sp, #12]
  58:	46f0      	mov	r8, lr
  5a:	4666      	mov	r6, ip
  5c:	f8cd e02c 	str.w	lr, [sp, #44]	; 0x2c
  60:	f8cd c030 	str.w	ip, [sp, #48]	; 0x30
  64:	f7ff fffe 	bl	0 <__aeabi_dmul>
  68:	4686      	mov	lr, r0
  6a:	468c      	mov	ip, r1
  6c:	9a02      	ldr	r2, [sp, #8]
  6e:	463b      	mov	r3, r7
  70:	4650      	mov	r0, sl
  72:	4659      	mov	r1, fp
  74:	f8cd e014 	str.w	lr, [sp, #20]
  78:	f8cd c01c 	str.w	ip, [sp, #28]
  7c:	f7ff fffe 	bl	0 <__aeabi_dmul>
  80:	468c      	mov	ip, r1
  82:	4686      	mov	lr, r0
  84:	4642      	mov	r2, r8
  86:	4633      	mov	r3, r6
  88:	4649      	mov	r1, r9
  8a:	9804      	ldr	r0, [sp, #16]
  8c:	4666      	mov	r6, ip
  8e:	f8cd e018 	str.w	lr, [sp, #24]
  92:	f8cd c034 	str.w	ip, [sp, #52]	; 0x34
  96:	f7ff fffe 	bl	0 <__aeabi_dsub>
  9a:	4633      	mov	r3, r6
  9c:	4680      	mov	r8, r0
  9e:	e9dd 0205 	ldrd	r0, r2, [sp, #20]
  a2:	4689      	mov	r9, r1
  a4:	9907      	ldr	r1, [sp, #28]
  a6:	f7ff fffe 	bl	0 <__aeabi_dadd>
  aa:	4642      	mov	r2, r8
  ac:	e9cd 0100 	strd	r0, r1, [sp]
  b0:	464b      	mov	r3, r9
  b2:	4640      	mov	r0, r8
  b4:	4649      	mov	r1, r9
  b6:	f7ff fffe 	bl	0 <__aeabi_dcmpun>
  ba:	b948      	cbnz	r0, d0 <__mulxc3+0xd0>
  bc:	e9dd 2300 	ldrd	r2, r3, [sp]
  c0:	4620      	mov	r0, r4
  c2:	e9c4 8900 	strd	r8, r9, [r4]
  c6:	e9c4 2302 	strd	r2, r3, [r4, #8]
  ca:	b013      	add	sp, #76	; 0x4c
  cc:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
  d0:	e9dd 0100 	ldrd	r0, r1, [sp]
  d4:	4602      	mov	r2, r0
  d6:	460b      	mov	r3, r1
  d8:	f7ff fffe 	bl	0 <__aeabi_dcmpun>
  dc:	2800      	cmp	r0, #0
  de:	d0ed      	beq.n	bc <__mulxc3+0xbc>
  e0:	f04f 0c01 	mov.w	ip, #1
  e4:	9b03      	ldr	r3, [sp, #12]
  e6:	4628      	mov	r0, r5
  e8:	f023 4300 	bic.w	r3, r3, #2147483648	; 0x80000000
  ec:	461e      	mov	r6, r3
  ee:	930e      	str	r3, [sp, #56]	; 0x38
  f0:	4619      	mov	r1, r3
  f2:	f04f 32ff 	mov.w	r2, #4294967295	; 0xffffffff
  f6:	4b9f      	ldr	r3, [pc, #636]	; (374 <__mulxc3+0x374>)
  f8:	f88d c040 	strb.w	ip, [sp, #64]	; 0x40
  fc:	f7ff fffe 	bl	0 <__aeabi_dcmpun>
 100:	b948      	cbnz	r0, 116 <__mulxc3+0x116>
 102:	4628      	mov	r0, r5
 104:	4631      	mov	r1, r6
 106:	f04f 32ff 	mov.w	r2, #4294967295	; 0xffffffff
 10a:	4b9a      	ldr	r3, [pc, #616]	; (26c <__aeabi_dcmple+0x26c>)
 10c:	f7ff fffe 	bl	0 <__aeabi_dcmple>
 110:	b908      	cbnz	r0, 116 <__mulxc3+0x116>
 112:	f88d 0040 	strb.w	r0, [sp, #64]	; 0x40
 116:	f89d 3040 	ldrb.w	r3, [sp, #64]	; 0x40
 11a:	4628      	mov	r0, r5
 11c:	f083 0c01 	eor.w	ip, r3, #1
 120:	fa5f f68c 	uxtb.w	r6, ip
 124:	9611      	str	r6, [sp, #68]	; 0x44
 126:	990e      	ldr	r1, [sp, #56]	; 0x38
 128:	f027 4600 	bic.w	r6, r7, #2147483648	; 0x80000000
 12c:	f04f 32ff 	mov.w	r2, #4294967295	; 0xffffffff
 130:	4b90      	ldr	r3, [pc, #576]	; (374 <__mulxc3+0x374>)
 132:	9610      	str	r6, [sp, #64]	; 0x40
 134:	f7ff fffe 	bl	0 <__aeabi_dcmpun>
 138:	b948      	cbnz	r0, 14e <__mulxc3+0x14e>
 13a:	4628      	mov	r0, r5
 13c:	990e      	ldr	r1, [sp, #56]	; 0x38
 13e:	f04f 32ff 	mov.w	r2, #4294967295	; 0xffffffff
 142:	4b8c      	ldr	r3, [pc, #560]	; (234 <__aeabi_dcmple+0x234>)
 144:	f7ff fffe 	bl	0 <__aeabi_dcmple>
 148:	2800      	cmp	r0, #0
 14a:	f000 8117 	beq.w	37c <__mulxc3+0x37c>
 14e:	9e10      	ldr	r6, [sp, #64]	; 0x40
 150:	9802      	ldr	r0, [sp, #8]
 152:	4631      	mov	r1, r6
 154:	f04f 32ff 	mov.w	r2, #4294967295	; 0xffffffff
 158:	4b86      	ldr	r3, [pc, #536]	; (21c <__aeabi_dcmpun+0x21c>)
 15a:	f7ff fffe 	bl	0 <__aeabi_dcmpun>
 15e:	b948      	cbnz	r0, 174 <__mulxc3+0x174>
 160:	9802      	ldr	r0, [sp, #8]
 162:	4631      	mov	r1, r6
 164:	f04f 32ff 	mov.w	r2, #4294967295	; 0xffffffff
 168:	4b82      	ldr	r3, [pc, #520]	; (20c <__aeabi_dcmple+0x20c>)
 16a:	f7ff fffe 	bl	0 <__aeabi_dcmple>
 16e:	2800      	cmp	r0, #0
 170:	f000 8104 	beq.w	37c <__mulxc3+0x37c>
 174:	2300      	movs	r3, #0
 176:	9311      	str	r3, [sp, #68]	; 0x44
 178:	f04f 0c01 	mov.w	ip, #1
 17c:	f02b 4300 	bic.w	r3, fp, #2147483648	; 0x80000000
 180:	461e      	mov	r6, r3
 182:	930e      	str	r3, [sp, #56]	; 0x38
 184:	4619      	mov	r1, r3
 186:	4650      	mov	r0, sl
 188:	f04f 32ff 	mov.w	r2, #4294967295	; 0xffffffff
 18c:	4b79      	ldr	r3, [pc, #484]	; (374 <__mulxc3+0x374>)
 18e:	f88d c040 	strb.w	ip, [sp, #64]	; 0x40
 192:	f7ff fffe 	bl	0 <__aeabi_dcmpun>
 196:	b948      	cbnz	r0, 1ac <__mulxc3+0x1ac>
 198:	4650      	mov	r0, sl
 19a:	4631      	mov	r1, r6
 19c:	f04f 32ff 	mov.w	r2, #4294967295	; 0xffffffff
 1a0:	4b74      	ldr	r3, [pc, #464]	; (1d4 <__aeabi_dcmple+0x1d4>)
 1a2:	f7ff fffe 	bl	0 <__aeabi_dcmple>
 1a6:	b908      	cbnz	r0, 1ac <__mulxc3+0x1ac>
 1a8:	f88d 0040 	strb.w	r0, [sp, #64]	; 0x40
 1ac:	f89d 3040 	ldrb.w	r3, [sp, #64]	; 0x40
 1b0:	4650      	mov	r0, sl
 1b2:	f083 0c01 	eor.w	ip, r3, #1
 1b6:	fa5f f68c 	uxtb.w	r6, ip
 1ba:	9610      	str	r6, [sp, #64]	; 0x40
 1bc:	9e09      	ldr	r6, [sp, #36]	; 0x24
 1be:	990e      	ldr	r1, [sp, #56]	; 0x38
 1c0:	f04f 32ff 	mov.w	r2, #4294967295	; 0xffffffff
 1c4:	4b6b      	ldr	r3, [pc, #428]	; (374 <__mulxc3+0x374>)
 1c6:	f026 4600 	bic.w	r6, r6, #2147483648	; 0x80000000
 1ca:	f7ff fffe 	bl	0 <__aeabi_dcmpun>
 1ce:	b948      	cbnz	r0, 1e4 <__mulxc3+0x1e4>
 1d0:	4650      	mov	r0, sl
 1d2:	990e      	ldr	r1, [sp, #56]	; 0x38
 1d4:	f04f 32ff 	mov.w	r2, #4294967295	; 0xffffffff
 1d8:	4b66      	ldr	r3, [pc, #408]	; (19c <__aeabi_dcmple+0x19c>)
 1da:	f7ff fffe 	bl	0 <__aeabi_dcmple>
 1de:	2800      	cmp	r0, #0
 1e0:	f000 810d 	beq.w	3fe <__mulxc3+0x3fe>
 1e4:	9808      	ldr	r0, [sp, #32]
 1e6:	4631      	mov	r1, r6
 1e8:	f04f 32ff 	mov.w	r2, #4294967295	; 0xffffffff
 1ec:	4b61      	ldr	r3, [pc, #388]	; (188 <__aeabi_dcmpun+0x188>)
 1ee:	f7ff fffe 	bl	0 <__aeabi_dcmpun>
 1f2:	b948      	cbnz	r0, 208 <__mulxc3+0x208>
 1f4:	9808      	ldr	r0, [sp, #32]
 1f6:	4631      	mov	r1, r6
 1f8:	f04f 32ff 	mov.w	r2, #4294967295	; 0xffffffff
 1fc:	4b5d      	ldr	r3, [pc, #372]	; (178 <__aeabi_dcmple+0x178>)
 1fe:	f7ff fffe 	bl	0 <__aeabi_dcmple>
 202:	2800      	cmp	r0, #0
 204:	f000 80fb 	beq.w	3fe <__mulxc3+0x3fe>
 208:	9b11      	ldr	r3, [sp, #68]	; 0x44
 20a:	2b00      	cmp	r3, #0
 20c:	d17c      	bne.n	308 <__mulxc3+0x308>
 20e:	9b0a      	ldr	r3, [sp, #40]	; 0x28
 210:	9804      	ldr	r0, [sp, #16]
 212:	f023 4300 	bic.w	r3, r3, #2147483648	; 0x80000000
 216:	461e      	mov	r6, r3
 218:	4619      	mov	r1, r3
 21a:	f04f 32ff 	mov.w	r2, #4294967295	; 0xffffffff
 21e:	4b55      	ldr	r3, [pc, #340]	; (158 <__aeabi_dcmpun+0x158>)
 220:	f7ff fffe 	bl	0 <__aeabi_dcmpun>
 224:	b940      	cbnz	r0, 238 <__mulxc3+0x238>
 226:	9804      	ldr	r0, [sp, #16]
 228:	4631      	mov	r1, r6
 22a:	f04f 32ff 	mov.w	r2, #4294967295	; 0xffffffff
 22e:	4b51      	ldr	r3, [pc, #324]	; (148 <__aeabi_dcmple+0x148>)
 230:	f7ff fffe 	bl	0 <__aeabi_dcmple>
 234:	2800      	cmp	r0, #0
 236:	d03f      	beq.n	2b8 <__mulxc3+0x2b8>
 238:	e9dd 030b 	ldrd	r0, r3, [sp, #44]	; 0x2c
 23c:	f023 4300 	bic.w	r3, r3, #2147483648	; 0x80000000
 240:	461e      	mov	r6, r3
 242:	4619      	mov	r1, r3
 244:	f04f 32ff 	mov.w	r2, #4294967295	; 0xffffffff
 248:	4b4a      	ldr	r3, [pc, #296]	; (12c <__aeabi_dcmpun+0x12c>)
 24a:	f7ff fffe 	bl	0 <__aeabi_dcmpun>
 24e:	b938      	cbnz	r0, 260 <__mulxc3+0x260>
 250:	980b      	ldr	r0, [sp, #44]	; 0x2c
 252:	4631      	mov	r1, r6
 254:	f04f 32ff 	mov.w	r2, #4294967295	; 0xffffffff
 258:	4b46      	ldr	r3, [pc, #280]	; (11c <__aeabi_dcmple+0x11c>)
 25a:	f7ff fffe 	bl	0 <__aeabi_dcmple>
 25e:	b358      	cbz	r0, 2b8 <__mulxc3+0x2b8>
 260:	9b07      	ldr	r3, [sp, #28]
 262:	9805      	ldr	r0, [sp, #20]
 264:	f023 4300 	bic.w	r3, r3, #2147483648	; 0x80000000
 268:	461e      	mov	r6, r3
 26a:	4619      	mov	r1, r3
 26c:	f04f 32ff 	mov.w	r2, #4294967295	; 0xffffffff
 270:	4b40      	ldr	r3, [pc, #256]	; (104 <__aeabi_dcmpun+0x104>)
 272:	f7ff fffe 	bl	0 <__aeabi_dcmpun>
 276:	b938      	cbnz	r0, 288 <__mulxc3+0x288>
 278:	9805      	ldr	r0, [sp, #20]
 27a:	4631      	mov	r1, r6
 27c:	f04f 32ff 	mov.w	r2, #4294967295	; 0xffffffff
 280:	4b3c      	ldr	r3, [pc, #240]	; (f4 <__aeabi_dcmple+0xf4>)
 282:	f7ff fffe 	bl	0 <__aeabi_dcmple>
 286:	b1b8      	cbz	r0, 2b8 <__mulxc3+0x2b8>
 288:	9b0d      	ldr	r3, [sp, #52]	; 0x34
 28a:	9806      	ldr	r0, [sp, #24]
 28c:	f023 4300 	bic.w	r3, r3, #2147483648	; 0x80000000
 290:	461e      	mov	r6, r3
 292:	4619      	mov	r1, r3
 294:	f04f 32ff 	mov.w	r2, #4294967295	; 0xffffffff
 298:	4b36      	ldr	r3, [pc, #216]	; (dc <__aeabi_dcmpun+0xdc>)
 29a:	f7ff fffe 	bl	0 <__aeabi_dcmpun>
 29e:	2800      	cmp	r0, #0
 2a0:	f47f af0c 	bne.w	bc <__mulxc3+0xbc>
 2a4:	9806      	ldr	r0, [sp, #24]
 2a6:	4631      	mov	r1, r6
 2a8:	f04f 32ff 	mov.w	r2, #4294967295	; 0xffffffff
 2ac:	4b31      	ldr	r3, [pc, #196]	; (c8 <__aeabi_dcmple+0xc8>)
 2ae:	f7ff fffe 	bl	0 <__aeabi_dcmple>
 2b2:	2800      	cmp	r0, #0
 2b4:	f47f af02 	bne.w	bc <__mulxc3+0xbc>
 2b8:	9e03      	ldr	r6, [sp, #12]
 2ba:	462a      	mov	r2, r5
 2bc:	4628      	mov	r0, r5
 2be:	4633      	mov	r3, r6
 2c0:	4631      	mov	r1, r6
 2c2:	f7ff fffe 	bl	0 <__aeabi_dcmpun>
 2c6:	2800      	cmp	r0, #0
 2c8:	f040 80fb 	bne.w	4c2 <__mulxc3+0x4c2>
 2cc:	9e02      	ldr	r6, [sp, #8]
 2ce:	463b      	mov	r3, r7
 2d0:	4632      	mov	r2, r6
 2d2:	4630      	mov	r0, r6
 2d4:	4639      	mov	r1, r7
 2d6:	f7ff fffe 	bl	0 <__aeabi_dcmpun>
 2da:	2800      	cmp	r0, #0
 2dc:	f040 80ec 	bne.w	4b8 <__mulxc3+0x4b8>
 2e0:	4652      	mov	r2, sl
 2e2:	4650      	mov	r0, sl
 2e4:	465b      	mov	r3, fp
 2e6:	4659      	mov	r1, fp
 2e8:	f7ff fffe 	bl	0 <__aeabi_dcmpun>
 2ec:	2800      	cmp	r0, #0
 2ee:	f040 80de 	bne.w	4ae <__mulxc3+0x4ae>
 2f2:	9e08      	ldr	r6, [sp, #32]
 2f4:	4632      	mov	r2, r6
 2f6:	4630      	mov	r0, r6
 2f8:	9e09      	ldr	r6, [sp, #36]	; 0x24
 2fa:	4633      	mov	r3, r6
 2fc:	4631      	mov	r1, r6
 2fe:	f7ff fffe 	bl	0 <__aeabi_dcmpun>
 302:	2800      	cmp	r0, #0
 304:	f040 80cc 	bne.w	4a0 <__mulxc3+0x4a0>
 308:	4652      	mov	r2, sl
 30a:	4628      	mov	r0, r5
 30c:	465b      	mov	r3, fp
 30e:	9903      	ldr	r1, [sp, #12]
 310:	f7ff fffe 	bl	0 <__aeabi_dmul>
 314:	9e09      	ldr	r6, [sp, #36]	; 0x24
 316:	4680      	mov	r8, r0
 318:	4689      	mov	r9, r1
 31a:	4633      	mov	r3, r6
 31c:	9a08      	ldr	r2, [sp, #32]
 31e:	9802      	ldr	r0, [sp, #8]
 320:	4639      	mov	r1, r7
 322:	f7ff fffe 	bl	0 <__aeabi_dmul>
 326:	4602      	mov	r2, r0
 328:	460b      	mov	r3, r1
 32a:	4640      	mov	r0, r8
 32c:	4649      	mov	r1, r9
 32e:	f7ff fffe 	bl	0 <__aeabi_dsub>
 332:	2200      	movs	r2, #0
 334:	4b10      	ldr	r3, [pc, #64]	; (378 <__mulxc3+0x378>)
 336:	f7ff fffe 	bl	0 <__aeabi_dmul>
 33a:	4633      	mov	r3, r6
 33c:	9a08      	ldr	r2, [sp, #32]
 33e:	4680      	mov	r8, r0
 340:	4689      	mov	r9, r1
 342:	4628      	mov	r0, r5
 344:	9903      	ldr	r1, [sp, #12]
 346:	f7ff fffe 	bl	0 <__aeabi_dmul>
 34a:	4652      	mov	r2, sl
 34c:	4605      	mov	r5, r0
 34e:	460e      	mov	r6, r1
 350:	465b      	mov	r3, fp
 352:	9802      	ldr	r0, [sp, #8]
 354:	4639      	mov	r1, r7
 356:	f7ff fffe 	bl	0 <__aeabi_dmul>
 35a:	4602      	mov	r2, r0
 35c:	460b      	mov	r3, r1
 35e:	4628      	mov	r0, r5
 360:	4631      	mov	r1, r6
 362:	f7ff fffe 	bl	0 <__aeabi_dadd>
 366:	2200      	movs	r2, #0
 368:	4b03      	ldr	r3, [pc, #12]	; (378 <__mulxc3+0x378>)
 36a:	f7ff fffe 	bl	0 <__aeabi_dmul>
 36e:	e9cd 0100 	strd	r0, r1, [sp]
 372:	e6a3      	b.n	bc <__mulxc3+0xbc>
 374:	7fefffff 	.word	0x7fefffff
 378:	7ff00000 	.word	0x7ff00000
 37c:	9811      	ldr	r0, [sp, #68]	; 0x44
 37e:	f7ff fffe 	bl	0 <__aeabi_i2d>
 382:	9b02      	ldr	r3, [sp, #8]
 384:	9a10      	ldr	r2, [sp, #64]	; 0x40
 386:	930e      	str	r3, [sp, #56]	; 0x38
 388:	9b03      	ldr	r3, [sp, #12]
 38a:	920f      	str	r2, [sp, #60]	; 0x3c
 38c:	f361 031e 	bfi	r3, r1, #0, #31
 390:	4605      	mov	r5, r0
 392:	e9dd 010e 	ldrd	r0, r1, [sp, #56]	; 0x38
 396:	9303      	str	r3, [sp, #12]
 398:	f04f 32ff 	mov.w	r2, #4294967295	; 0xffffffff
 39c:	4b4c      	ldr	r3, [pc, #304]	; (4d0 <__mulxc3+0x4d0>)
 39e:	f04f 0601 	mov.w	r6, #1
 3a2:	f7ff fffe 	bl	0 <__aeabi_dcmpun>
 3a6:	b940      	cbnz	r0, 3ba <__mulxc3+0x3ba>
 3a8:	9802      	ldr	r0, [sp, #8]
 3aa:	9910      	ldr	r1, [sp, #64]	; 0x40
 3ac:	f04f 32ff 	mov.w	r2, #4294967295	; 0xffffffff
 3b0:	4b47      	ldr	r3, [pc, #284]	; (120 <__aeabi_dcmple+0x120>)
 3b2:	f7ff fffe 	bl	0 <__aeabi_dcmple>
 3b6:	b900      	cbnz	r0, 3ba <__mulxc3+0x3ba>
 3b8:	4606      	mov	r6, r0
 3ba:	f086 0001 	eor.w	r0, r6, #1
 3be:	f000 0001 	and.w	r0, r0, #1
 3c2:	f7ff fffe 	bl	0 <__aeabi_i2d>
 3c6:	f8cd a038 	str.w	sl, [sp, #56]	; 0x38
 3ca:	f8cd b03c 	str.w	fp, [sp, #60]	; 0x3c
 3ce:	9002      	str	r0, [sp, #8]
 3d0:	f361 071e 	bfi	r7, r1, #0, #31
 3d4:	4652      	mov	r2, sl
 3d6:	e9dd 010e 	ldrd	r0, r1, [sp, #56]	; 0x38
 3da:	465b      	mov	r3, fp
 3dc:	f7ff fffe 	bl	0 <__aeabi_dcmpun>
 3e0:	2800      	cmp	r0, #0
 3e2:	d152      	bne.n	48a <__mulxc3+0x48a>
 3e4:	9e08      	ldr	r6, [sp, #32]
 3e6:	4632      	mov	r2, r6
 3e8:	4630      	mov	r0, r6
 3ea:	9e09      	ldr	r6, [sp, #36]	; 0x24
 3ec:	4633      	mov	r3, r6
 3ee:	4631      	mov	r1, r6
 3f0:	f7ff fffe 	bl	0 <__aeabi_dcmpun>
 3f4:	2800      	cmp	r0, #0
 3f6:	d13f      	bne.n	478 <__mulxc3+0x478>
 3f8:	2301      	movs	r3, #1
 3fa:	9311      	str	r3, [sp, #68]	; 0x44
 3fc:	e6bc      	b.n	178 <__mulxc3+0x178>
 3fe:	9810      	ldr	r0, [sp, #64]	; 0x40
 400:	f7ff fffe 	bl	0 <__aeabi_i2d>
 404:	f8dd 8020 	ldr.w	r8, [sp, #32]
 408:	4682      	mov	sl, r0
 40a:	f361 0b1e 	bfi	fp, r1, #0, #31
 40e:	4640      	mov	r0, r8
 410:	f04f 32ff 	mov.w	r2, #4294967295	; 0xffffffff
 414:	4b2e      	ldr	r3, [pc, #184]	; (4d0 <__mulxc3+0x4d0>)
 416:	4631      	mov	r1, r6
 418:	f04f 0801 	mov.w	r8, #1
 41c:	f7ff fffe 	bl	0 <__aeabi_dcmpun>
 420:	b940      	cbnz	r0, 434 <__mulxc3+0x434>
 422:	9808      	ldr	r0, [sp, #32]
 424:	4631      	mov	r1, r6
 426:	f04f 32ff 	mov.w	r2, #4294967295	; 0xffffffff
 42a:	4b29      	ldr	r3, [pc, #164]	; (a8 <__aeabi_dcmple+0xa8>)
 42c:	f7ff fffe 	bl	0 <__aeabi_dcmple>
 430:	b900      	cbnz	r0, 434 <__mulxc3+0x434>
 432:	4680      	mov	r8, r0
 434:	f088 0001 	eor.w	r0, r8, #1
 438:	f000 0001 	and.w	r0, r0, #1
 43c:	f7ff fffe 	bl	0 <__aeabi_i2d>
 440:	9008      	str	r0, [sp, #32]
 442:	9803      	ldr	r0, [sp, #12]
 444:	462a      	mov	r2, r5
 446:	4603      	mov	r3, r0
 448:	9809      	ldr	r0, [sp, #36]	; 0x24
 44a:	f361 001e 	bfi	r0, r1, #0, #31
 44e:	9009      	str	r0, [sp, #36]	; 0x24
 450:	4619      	mov	r1, r3
 452:	4628      	mov	r0, r5
 454:	f7ff fffe 	bl	0 <__aeabi_dcmpun>
 458:	b9e0      	cbnz	r0, 494 <__mulxc3+0x494>
 45a:	9e02      	ldr	r6, [sp, #8]
 45c:	463b      	mov	r3, r7
 45e:	4632      	mov	r2, r6
 460:	4630      	mov	r0, r6
 462:	4639      	mov	r1, r7
 464:	f7ff fffe 	bl	0 <__aeabi_dcmpun>
 468:	2800      	cmp	r0, #0
 46a:	f43f af4d 	beq.w	308 <__mulxc3+0x308>
 46e:	2300      	movs	r3, #0
 470:	f007 4700 	and.w	r7, r7, #2147483648	; 0x80000000
 474:	9302      	str	r3, [sp, #8]
 476:	e747      	b.n	308 <__mulxc3+0x308>
 478:	9b09      	ldr	r3, [sp, #36]	; 0x24
 47a:	f003 4300 	and.w	r3, r3, #2147483648	; 0x80000000
 47e:	9309      	str	r3, [sp, #36]	; 0x24
 480:	2300      	movs	r3, #0
 482:	9308      	str	r3, [sp, #32]
 484:	2301      	movs	r3, #1
 486:	9311      	str	r3, [sp, #68]	; 0x44
 488:	e676      	b.n	178 <__mulxc3+0x178>
 48a:	f04f 0a00 	mov.w	sl, #0
 48e:	f00b 4b00 	and.w	fp, fp, #2147483648	; 0x80000000
 492:	e7a7      	b.n	3e4 <__mulxc3+0x3e4>
 494:	9b03      	ldr	r3, [sp, #12]
 496:	2500      	movs	r5, #0
 498:	f003 4300 	and.w	r3, r3, #2147483648	; 0x80000000
 49c:	9303      	str	r3, [sp, #12]
 49e:	e7dc      	b.n	45a <__mulxc3+0x45a>
 4a0:	2300      	movs	r3, #0
 4a2:	9308      	str	r3, [sp, #32]
 4a4:	9b09      	ldr	r3, [sp, #36]	; 0x24
 4a6:	f003 4300 	and.w	r3, r3, #2147483648	; 0x80000000
 4aa:	9309      	str	r3, [sp, #36]	; 0x24
 4ac:	e72c      	b.n	308 <__mulxc3+0x308>
 4ae:	f04f 0a00 	mov.w	sl, #0
 4b2:	f00b 4b00 	and.w	fp, fp, #2147483648	; 0x80000000
 4b6:	e71c      	b.n	2f2 <__mulxc3+0x2f2>
 4b8:	2300      	movs	r3, #0
 4ba:	f007 4700 	and.w	r7, r7, #2147483648	; 0x80000000
 4be:	9302      	str	r3, [sp, #8]
 4c0:	e70e      	b.n	2e0 <__mulxc3+0x2e0>
 4c2:	9b03      	ldr	r3, [sp, #12]
 4c4:	2500      	movs	r5, #0
 4c6:	f003 4300 	and.w	r3, r3, #2147483648	; 0x80000000
 4ca:	9303      	str	r3, [sp, #12]
 4cc:	e6fe      	b.n	2cc <__mulxc3+0x2cc>
 4ce:	bf00      	nop
 4d0:	7fefffff 	.word	0x7fefffff

negdf2.o:     file format elf32-littlearm

SYMBOL TABLE:
00000000 l    df *ABS*	00000000 negdf2.c
00000000 l    d  .text	00000000 .text
00000000 l    d  .data	00000000 .data
00000000 l    d  .bss	00000000 .bss
00000000 l    d  .text.__negdf2	00000000 .text.__negdf2
00000000 l    d  .comment	00000000 .comment
00000000 l    d  .ARM.attributes	00000000 .ARM.attributes
00000000 g     F .text.__negdf2	0000000c .hidden __negdf2
00000000 g     F .text.__negdf2	0000000c .hidden __aeabi_dneg



Disassembly of section .text.__negdf2:

00000000 <__aeabi_dneg>:
__aeabi_dneg():
   0:	1c02      	adds	r2, r0, #0
   2:	f141 4300 	adc.w	r3, r1, #2147483648	; 0x80000000
   6:	4610      	mov	r0, r2
   8:	4619      	mov	r1, r3
   a:	4770      	bx	lr

negdi2.o:     file format elf32-littlearm

SYMBOL TABLE:
00000000 l    df *ABS*	00000000 negdi2.c
00000000 l    d  .text	00000000 .text
00000000 l    d  .data	00000000 .data
00000000 l    d  .bss	00000000 .bss
00000000 l    d  .text.__negdi2	00000000 .text.__negdi2
00000000 l    d  .comment	00000000 .comment
00000000 l    d  .ARM.attributes	00000000 .ARM.attributes
00000000 g     F .text.__negdi2	00000008 .hidden __negdi2



Disassembly of section .text.__negdi2:

00000000 <__negdi2>:
__negdi2():
   0:	4240      	negs	r0, r0
   2:	eb61 0141 	sbc.w	r1, r1, r1, lsl #1
   6:	4770      	bx	lr

negsf2.o:     file format elf32-littlearm

SYMBOL TABLE:
00000000 l    df *ABS*	00000000 negsf2.c
00000000 l    d  .text	00000000 .text
00000000 l    d  .data	00000000 .data
00000000 l    d  .bss	00000000 .bss
00000000 l    d  .text.__negsf2	00000000 .text.__negsf2
00000000 l    d  .comment	00000000 .comment
00000000 l    d  .ARM.attributes	00000000 .ARM.attributes
00000000 g     F .text.__negsf2	00000006 .hidden __negsf2
00000000 g     F .text.__negsf2	00000006 .hidden __aeabi_fneg



Disassembly of section .text.__negsf2:

00000000 <__aeabi_fneg>:
__aeabi_fneg():
   0:	f100 4000 	add.w	r0, r0, #2147483648	; 0x80000000
   4:	4770      	bx	lr
   6:	bf00      	nop

negti2.o:     file format elf32-littlearm

SYMBOL TABLE:
00000000 l    df *ABS*	00000000 absvti2.c
00000000 l    d  .text	00000000 .text
00000000 l    d  .data	00000000 .data
00000000 l    d  .bss	00000000 .bss
00000000 l    d  .comment	00000000 .comment
00000000 l    d  .ARM.attributes	00000000 .ARM.attributes



negvdi2.o:     file format elf32-littlearm

SYMBOL TABLE:
00000000 l    df *ABS*	00000000 negvdi2.c
00000000 l    d  .text	00000000 .text
00000000 l    d  .data	00000000 .data
00000000 l    d  .bss	00000000 .bss
00000000 l    d  .text.__negvdi2	00000000 .text.__negvdi2
00000000 l       .rodata.__negvdi2.str1.4	00000000 .LC0
00000000 l    d  .rodata.__func__.3739	00000000 .rodata.__func__.3739
00000000 l     O .rodata.__func__.3739	0000000a __func__.3739
00000000 l    d  .rodata.__negvdi2.str1.4	00000000 .rodata.__negvdi2.str1.4
00000000 l    d  .comment	00000000 .comment
00000000 l    d  .ARM.attributes	00000000 .ARM.attributes
00000000 g     F .text.__negvdi2	0000002c .hidden __negvdi2
00000000         *UND*	00000000 __compilerrt_abort_impl



Disassembly of section .text.__negvdi2:

00000000 <__negvdi2>:
__negvdi2():
   0:	f1b1 4f00 	cmp.w	r1, #2147483648	; 0x80000000
   4:	bf08      	it	eq
   6:	2800      	cmpeq	r0, #0
   8:	d003      	beq.n	12 <__negvdi2+0x12>
   a:	4240      	negs	r0, r0
   c:	eb61 0141 	sbc.w	r1, r1, r1, lsl #1
  10:	4770      	bx	lr
  12:	4a04      	ldr	r2, [pc, #16]	; (24 <__negvdi2+0x24>)
  14:	4804      	ldr	r0, [pc, #16]	; (28 <__negvdi2+0x28>)
  16:	b508      	push	{r3, lr}
  18:	447a      	add	r2, pc
  1a:	211a      	movs	r1, #26
  1c:	4478      	add	r0, pc
  1e:	f7ff fffe 	bl	0 <__compilerrt_abort_impl>
  22:	bf00      	nop
  24:	00000008 	.word	0x00000008
  28:	00000008 	.word	0x00000008

negvsi2.o:     file format elf32-littlearm

SYMBOL TABLE:
00000000 l    df *ABS*	00000000 negvsi2.c
00000000 l    d  .text	00000000 .text
00000000 l    d  .data	00000000 .data
00000000 l    d  .bss	00000000 .bss
00000000 l    d  .text.__negvsi2	00000000 .text.__negvsi2
00000000 l       .rodata.__negvsi2.str1.4	00000000 .LC0
00000000 l    d  .rodata.__func__.3739	00000000 .rodata.__func__.3739
00000000 l     O .rodata.__func__.3739	0000000a __func__.3739
00000000 l    d  .rodata.__negvsi2.str1.4	00000000 .rodata.__negvsi2.str1.4
00000000 l    d  .comment	00000000 .comment
00000000 l    d  .ARM.attributes	00000000 .ARM.attributes
00000000 g     F .text.__negvsi2	00000024 .hidden __negvsi2
00000000         *UND*	00000000 __compilerrt_abort_impl



Disassembly of section .text.__negvsi2:

00000000 <__negvsi2>:
__negvsi2():
   0:	f1b0 4f00 	cmp.w	r0, #2147483648	; 0x80000000
   4:	d001      	beq.n	a <__negvsi2+0xa>
   6:	4240      	negs	r0, r0
   8:	4770      	bx	lr
   a:	4a04      	ldr	r2, [pc, #16]	; (1c <__negvsi2+0x1c>)
   c:	4804      	ldr	r0, [pc, #16]	; (20 <__negvsi2+0x20>)
   e:	b508      	push	{r3, lr}
  10:	447a      	add	r2, pc
  12:	211a      	movs	r1, #26
  14:	4478      	add	r0, pc
  16:	f7ff fffe 	bl	0 <__compilerrt_abort_impl>
  1a:	bf00      	nop
  1c:	00000008 	.word	0x00000008
  20:	00000008 	.word	0x00000008

negvti2.o:     file format elf32-littlearm

SYMBOL TABLE:
00000000 l    df *ABS*	00000000 absvti2.c
00000000 l    d  .text	00000000 .text
00000000 l    d  .data	00000000 .data
00000000 l    d  .bss	00000000 .bss
00000000 l    d  .comment	00000000 .comment
00000000 l    d  .ARM.attributes	00000000 .ARM.attributes



paritydi2.o:     file format elf32-littlearm

SYMBOL TABLE:
00000000 l    df *ABS*	00000000 paritydi2.c
00000000 l    d  .text	00000000 .text
00000000 l    d  .data	00000000 .data
00000000 l    d  .bss	00000000 .bss
00000000 l    d  .text.__paritydi2	00000000 .text.__paritydi2
00000000 l    d  .comment	00000000 .comment
00000000 l    d  .ARM.attributes	00000000 .ARM.attributes
00000000 g     F .text.__paritydi2	00000006 .hidden __paritydi2
00000000         *UND*	00000000 __paritysi2



Disassembly of section .text.__paritydi2:

00000000 <__paritydi2>:
__paritydi2():
   0:	4048      	eors	r0, r1
   2:	f7ff bffe 	b.w	0 <__paritysi2>
   6:	bf00      	nop

paritysi2.o:     file format elf32-littlearm

SYMBOL TABLE:
00000000 l    df *ABS*	00000000 paritysi2.c
00000000 l    d  .text	00000000 .text
00000000 l    d  .data	00000000 .data
00000000 l    d  .bss	00000000 .bss
00000000 l    d  .text.__paritysi2	00000000 .text.__paritysi2
00000000 l    d  .comment	00000000 .comment
00000000 l    d  .ARM.attributes	00000000 .ARM.attributes
00000000 g     F .text.__paritysi2	0000001e .hidden __paritysi2



Disassembly of section .text.__paritysi2:

00000000 <__paritysi2>:
__paritysi2():
   0:	f646 1396 	movw	r3, #27030	; 0x6996
   4:	ea80 4010 	eor.w	r0, r0, r0, lsr #16
   8:	ea80 2010 	eor.w	r0, r0, r0, lsr #8
   c:	ea80 1010 	eor.w	r0, r0, r0, lsr #4
  10:	f000 000f 	and.w	r0, r0, #15
  14:	fa43 f000 	asr.w	r0, r3, r0
  18:	f000 0001 	and.w	r0, r0, #1
  1c:	4770      	bx	lr
  1e:	bf00      	nop

parityti2.o:     file format elf32-littlearm

SYMBOL TABLE:
00000000 l    df *ABS*	00000000 absvti2.c
00000000 l    d  .text	00000000 .text
00000000 l    d  .data	00000000 .data
00000000 l    d  .bss	00000000 .bss
00000000 l    d  .comment	00000000 .comment
00000000 l    d  .ARM.attributes	00000000 .ARM.attributes



popcountdi2.o:     file format elf32-littlearm

SYMBOL TABLE:
00000000 l    df *ABS*	00000000 popcountdi2.c
00000000 l    d  .text	00000000 .text
00000000 l    d  .data	00000000 .data
00000000 l    d  .bss	00000000 .bss
00000000 l    d  .text.__popcountdi2	00000000 .text.__popcountdi2
00000000 l    d  .comment	00000000 .comment
00000000 l    d  .ARM.attributes	00000000 .ARM.attributes
00000000 g     F .text.__popcountdi2	00000070 .hidden __popcountdi2



Disassembly of section .text.__popcountdi2:

00000000 <__popcountdi2>:
__popcountdi2():
   0:	084b      	lsrs	r3, r1, #1
   2:	ea4f 0230 	mov.w	r2, r0, rrx
   6:	e92d 0830 	stmdb	sp!, {r4, r5, fp}
   a:	f002 3455 	and.w	r4, r2, #1431655765	; 0x55555555
   e:	1b00      	subs	r0, r0, r4
  10:	f003 3555 	and.w	r5, r3, #1431655765	; 0x55555555
  14:	eb61 0105 	sbc.w	r1, r1, r5
  18:	4683      	mov	fp, r0
  1a:	468c      	mov	ip, r1
  1c:	ea4f 009b 	mov.w	r0, fp, lsr #2
  20:	ea40 708c 	orr.w	r0, r0, ip, lsl #30
  24:	ea4f 019c 	mov.w	r1, ip, lsr #2
  28:	f000 3233 	and.w	r2, r0, #858993459	; 0x33333333
  2c:	f00b 3033 	and.w	r0, fp, #858993459	; 0x33333333
  30:	eb10 0b02 	adds.w	fp, r0, r2
  34:	f001 3333 	and.w	r3, r1, #858993459	; 0x33333333
  38:	f00c 3133 	and.w	r1, ip, #858993459	; 0x33333333
  3c:	eb41 0c03 	adc.w	ip, r1, r3
  40:	ea4f 121b 	mov.w	r2, fp, lsr #4
  44:	ea42 720c 	orr.w	r2, r2, ip, lsl #28
  48:	eb12 000b 	adds.w	r0, r2, fp
  4c:	ea4f 131c 	mov.w	r3, ip, lsr #4
  50:	eb43 010c 	adc.w	r1, r3, ip
  54:	f000 320f 	and.w	r2, r0, #252645135	; 0xf0f0f0f
  58:	f001 330f 	and.w	r3, r1, #252645135	; 0xf0f0f0f
  5c:	441a      	add	r2, r3
  5e:	eb02 4212 	add.w	r2, r2, r2, lsr #16
  62:	eb02 2212 	add.w	r2, r2, r2, lsr #8
  66:	f002 007f 	and.w	r0, r2, #127	; 0x7f
  6a:	e8bd 0830 	ldmia.w	sp!, {r4, r5, fp}
  6e:	4770      	bx	lr

popcountsi2.o:     file format elf32-littlearm

SYMBOL TABLE:
00000000 l    df *ABS*	00000000 popcountsi2.c
00000000 l    d  .text	00000000 .text
00000000 l    d  .data	00000000 .data
00000000 l    d  .bss	00000000 .bss
00000000 l    d  .text.__popcountsi2	00000000 .text.__popcountsi2
00000000 l    d  .comment	00000000 .comment
00000000 l    d  .ARM.attributes	00000000 .ARM.attributes
00000000 g     F .text.__popcountsi2	0000002a .hidden __popcountsi2



Disassembly of section .text.__popcountsi2:

00000000 <__popcountsi2>:
__popcountsi2():
   0:	0843      	lsrs	r3, r0, #1
   2:	f003 3355 	and.w	r3, r3, #1431655765	; 0x55555555
   6:	1ac3      	subs	r3, r0, r3
   8:	0898      	lsrs	r0, r3, #2
   a:	f000 3033 	and.w	r0, r0, #858993459	; 0x33333333
   e:	f003 3333 	and.w	r3, r3, #858993459	; 0x33333333
  12:	4418      	add	r0, r3
  14:	eb00 1010 	add.w	r0, r0, r0, lsr #4
  18:	f000 300f 	and.w	r0, r0, #252645135	; 0xf0f0f0f
  1c:	eb00 4010 	add.w	r0, r0, r0, lsr #16
  20:	eb00 2010 	add.w	r0, r0, r0, lsr #8
  24:	f000 003f 	and.w	r0, r0, #63	; 0x3f
  28:	4770      	bx	lr
  2a:	bf00      	nop

popcountti2.o:     file format elf32-littlearm

SYMBOL TABLE:
00000000 l    df *ABS*	00000000 absvti2.c
00000000 l    d  .text	00000000 .text
00000000 l    d  .data	00000000 .data
00000000 l    d  .bss	00000000 .bss
00000000 l    d  .comment	00000000 .comment
00000000 l    d  .ARM.attributes	00000000 .ARM.attributes



powixf2.o:     file format elf32-littlearm

SYMBOL TABLE:
00000000 l    df *ABS*	00000000 powixf2.c
00000000 l    d  .text	00000000 .text
00000000 l    d  .data	00000000 .data
00000000 l    d  .bss	00000000 .bss
00000000 l    d  .text.__powixf2	00000000 .text.__powixf2
00000000 l    d  .comment	00000000 .comment
00000000 l    d  .ARM.attributes	00000000 .ARM.attributes
00000000         *UND*	00000000 __aeabi_dmul
00000000         *UND*	00000000 __aeabi_ddiv
00000000 g     F .text.__powixf2	00000064 .hidden __powixf2



Disassembly of section .text.__powixf2:

00000000 <__powixf2>:
__powixf2():
   0:	e92d 43f8 	stmdb	sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
   4:	4615      	mov	r5, r2
   6:	4606      	mov	r6, r0
   8:	460f      	mov	r7, r1
   a:	4614      	mov	r4, r2
   c:	f04f 0800 	mov.w	r8, #0
  10:	f8df 904c 	ldr.w	r9, [pc, #76]	; 60 <__powixf2+0x60>
  14:	e007      	b.n	26 <__powixf2+0x26>
  16:	4632      	mov	r2, r6
  18:	463b      	mov	r3, r7
  1a:	4630      	mov	r0, r6
  1c:	4639      	mov	r1, r7
  1e:	f7ff fffe 	bl	0 <__aeabi_dmul>
  22:	4606      	mov	r6, r0
  24:	460f      	mov	r7, r1
  26:	07e3      	lsls	r3, r4, #31
  28:	d507      	bpl.n	3a <__powixf2+0x3a>
  2a:	4640      	mov	r0, r8
  2c:	4649      	mov	r1, r9
  2e:	4632      	mov	r2, r6
  30:	463b      	mov	r3, r7
  32:	f7ff fffe 	bl	0 <__aeabi_dmul>
  36:	4680      	mov	r8, r0
  38:	4689      	mov	r9, r1
  3a:	eb04 74d4 	add.w	r4, r4, r4, lsr #31
  3e:	1064      	asrs	r4, r4, #1
  40:	d1e9      	bne.n	16 <__powixf2+0x16>
  42:	2d00      	cmp	r5, #0
  44:	da07      	bge.n	56 <__powixf2+0x56>
  46:	4642      	mov	r2, r8
  48:	464b      	mov	r3, r9
  4a:	2000      	movs	r0, #0
  4c:	4904      	ldr	r1, [pc, #16]	; (60 <__powixf2+0x60>)
  4e:	f7ff fffe 	bl	0 <__aeabi_ddiv>
  52:	4680      	mov	r8, r0
  54:	4689      	mov	r9, r1
  56:	4640      	mov	r0, r8
  58:	4649      	mov	r1, r9
  5a:	e8bd 83f8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
  5e:	bf00      	nop
  60:	3ff00000 	.word	0x3ff00000

subvdi3.o:     file format elf32-littlearm

SYMBOL TABLE:
00000000 l    df *ABS*	00000000 subvdi3.c
00000000 l    d  .text	00000000 .text
00000000 l    d  .data	00000000 .data
00000000 l    d  .bss	00000000 .bss
00000000 l    d  .text.__subvdi3	00000000 .text.__subvdi3
00000000 l       .rodata.__subvdi3.str1.4	00000000 .LC0
00000000 l    d  .rodata.__func__.3740	00000000 .rodata.__func__.3740
00000000 l     O .rodata.__func__.3740	0000000a __func__.3740
00000000 l    d  .rodata.__subvdi3.str1.4	00000000 .rodata.__subvdi3.str1.4
00000000 l    d  .comment	00000000 .comment
00000000 l    d  .ARM.attributes	00000000 .ARM.attributes
00000000 g     F .text.__subvdi3	00000054 .hidden __subvdi3
00000000         *UND*	00000000 __compilerrt_abort_impl



Disassembly of section .text.__subvdi3:

00000000 <__subvdi3>:
__subvdi3():
   0:	b538      	push	{r3, r4, r5, lr}
   2:	1a84      	subs	r4, r0, r2
   4:	eb61 0503 	sbc.w	r5, r1, r3
   8:	2a00      	cmp	r2, #0
   a:	f173 0300 	sbcs.w	r3, r3, #0
   e:	db06      	blt.n	1e <__subvdi3+0x1e>
  10:	42a0      	cmp	r0, r4
  12:	eb71 0305 	sbcs.w	r3, r1, r5
  16:	db0d      	blt.n	34 <__subvdi3+0x34>
  18:	4620      	mov	r0, r4
  1a:	4629      	mov	r1, r5
  1c:	bd38      	pop	{r3, r4, r5, pc}
  1e:	42a0      	cmp	r0, r4
  20:	eb71 0305 	sbcs.w	r3, r1, r5
  24:	dbf8      	blt.n	18 <__subvdi3+0x18>
  26:	4a07      	ldr	r2, [pc, #28]	; (44 <__subvdi3+0x44>)
  28:	4807      	ldr	r0, [pc, #28]	; (48 <__subvdi3+0x48>)
  2a:	447a      	add	r2, pc
  2c:	2121      	movs	r1, #33	; 0x21
  2e:	4478      	add	r0, pc
  30:	f7ff fffe 	bl	0 <__compilerrt_abort_impl>
  34:	4a05      	ldr	r2, [pc, #20]	; (4c <__subvdi3+0x4c>)
  36:	4806      	ldr	r0, [pc, #24]	; (50 <__subvdi3+0x50>)
  38:	447a      	add	r2, pc
  3a:	211c      	movs	r1, #28
  3c:	4478      	add	r0, pc
  3e:	f7ff fffe 	bl	0 <__compilerrt_abort_impl>
  42:	bf00      	nop
  44:	00000016 	.word	0x00000016
  48:	00000016 	.word	0x00000016
  4c:	00000010 	.word	0x00000010
  50:	00000010 	.word	0x00000010

subvsi3.o:     file format elf32-littlearm

SYMBOL TABLE:
00000000 l    df *ABS*	00000000 subvsi3.c
00000000 l    d  .text	00000000 .text
00000000 l    d  .data	00000000 .data
00000000 l    d  .bss	00000000 .bss
00000000 l    d  .text.__subvsi3	00000000 .text.__subvsi3
00000000 l       .rodata.__subvsi3.str1.4	00000000 .LC0
00000000 l    d  .rodata.__func__.3740	00000000 .rodata.__func__.3740
00000000 l     O .rodata.__func__.3740	0000000a __func__.3740
00000000 l    d  .rodata.__subvsi3.str1.4	00000000 .rodata.__subvsi3.str1.4
00000000 l    d  .comment	00000000 .comment
00000000 l    d  .ARM.attributes	00000000 .ARM.attributes
00000000 g     F .text.__subvsi3	00000044 .hidden __subvsi3
00000000         *UND*	00000000 __compilerrt_abort_impl



Disassembly of section .text.__subvsi3:

00000000 <__subvsi3>:
__subvsi3():
   0:	2900      	cmp	r1, #0
   2:	b508      	push	{r3, lr}
   4:	eba0 0301 	sub.w	r3, r0, r1
   8:	db03      	blt.n	12 <__subvsi3+0x12>
   a:	4298      	cmp	r0, r3
   c:	db0a      	blt.n	24 <__subvsi3+0x24>
   e:	4618      	mov	r0, r3
  10:	bd08      	pop	{r3, pc}
  12:	4298      	cmp	r0, r3
  14:	dbfb      	blt.n	e <__subvsi3+0xe>
  16:	4a07      	ldr	r2, [pc, #28]	; (34 <__subvsi3+0x34>)
  18:	4807      	ldr	r0, [pc, #28]	; (38 <__subvsi3+0x38>)
  1a:	447a      	add	r2, pc
  1c:	2121      	movs	r1, #33	; 0x21
  1e:	4478      	add	r0, pc
  20:	f7ff fffe 	bl	0 <__compilerrt_abort_impl>
  24:	4a05      	ldr	r2, [pc, #20]	; (3c <__subvsi3+0x3c>)
  26:	4806      	ldr	r0, [pc, #24]	; (40 <__subvsi3+0x40>)
  28:	447a      	add	r2, pc
  2a:	211c      	movs	r1, #28
  2c:	4478      	add	r0, pc
  2e:	f7ff fffe 	bl	0 <__compilerrt_abort_impl>
  32:	bf00      	nop
  34:	00000016 	.word	0x00000016
  38:	00000016 	.word	0x00000016
  3c:	00000010 	.word	0x00000010
  40:	00000010 	.word	0x00000010

subvti3.o:     file format elf32-littlearm

SYMBOL TABLE:
00000000 l    df *ABS*	00000000 absvti2.c
00000000 l    d  .text	00000000 .text
00000000 l    d  .data	00000000 .data
00000000 l    d  .bss	00000000 .bss
00000000 l    d  .comment	00000000 .comment
00000000 l    d  .ARM.attributes	00000000 .ARM.attributes



switch16.o:     file format elf32-littlearm

SYMBOL TABLE:
00000000 l    d  .text	00000000 .text
00000000 l    d  .data	00000000 .data
00000000 l    d  .bss	00000000 .bss
00000000 l    d  .ARM.attributes	00000000 .ARM.attributes
00000000 g     F .text	0000001e .hidden __switch16



Disassembly of section .text:

00000000 <__switch16>:
__switch16():
   0:	f83e cc01 	ldrh.w	ip, [lr, #-1]
   4:	4560      	cmp	r0, ip
   6:	eb0e 0040 	add.w	r0, lr, r0, lsl #1
   a:	eb0e 0c4c 	add.w	ip, lr, ip, lsl #1
   e:	bf34      	ite	cc
  10:	f9b0 0001 	ldrshcc.w	r0, [r0, #1]
  14:	f9bc 0001 	ldrshcs.w	r0, [ip, #1]
  18:	eb0e 0c40 	add.w	ip, lr, r0, lsl #1
  1c:	4760      	bx	ip
  1e:	bf00      	nop

switch32.o:     file format elf32-littlearm

SYMBOL TABLE:
00000000 l    d  .text	00000000 .text
00000000 l    d  .data	00000000 .data
00000000 l    d  .bss	00000000 .bss
00000000 l    d  .ARM.attributes	00000000 .ARM.attributes
00000000 g     F .text	0000001e .hidden __switch32



Disassembly of section .text:

00000000 <__switch32>:
__switch32():
   0:	f85e cc01 	ldr.w	ip, [lr, #-1]
   4:	4560      	cmp	r0, ip
   6:	eb0e 0080 	add.w	r0, lr, r0, lsl #2
   a:	eb0e 0c8c 	add.w	ip, lr, ip, lsl #2
   e:	bf34      	ite	cc
  10:	f8d0 0003 	ldrcc.w	r0, [r0, #3]
  14:	f8dc 0003 	ldrcs.w	r0, [ip, #3]
  18:	eb0e 0c00 	add.w	ip, lr, r0
  1c:	4760      	bx	ip
  1e:	bf00      	nop

switch8.o:     file format elf32-littlearm

SYMBOL TABLE:
00000000 l    d  .text	00000000 .text
00000000 l    d  .data	00000000 .data
00000000 l    d  .bss	00000000 .bss
00000000 l    d  .ARM.attributes	00000000 .ARM.attributes
00000000 g     F .text	00000016 .hidden __switch8



Disassembly of section .text:

00000000 <__switch8>:
__switch8():
   0:	f81e cc01 	ldrb.w	ip, [lr, #-1]
   4:	4560      	cmp	r0, ip
   6:	bf34      	ite	cc
   8:	f91e 0000 	ldrsbcc.w	r0, [lr, r0]
   c:	f91e 000c 	ldrsbcs.w	r0, [lr, ip]
  10:	eb0e 0c40 	add.w	ip, lr, r0, lsl #1
  14:	4760      	bx	ip
  16:	bf00      	nop

switchu8.o:     file format elf32-littlearm

SYMBOL TABLE:
00000000 l    d  .text	00000000 .text
00000000 l    d  .data	00000000 .data
00000000 l    d  .bss	00000000 .bss
00000000 l    d  .ARM.attributes	00000000 .ARM.attributes
00000000 g     F .text	00000016 .hidden __switchu8



Disassembly of section .text:

00000000 <__switchu8>:
__switchu8():
   0:	f81e cc01 	ldrb.w	ip, [lr, #-1]
   4:	4560      	cmp	r0, ip
   6:	bf34      	ite	cc
   8:	f81e 0000 	ldrbcc.w	r0, [lr, r0]
   c:	f81e 000c 	ldrbcs.w	r0, [lr, ip]
  10:	eb0e 0c40 	add.w	ip, lr, r0, lsl #1
  14:	4760      	bx	ip
  16:	bf00      	nop

sync_synchronize.o:     file format elf32-littlearm

SYMBOL TABLE:
00000000 l    d  .text	00000000 .text
00000000 l    d  .data	00000000 .data
00000000 l    d  .bss	00000000 .bss
00000000 l    d  .ARM.attributes	00000000 .ARM.attributes



truncdfhf2.o:     file format elf32-littlearm

SYMBOL TABLE:
00000000 l    df *ABS*	00000000 truncdfhf2.c
00000000 l    d  .text	00000000 .text
00000000 l    d  .data	00000000 .data
00000000 l    d  .bss	00000000 .bss
00000000 l    d  .text.__truncdfhf2	00000000 .text.__truncdfhf2
00000000 l    d  .comment	00000000 .comment
00000000 l    d  .ARM.attributes	00000000 .ARM.attributes
00000000 g     F .text.__truncdfhf2	00000174 .hidden __truncdfhf2
00000000 g     F .text.__truncdfhf2	00000174 .hidden __aeabi_d2h



Disassembly of section .text.__truncdfhf2:

00000000 <__aeabi_d2h>:
__aeabi_d2h():
   0:	e92d 0ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp}
   4:	f04f 0800 	mov.w	r8, #0
   8:	2600      	movs	r6, #0
   a:	468c      	mov	ip, r1
   c:	f8df 9160 	ldr.w	r9, [pc, #352]	; 170 <__aeabi_d2h+0x170>
  10:	f021 4500 	bic.w	r5, r1, #2147483648	; 0x80000000
  14:	4f52      	ldr	r7, [pc, #328]	; (160 <__aeabi_d2h+0x160>)
  16:	eb18 0100 	adds.w	r1, r8, r0
  1a:	eb49 0205 	adc.w	r2, r9, r5
  1e:	eb16 0800 	adds.w	r8, r6, r0
  22:	eb47 0905 	adc.w	r9, r7, r5
  26:	454a      	cmp	r2, r9
  28:	bf08      	it	eq
  2a:	4541      	cmpeq	r1, r8
  2c:	4663      	mov	r3, ip
  2e:	d217      	bcs.n	60 <__aeabi_d2h+0x60>
  30:	f240 37ff 	movw	r7, #1023	; 0x3ff
  34:	f04f 36ff 	mov.w	r6, #4294967295	; 0xffffffff
  38:	ea0c 0107 	and.w	r1, ip, r7
  3c:	f44f 7700 	mov.w	r7, #512	; 0x200
  40:	4030      	ands	r0, r6
  42:	2600      	movs	r6, #0
  44:	428f      	cmp	r7, r1
  46:	bf08      	it	eq
  48:	4286      	cmpeq	r6, r0
  4a:	f3c5 228f 	ubfx	r2, r5, #10, #16
  4e:	d373      	bcc.n	138 <__aeabi_d2h+0x138>
  50:	42b9      	cmp	r1, r7
  52:	bf08      	it	eq
  54:	42b0      	cmpeq	r0, r6
  56:	d077      	beq.n	148 <__aeabi_d2h+0x148>
  58:	f502 4080 	add.w	r0, r2, #16384	; 0x4000
  5c:	b280      	uxth	r0, r0
  5e:	e064      	b.n	12a <__aeabi_d2h+0x12a>
  60:	2600      	movs	r6, #0
  62:	4f40      	ldr	r7, [pc, #256]	; (164 <__aeabi_d2h+0x164>)
  64:	42af      	cmp	r7, r5
  66:	bf08      	it	eq
  68:	4286      	cmpeq	r6, r0
  6a:	d35a      	bcc.n	122 <__aeabi_d2h+0x122>
  6c:	f04f 36ff 	mov.w	r6, #4294967295	; 0xffffffff
  70:	4f3d      	ldr	r7, [pc, #244]	; (168 <__aeabi_d2h+0x168>)
  72:	42af      	cmp	r7, r5
  74:	bf08      	it	eq
  76:	4286      	cmpeq	r6, r0
  78:	d363      	bcc.n	142 <__aeabi_d2h+0x142>
  7a:	0d2c      	lsrs	r4, r5, #20
  7c:	f5c4 727c 	rsb	r2, r4, #1008	; 0x3f0
  80:	3201      	adds	r2, #1
  82:	2a34      	cmp	r2, #52	; 0x34
  84:	dc67      	bgt.n	156 <__aeabi_d2h+0x156>
  86:	f04f 36ff 	mov.w	r6, #4294967295	; 0xffffffff
  8a:	4f38      	ldr	r7, [pc, #224]	; (16c <__aeabi_d2h+0x16c>)
  8c:	4030      	ands	r0, r6
  8e:	ea0c 0107 	and.w	r1, ip, r7
  92:	4680      	mov	r8, r0
  94:	f441 1980 	orr.w	r9, r1, #1048576	; 0x100000
  98:	f46f 7074 	mvn.w	r0, #976	; 0x3d0
  9c:	f46f 716c 	mvn.w	r1, #944	; 0x3b0
  a0:	1867      	adds	r7, r4, r1
  a2:	4404      	add	r4, r0
  a4:	fa08 f404 	lsl.w	r4, r8, r4
  a8:	fa09 f607 	lsl.w	r6, r9, r7
  ac:	f1c7 0c20 	rsb	ip, r7, #32
  b0:	4326      	orrs	r6, r4
  b2:	fa28 fc0c 	lsr.w	ip, r8, ip
  b6:	fa08 f707 	lsl.w	r7, r8, r7
  ba:	ea46 060c 	orr.w	r6, r6, ip
  be:	ea57 0106 	orrs.w	r1, r7, r6
  c2:	bf14      	ite	ne
  c4:	2701      	movne	r7, #1
  c6:	2700      	moveq	r7, #0
  c8:	f1c2 0620 	rsb	r6, r2, #32
  cc:	fa28 fa02 	lsr.w	sl, r8, r2
  d0:	fa09 f606 	lsl.w	r6, r9, r6
  d4:	f1a2 0020 	sub.w	r0, r2, #32
  d8:	fa29 f000 	lsr.w	r0, r9, r0
  dc:	ea4a 0a06 	orr.w	sl, sl, r6
  e0:	ea4a 0a00 	orr.w	sl, sl, r0
  e4:	ea4a 0407 	orr.w	r4, sl, r7
  e8:	f240 37ff 	movw	r7, #1023	; 0x3ff
  ec:	fa29 fb02 	lsr.w	fp, r9, r2
  f0:	f04f 36ff 	mov.w	r6, #4294967295	; 0xffffffff
  f4:	f44f 7900 	mov.w	r9, #512	; 0x200
  f8:	f04f 0800 	mov.w	r8, #0
  fc:	ea07 020b 	and.w	r2, r7, fp
 100:	ea06 0104 	and.w	r1, r6, r4
 104:	4591      	cmp	r9, r2
 106:	bf08      	it	eq
 108:	4588      	cmpeq	r8, r1
 10a:	f3cb 208f 	ubfx	r0, fp, #10, #16
 10e:	d324      	bcc.n	15a <__aeabi_d2h+0x15a>
 110:	454a      	cmp	r2, r9
 112:	bf08      	it	eq
 114:	4541      	cmpeq	r1, r8
 116:	d108      	bne.n	12a <__aeabi_d2h+0x12a>
 118:	1c42      	adds	r2, r0, #1
 11a:	f64f 70fe 	movw	r0, #65534	; 0xfffe
 11e:	4010      	ands	r0, r2
 120:	e003      	b.n	12a <__aeabi_d2h+0x12a>
 122:	f3c5 2088 	ubfx	r0, r5, #10, #9
 126:	f440 40fc 	orr.w	r0, r0, #32256	; 0x7e00
 12a:	0c1b      	lsrs	r3, r3, #16
 12c:	f403 4300 	and.w	r3, r3, #32768	; 0x8000
 130:	4318      	orrs	r0, r3
 132:	e8bd 0ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp}
 136:	4770      	bx	lr
 138:	f502 4080 	add.w	r0, r2, #16384	; 0x4000
 13c:	3001      	adds	r0, #1
 13e:	b280      	uxth	r0, r0
 140:	e7f3      	b.n	12a <__aeabi_d2h+0x12a>
 142:	f44f 40f8 	mov.w	r0, #31744	; 0x7c00
 146:	e7f0      	b.n	12a <__aeabi_d2h+0x12a>
 148:	f64f 70fe 	movw	r0, #65534	; 0xfffe
 14c:	f502 4280 	add.w	r2, r2, #16384	; 0x4000
 150:	3201      	adds	r2, #1
 152:	4010      	ands	r0, r2
 154:	e7e9      	b.n	12a <__aeabi_d2h+0x12a>
 156:	2000      	movs	r0, #0
 158:	e7e7      	b.n	12a <__aeabi_d2h+0x12a>
 15a:	3001      	adds	r0, #1
 15c:	b280      	uxth	r0, r0
 15e:	e7e4      	b.n	12a <__aeabi_d2h+0x12a>
 160:	bf100000 	.word	0xbf100000
 164:	7ff00000 	.word	0x7ff00000
 168:	40efffff 	.word	0x40efffff
 16c:	000fffff 	.word	0x000fffff
 170:	c0f00000 	.word	0xc0f00000

truncdfsf2.o:     file format elf32-littlearm

SYMBOL TABLE:
00000000 l    df *ABS*	00000000 truncdfsf2.c
00000000 l    d  .text	00000000 .text
00000000 l    d  .data	00000000 .data
00000000 l    d  .bss	00000000 .bss
00000000 l    d  .text.__truncdfsf2	00000000 .text.__truncdfsf2
00000000 l    d  .comment	00000000 .comment
00000000 l    d  .ARM.attributes	00000000 .ARM.attributes
00000000 g     F .text.__truncdfsf2	00000184 .hidden __truncdfsf2
00000000 g     F .text.__truncdfsf2	00000184 .hidden __aeabi_d2f



Disassembly of section .text.__truncdfsf2:

00000000 <__aeabi_d2f>:
__aeabi_d2f():
   0:	e92d 0ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp}
   4:	f04f 0800 	mov.w	r8, #0
   8:	4683      	mov	fp, r0
   a:	2600      	movs	r6, #0
   c:	468c      	mov	ip, r1
   e:	f8df 9170 	ldr.w	r9, [pc, #368]	; 180 <__aeabi_d2f+0x180>
  12:	f021 4300 	bic.w	r3, r1, #2147483648	; 0x80000000
  16:	4602      	mov	r2, r0
  18:	4f55      	ldr	r7, [pc, #340]	; (170 <__aeabi_d2f+0x170>)
  1a:	eb18 0000 	adds.w	r0, r8, r0
  1e:	eb49 0103 	adc.w	r1, r9, r3
  22:	eb16 080b 	adds.w	r8, r6, fp
  26:	eb47 0903 	adc.w	r9, r7, r3
  2a:	4549      	cmp	r1, r9
  2c:	bf08      	it	eq
  2e:	4540      	cmpeq	r0, r8
  30:	4664      	mov	r4, ip
  32:	d21e      	bcs.n	72 <__aeabi_d2f+0x72>
  34:	2700      	movs	r7, #0
  36:	f04f 0900 	mov.w	r9, #0
  3a:	f04f 5880 	mov.w	r8, #268435456	; 0x10000000
  3e:	f02b 4660 	bic.w	r6, fp, #3758096384	; 0xe0000000
  42:	45b9      	cmp	r9, r7
  44:	ea4f 7052 	mov.w	r0, r2, lsr #29
  48:	bf08      	it	eq
  4a:	45b0      	cmpeq	r8, r6
  4c:	ea40 00c3 	orr.w	r0, r0, r3, lsl #3
  50:	d379      	bcc.n	146 <__aeabi_d2f+0x146>
  52:	2f00      	cmp	r7, #0
  54:	bf08      	it	eq
  56:	f1b6 5f80 	cmpeq.w	r6, #268435456	; 0x10000000
  5a:	f100 4080 	add.w	r0, r0, #1073741824	; 0x40000000
  5e:	d16c      	bne.n	13a <__aeabi_d2f+0x13a>
  60:	3001      	adds	r0, #1
  62:	f004 4200 	and.w	r2, r4, #2147483648	; 0x80000000
  66:	f020 0001 	bic.w	r0, r0, #1
  6a:	4310      	orrs	r0, r2
  6c:	e8bd 0ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp}
  70:	4770      	bx	lr
  72:	2600      	movs	r6, #0
  74:	4f3f      	ldr	r7, [pc, #252]	; (174 <__aeabi_d2f+0x174>)
  76:	429f      	cmp	r7, r3
  78:	bf08      	it	eq
  7a:	455e      	cmpeq	r6, fp
  7c:	d354      	bcc.n	128 <__aeabi_d2f+0x128>
  7e:	f04f 36ff 	mov.w	r6, #4294967295	; 0xffffffff
  82:	4f3d      	ldr	r7, [pc, #244]	; (178 <__aeabi_d2f+0x178>)
  84:	429f      	cmp	r7, r3
  86:	bf08      	it	eq
  88:	455e      	cmpeq	r6, fp
  8a:	d365      	bcc.n	158 <__aeabi_d2f+0x158>
  8c:	0d1b      	lsrs	r3, r3, #20
  8e:	f5c3 7560 	rsb	r5, r3, #896	; 0x380
  92:	3501      	adds	r5, #1
  94:	2d34      	cmp	r5, #52	; 0x34
  96:	dc67      	bgt.n	168 <__aeabi_d2f+0x168>
  98:	4f38      	ldr	r7, [pc, #224]	; (17c <__aeabi_d2f+0x17c>)
  9a:	f04f 36ff 	mov.w	r6, #4294967295	; 0xffffffff
  9e:	ea0c 0107 	and.w	r1, ip, r7
  a2:	f441 1980 	orr.w	r9, r1, #1048576	; 0x100000
  a6:	f46f 7250 	mvn.w	r2, #832	; 0x340
  aa:	f46f 7158 	mvn.w	r1, #864	; 0x360
  ae:	ea0b 0006 	and.w	r0, fp, r6
  b2:	189f      	adds	r7, r3, r2
  b4:	440b      	add	r3, r1
  b6:	fa00 f303 	lsl.w	r3, r0, r3
  ba:	fa09 f607 	lsl.w	r6, r9, r7
  be:	f1c7 0c20 	rsb	ip, r7, #32
  c2:	431e      	orrs	r6, r3
  c4:	fa20 fc0c 	lsr.w	ip, r0, ip
  c8:	fa00 f707 	lsl.w	r7, r0, r7
  cc:	ea46 060c 	orr.w	r6, r6, ip
  d0:	ea57 0306 	orrs.w	r3, r7, r6
  d4:	bf14      	ite	ne
  d6:	2701      	movne	r7, #1
  d8:	2700      	moveq	r7, #0
  da:	f1c5 0620 	rsb	r6, r5, #32
  de:	fa09 f606 	lsl.w	r6, r9, r6
  e2:	fa20 fa05 	lsr.w	sl, r0, r5
  e6:	f1a5 0020 	sub.w	r0, r5, #32
  ea:	fa29 f000 	lsr.w	r0, r9, r0
  ee:	ea4a 0a06 	orr.w	sl, sl, r6
  f2:	ea4a 0a00 	orr.w	sl, sl, r0
  f6:	ea4a 0207 	orr.w	r2, sl, r7
  fa:	fa29 fb05 	lsr.w	fp, r9, r5
  fe:	2700      	movs	r7, #0
 100:	f04f 0900 	mov.w	r9, #0
 104:	f04f 5880 	mov.w	r8, #268435456	; 0x10000000
 108:	f022 4660 	bic.w	r6, r2, #3758096384	; 0xe0000000
 10c:	45b9      	cmp	r9, r7
 10e:	ea4f 7052 	mov.w	r0, r2, lsr #29
 112:	bf08      	it	eq
 114:	45b0      	cmpeq	r8, r6
 116:	ea40 00cb 	orr.w	r0, r0, fp, lsl #3
 11a:	d327      	bcc.n	16c <__aeabi_d2f+0x16c>
 11c:	2f00      	cmp	r7, #0
 11e:	bf08      	it	eq
 120:	f1b6 5f80 	cmpeq.w	r6, #268435456	; 0x10000000
 124:	d109      	bne.n	13a <__aeabi_d2f+0x13a>
 126:	e79b      	b.n	60 <__aeabi_d2f+0x60>
 128:	0f50      	lsrs	r0, r2, #29
 12a:	ea40 00c3 	orr.w	r0, r0, r3, lsl #3
 12e:	f3c0 0015 	ubfx	r0, r0, #0, #22
 132:	f040 40ff 	orr.w	r0, r0, #2139095040	; 0x7f800000
 136:	f440 0080 	orr.w	r0, r0, #4194304	; 0x400000
 13a:	f004 4200 	and.w	r2, r4, #2147483648	; 0x80000000
 13e:	4310      	orrs	r0, r2
 140:	e8bd 0ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp}
 144:	4770      	bx	lr
 146:	f100 4080 	add.w	r0, r0, #1073741824	; 0x40000000
 14a:	f004 4200 	and.w	r2, r4, #2147483648	; 0x80000000
 14e:	3001      	adds	r0, #1
 150:	4310      	orrs	r0, r2
 152:	e8bd 0ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp}
 156:	4770      	bx	lr
 158:	f04f 40ff 	mov.w	r0, #2139095040	; 0x7f800000
 15c:	f004 4200 	and.w	r2, r4, #2147483648	; 0x80000000
 160:	4310      	orrs	r0, r2
 162:	e8bd 0ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp}
 166:	4770      	bx	lr
 168:	2000      	movs	r0, #0
 16a:	e7e6      	b.n	13a <__aeabi_d2f+0x13a>
 16c:	3001      	adds	r0, #1
 16e:	e7e4      	b.n	13a <__aeabi_d2f+0x13a>
 170:	b8100000 	.word	0xb8100000
 174:	7ff00000 	.word	0x7ff00000
 178:	47efffff 	.word	0x47efffff
 17c:	000fffff 	.word	0x000fffff
 180:	c7f00000 	.word	0xc7f00000

truncsfhf2.o:     file format elf32-littlearm

SYMBOL TABLE:
00000000 l    df *ABS*	00000000 truncsfhf2.c
00000000 l    d  .text	00000000 .text
00000000 l    d  .data	00000000 .data
00000000 l    d  .bss	00000000 .bss
00000000 l    d  .text.__truncsfhf2	00000000 .text.__truncsfhf2
00000000 l    d  .text.__gnu_f2h_ieee	00000000 .text.__gnu_f2h_ieee
00000000 l    d  .comment	00000000 .comment
00000000 l    d  .ARM.attributes	00000000 .ARM.attributes
00000000 g     F .text.__truncsfhf2	000000c2 .hidden __truncsfhf2
00000000 g     F .text.__truncsfhf2	000000c2 .hidden __aeabi_f2h
00000000 g     F .text.__gnu_f2h_ieee	00000004 .hidden __gnu_f2h_ieee



Disassembly of section .text.__truncsfhf2:

00000000 <__aeabi_f2h>:
__aeabi_f2h():
   0:	f020 4300 	bic.w	r3, r0, #2147483648	; 0x80000000
   4:	f1a3 5162 	sub.w	r1, r3, #947912704	; 0x38800000
   8:	f1a3 428f 	sub.w	r2, r3, #1199570944	; 0x47800000
   c:	4291      	cmp	r1, r2
   e:	d20f      	bcs.n	30 <__aeabi_f2h+0x30>
  10:	f3c0 020c 	ubfx	r2, r0, #0, #13
  14:	f5b2 5f80 	cmp.w	r2, #4096	; 0x1000
  18:	f3c3 334f 	ubfx	r3, r3, #13, #16
  1c:	d835      	bhi.n	8a <__aeabi_f2h+0x8a>
  1e:	d044      	beq.n	aa <__aeabi_f2h+0xaa>
  20:	f503 4380 	add.w	r3, r3, #16384	; 0x4000
  24:	0c00      	lsrs	r0, r0, #16
  26:	b299      	uxth	r1, r3
  28:	f400 4000 	and.w	r0, r0, #32768	; 0x8000
  2c:	4308      	orrs	r0, r1
  2e:	4770      	bx	lr
  30:	f1b3 4fff 	cmp.w	r3, #2139095040	; 0x7f800000
  34:	d820      	bhi.n	78 <__aeabi_f2h+0x78>
  36:	f1b3 4f8f 	cmp.w	r3, #1199570944	; 0x47800000
  3a:	d22f      	bcs.n	9c <__aeabi_f2h+0x9c>
  3c:	0ddb      	lsrs	r3, r3, #23
  3e:	f1c3 0271 	rsb	r2, r3, #113	; 0x71
  42:	2a17      	cmp	r2, #23
  44:	dc38      	bgt.n	b8 <__aeabi_f2h+0xb8>
  46:	f3c0 0116 	ubfx	r1, r0, #0, #23
  4a:	f441 0100 	orr.w	r1, r1, #8388608	; 0x800000
  4e:	3b51      	subs	r3, #81	; 0x51
  50:	fa11 f303 	lsls.w	r3, r1, r3
  54:	fa21 f302 	lsr.w	r3, r1, r2
  58:	bf18      	it	ne
  5a:	f043 0301 	orrne.w	r3, r3, #1
  5e:	f3c3 020c 	ubfx	r2, r3, #0, #13
  62:	f5b2 5f80 	cmp.w	r2, #4096	; 0x1000
  66:	f3c3 314f 	ubfx	r1, r3, #13, #16
  6a:	d827      	bhi.n	bc <__aeabi_f2h+0xbc>
  6c:	d108      	bne.n	80 <__aeabi_f2h+0x80>
  6e:	1c4b      	adds	r3, r1, #1
  70:	f64f 71fe 	movw	r1, #65534	; 0xfffe
  74:	4019      	ands	r1, r3
  76:	e003      	b.n	80 <__aeabi_f2h+0x80>
  78:	f3c3 3348 	ubfx	r3, r3, #13, #9
  7c:	f443 41fc 	orr.w	r1, r3, #32256	; 0x7e00
  80:	0c00      	lsrs	r0, r0, #16
  82:	f400 4000 	and.w	r0, r0, #32768	; 0x8000
  86:	4308      	orrs	r0, r1
  88:	4770      	bx	lr
  8a:	f503 4380 	add.w	r3, r3, #16384	; 0x4000
  8e:	3301      	adds	r3, #1
  90:	0c00      	lsrs	r0, r0, #16
  92:	b299      	uxth	r1, r3
  94:	f400 4000 	and.w	r0, r0, #32768	; 0x8000
  98:	4308      	orrs	r0, r1
  9a:	4770      	bx	lr
  9c:	f44f 41f8 	mov.w	r1, #31744	; 0x7c00
  a0:	0c00      	lsrs	r0, r0, #16
  a2:	f400 4000 	and.w	r0, r0, #32768	; 0x8000
  a6:	4308      	orrs	r0, r1
  a8:	4770      	bx	lr
  aa:	f64f 71fe 	movw	r1, #65534	; 0xfffe
  ae:	f503 4280 	add.w	r2, r3, #16384	; 0x4000
  b2:	3201      	adds	r2, #1
  b4:	4011      	ands	r1, r2
  b6:	e7e3      	b.n	80 <__aeabi_f2h+0x80>
  b8:	2100      	movs	r1, #0
  ba:	e7e1      	b.n	80 <__aeabi_f2h+0x80>
  bc:	1c4b      	adds	r3, r1, #1
  be:	b299      	uxth	r1, r3
  c0:	e7de      	b.n	80 <__aeabi_f2h+0x80>
  c2:	bf00      	nop

Disassembly of section .text.__gnu_f2h_ieee:

00000000 <__gnu_f2h_ieee>:
__gnu_f2h_ieee():
   0:	f7ff bffe 	b.w	0 <__gnu_f2h_ieee>

ucmpdi2.o:     file format elf32-littlearm

SYMBOL TABLE:
00000000 l    df *ABS*	00000000 ucmpdi2.c
00000000 l    d  .text	00000000 .text
00000000 l    d  .data	00000000 .data
00000000 l    d  .bss	00000000 .bss
00000000 l    d  .text.__ucmpdi2	00000000 .text.__ucmpdi2
00000000 l    d  .text.__aeabi_ulcmp	00000000 .text.__aeabi_ulcmp
00000000 l    d  .comment	00000000 .comment
00000000 l    d  .ARM.attributes	00000000 .ARM.attributes
00000000 g     F .text.__ucmpdi2	00000018 .hidden __ucmpdi2
00000000 g     F .text.__aeabi_ulcmp	0000001c .hidden __aeabi_ulcmp



Disassembly of section .text.__ucmpdi2:

00000000 <__ucmpdi2>:
__ucmpdi2():
   0:	4299      	cmp	r1, r3
   2:	d305      	bcc.n	10 <__ucmpdi2+0x10>
   4:	d806      	bhi.n	14 <__ucmpdi2+0x14>
   6:	4290      	cmp	r0, r2
   8:	d302      	bcc.n	10 <__ucmpdi2+0x10>
   a:	d803      	bhi.n	14 <__ucmpdi2+0x14>
   c:	2001      	movs	r0, #1
   e:	4770      	bx	lr
  10:	2000      	movs	r0, #0
  12:	4770      	bx	lr
  14:	2002      	movs	r0, #2
  16:	4770      	bx	lr

Disassembly of section .text.__aeabi_ulcmp:

00000000 <__aeabi_ulcmp>:
__aeabi_ulcmp():
   0:	4299      	cmp	r1, r3
   2:	d306      	bcc.n	12 <__aeabi_ulcmp+0x12>
   4:	d808      	bhi.n	18 <__aeabi_ulcmp+0x18>
   6:	4290      	cmp	r0, r2
   8:	d303      	bcc.n	12 <__aeabi_ulcmp+0x12>
   a:	bf8c      	ite	hi
   c:	2001      	movhi	r0, #1
   e:	2000      	movls	r0, #0
  10:	4770      	bx	lr
  12:	f04f 30ff 	mov.w	r0, #4294967295	; 0xffffffff
  16:	4770      	bx	lr
  18:	2001      	movs	r0, #1
  1a:	4770      	bx	lr

ucmpti2.o:     file format elf32-littlearm

SYMBOL TABLE:
00000000 l    df *ABS*	00000000 absvti2.c
00000000 l    d  .text	00000000 .text
00000000 l    d  .data	00000000 .data
00000000 l    d  .bss	00000000 .bss
00000000 l    d  .comment	00000000 .comment
00000000 l    d  .ARM.attributes	00000000 .ARM.attributes



udivmodsi4.o:     file format elf32-littlearm

SYMBOL TABLE:
00000000 l    d  .text	00000000 .text
00000000 l    d  .data	00000000 .data
00000000 l    d  .bss	00000000 .bss
00000000 l    d  .ARM.attributes	00000000 .ARM.attributes
00000000 g     F .text	0000001a .hidden __udivmodsi4
00000000         *UND*	00000000 __aeabi_idiv0



Disassembly of section .text:

00000000 <__udivmodsi4>:
__udivmodsi4():
   0:	4209      	tst	r1, r1
   2:	d006      	beq.n	12 <__udivmodsi4+0x12>
   4:	4603      	mov	r3, r0
   6:	fbb3 f0f1 	udiv	r0, r3, r1
   a:	fb00 3111 	mls	r1, r0, r1, r3
   e:	6011      	str	r1, [r2, #0]
  10:	4770      	bx	lr
  12:	f04f 0000 	mov.w	r0, #0
  16:	f7ff bffe 	b.w	0 <__aeabi_idiv0>
  1a:	bf00      	nop

umodsi3.o:     file format elf32-littlearm

SYMBOL TABLE:
00000000 l    d  .text	00000000 .text
00000000 l    d  .data	00000000 .data
00000000 l    d  .bss	00000000 .bss
00000000 l    d  .ARM.attributes	00000000 .ARM.attributes
00000000 g     F .text	00000016 .hidden __umodsi3
00000000         *UND*	00000000 __aeabi_idiv0



Disassembly of section .text:

00000000 <__umodsi3>:
__umodsi3():
   0:	4209      	tst	r1, r1
   2:	d004      	beq.n	e <__umodsi3+0xe>
   4:	fbb0 f2f1 	udiv	r2, r0, r1
   8:	fb02 0011 	mls	r0, r2, r1, r0
   c:	4770      	bx	lr
   e:	f04f 0000 	mov.w	r0, #0
  12:	f7ff bffe 	b.w	0 <__aeabi_idiv0>
  16:	bf00      	nop
